source: buchla-68k/ram/scordsp.c@ c59409e

Last change on this file since c59409e was 7ecfb7b, checked in by Thomas Lopatic <thomas@…>, 8 years ago

Unused variables and parameters.
  • Property mode set to 100644
File size: 20.5 KB
RevLine 
[f40a309]1/*
2 =============================================================================
3 scordsp.c -- MIDAS score display driver
4 Version 136 -- 1988-12-08 -- D.N. Lynx Crowe
5 =============================================================================
6*/
7
[b28a12e]8#include "ram.h"
[f40a309]9
10/* initialized stuff */
11
[7258c6a]12int16_t var2src[6] = { /* analog variable map */
[f40a309]13
14 SM_HTPW, SM_VTMW, SM_LPBR, SM_CTL1, SM_PED1, SM_KPRS
15};
16
[7258c6a]17int16_t simled[3] = { /* simulated LED colors for group modes */
[f40a309]18
19 0x00A2, /* play mode = green */
20 0x0062, /* standby mode = yellow */
21 0x0052 /* record mode = red */
22};
23
[7258c6a]24int8_t nsvtab[] = { /* note value modifier (accidental) table */
[f40a309]25
26 0, 1, 0, 0, 1, 0, 1, 0, 0, 1, 0, 1, /* 21 .. 32 -- A0 .. G#0 */
27 0, 1, 0, 0, 1, 0, 1, 0, 0, 1, 0, 1, /* 33 .. 44 -- A1 .. G#1 */
28 0, 1, 0, 0, 1, 0, 1, 0, 0, 1, 0, 1, /* 45 .. 56 -- A2 .. G#2 */
29 0, 1, 0, 0, 1, 0, 1, 0, 0, 1, 0, 1, /* 57 .. 68 -- A3 .. G#3 */
30 0, 1, 0, 0, 1, 0, 1, 0, 0, 1, 0, 1, /* 69 .. 80 -- A4 .. G#4 */
31 0, 1, 0, 0, 1, 0, 1, 0, 0, 1, 0, 1, /* 81 .. 92 -- A5 .. G#5 */
32 0, 1, 0, 0, 1, 0, 1, 0, 0, 1, 0, 1, /* 93 .. 104 -- A6 .. G#6 */
33 0, 1, 0, 0 /* 105 .. 108 -- A7 .. C7 */
34};
35
[7258c6a]36int16_t scorpal[16][3] = { /* score palette */
[f40a309]37
38 {0, 0, 0}, /* 0 - black */
39 {2, 3, 3}, /* 1 - white */
40 {0, 0, 1}, /* 2 - dark blue #1 */
41 {2, 0, 2}, /* 3 - dark violet */
42 {0, 0, 3}, /* 4 - dark blue #2 */
43 {3, 0, 0}, /* 5 - red */
44 {3, 3, 0}, /* 6 - yellow */
45 {1, 2, 0}, /* 7 - dark green */
46 {0, 3, 3}, /* 8 - light blue */
47 {3, 2, 0}, /* 9 - tan */
48 {0, 3, 0}, /* 10 - light green */
49 {3, 1, 2}, /* 11 - light violet */
50 {0, 2, 3}, /* 12 - medium blue */
51 {2, 0, 0}, /* 13 - dark red */
52 {2, 2, 1}, /* 14 - ivory */
53 {3, 3, 3} /* 15 - bright white */
54};
55
[7258c6a]56int8_t *clklbl[] = { /* clock control and scource labels */
[f40a309]57
58 "Local", /* 0 - CK_LOCAL */
59 "MIDI ", /* 1 - CK_MIDI */
60 "SMPTE", /* 2 - CK_SMPTE */
61 "PLS24", /* 3 - CK_PLS24 */
62 "PLS48", /* 4 - CK_PLS48 */
63 "PLS96", /* 5 - CK_PLS96 */
64 "Step " /* 6 - CK_STEP */
65};
66
[7258c6a]67int8_t *sdisp[] = { /* score display fixed text strings */
[f40a309]68
69 /* 0 */ "\230\231\232\233 ", /* Interpolate */
70
71 /* 1 */ "\200\201\202\203 1 2 3 4 5 6 7 8 9 \254 \255 \256 ",
72 /* Group / Instrument */
73
74 /* 2 */ "\220\221\222\223 Pch/Hor Mod/Vrt Brth/LP GPC/CV1 Pedal 1 Key Prs Group",
75 /* Analog Source */
76
77 /* 3 */ "\015\016\017 Play Recrd OvrDub PunchIn ",
78 /* Rec Mode */
79
80 /* 4 */ "\204\205\206\207", /* Transpose */
81
82 /* 5 */ "\210\211\212\213 / / / / / / / / / / / / ",
83 /* Dynamics / Location */
[9519422]84
[f40a309]85 /* 6 */ "\214\215\216\217", /* Velocity */
86
87 /* 7 */ "\224\225\226\227 0/+00.0 0/+00.0 0/+00.0 0/+00.0 0/+00.0 0/+00.0 # 00 ",
88 /* Resolution / Value */
89
90 /* 8 */ " "
91
92
93};
94
95/*
96 =============================================================================
97 makeln(lnc, lec) -- create the constant slice at 'consl'.
[9519422]98 make the line object color 'lnc', and ledger line color 'lec',
[f40a309]99 =============================================================================
100*/
101
[7258c6a]102void makeln(uint16_t lnc, uint16_t lew)
[f40a309]103{
[7258c6a]104 register uint16_t *lp, *cp;
105 register int16_t i;
106 register uint16_t lbg;
[f40a309]107
108 lp = obj15; /* setup line object pointer */
109 cp = consl; /* setup constant slice pointer */
110
111 lew = exp_c(lew); /* create ledger line constant */
112
113 lnc &= 0x000F; /* mask cursor line color */
114
[fa38804]115
[f40a309]116 for (i = 0; i < 224; i++) {
117
118 /* stuff data into line object */
119
120 if ((i EQ 42) OR /* top ledger line */
121 (i EQ 50) OR /* top ledger line */
122 (i EQ 58) OR /* top ledger line */
123 (i EQ 66) OR /* top ledger line */
124 (i EQ 162) OR /* bottom ledger line */
125 (i EQ 170) OR /* bottom ledger line */
126 (i EQ 178) OR /* bottom ledger line */
127 (i EQ 186)) {
128
129 lbg = lew;
130 *lp++ = lbg & 0xFFF0;
131 *lp++ = lbg;
132 *lp++ = lbg;
133 *lp++ = lbg;
134
135 } else if (i > 209) { /* new data area */
136
137 lbg = 0;
138 *lp++ = lbg & 0xFFF0;
139 *lp++ = lbg;
140 *lp++ = lbg;
141 *lp++ = lbg;
142
143 } else {
144
145 lbg = 0;
146 *lp++ = lbg & 0xFFF0;
147 *lp++ = lbg;
148 *lp++ = (lbg & 0xFFF0) | lnc;
149 *lp++ = lbg;
150 }
151
152 *cp++ = 0; /* clear a line in the constant slice */
153 }
154
155 consl[74] = lew; /* constant slice treble clef lines */
156 consl[82] = lew;
157 consl[90] = lew;
158 consl[98] = lew;
159 consl[106] = lew;
160
161 consl[122] = lew; /* constant slice bass clef lines */
162 consl[130] = lew;
163 consl[138] = lew;
164 consl[146] = lew;
165 consl[154] = lew;
166
167 consl[210] = exp_c(NDMC); /* constant slice new data margin line */
168}
169
170/*
171 =============================================================================
172 ds_vmod() -- display velocity mode
173 =============================================================================
174*/
175
[0580615]176void ds_vmod(void)
[f40a309]177{
178 if (ndisp NE 2)
179 return;
180
181 if (v_regs[5] & 0x0180)
182 vbank(0);
183
184 vputs(obj8, 5, 0, sdisp[6],
185 velflag ? ((SD_CHNG << 4) | SDBG11) : SDW11ATR);
186}
187
188/*
189 =============================================================================
190 ds_vel() -- display velocities
191 =============================================================================
192*/
193
[0580615]194void ds_vel(void)
[f40a309]195{
[7258c6a]196 register int16_t i;
197 int8_t buf[6];
[f40a309]198
199 if (ndisp NE 2)
200 return;
201
202 if (v_regs[5] & 0x0180)
203 vbank(0);
204
205 ds_vmod();
206
207 for (i = 0; i < 12; i++) {
208
209 sprintf(buf, "%03d", lastvel[i] / 252);
210 vputs(obj8, 5, (i * 5) + 6, buf, SDW11ATR);
211 }
212}
213
214/*
215 =============================================================================
216 dsvmode() -- display variable mode
217 =============================================================================
218*/
219
[7258c6a]220void dsvmode(int16_t n)
[f40a309]221{
222 if (ndisp NE 2)
223 return;
224
225 if (v_regs[5] & 0x0180)
226 vbank(0);
227
228 vputc(obj8, 6, 5 + (n * 9), '*', simled[varmode[n][abs(angroup) - 1]]);
229}
230
231
232/*
233 =============================================================================
234 ds_anmd() -- display mode for all variables
235 =============================================================================
236*/
237
[0580615]238void ds_anmd(void)
[f40a309]239{
[7258c6a]240 register int16_t i;
[f40a309]241
242 if (ndisp NE 2)
243 return;
244
245 for (i = 0; i < 6; i++)
246 dsvmode(i);
247}
248
249/*
250 =============================================================================
251 ds_angr() -- display analog variable group number
252 =============================================================================
253*/
254
[0580615]255void ds_angr(void)
[f40a309]256{
[7258c6a]257 int8_t buf[4];
[f40a309]258
259 if (ndisp NE 2)
260 return;
261
262 if (v_regs[5] & 0x0180)
263 vbank(0);
264
265 sprintf(buf, "# %2.2d", abs(angroup));
266 vputs(obj8, 7, 59, buf, SDW12ATR);
267}
268
269/*
270 =============================================================================
271 ds_anrs() -- display analog resolution
272 =============================================================================
273*/
274
[0580615]275void ds_anrs(void)
[f40a309]276{
[7258c6a]277 register int16_t i;
278 int8_t buf[3];
[f40a309]279
280 if (ndisp NE 2)
281 return;
282
283 if (v_regs[5] & 0x0180)
284 vbank(0);
285
286 buf[1] = '/';
287 buf[2] = '\0';
288
289 for (i = 0; i < 6; i++) {
290
291 buf[0] = '0' + anrs[i][abs(angroup) - 1];
292 vputs(obj8, 7, 6 + (i * 9), buf, SDW12ATR);
293 }
294}
295
296/*
297 =============================================================================
298 dsanval() -- display analog value
299 =============================================================================
300*/
301
[7258c6a]302void dsanval(int16_t var)
[f40a309]303{
[7258c6a]304 register int16_t tmp, val, v1, v2;
305 int8_t buf[16];
[f40a309]306
307 if (ndisp NE 2)
308 return;
309
310 if (v_regs[5] & 0x0180)
311 vbank(0);
312
313 val = valents[((abs(angroup) - 1) << 4) | var2src[var]].val >> 5;
[9519422]314 tmp = abs(val);
[f40a309]315 v1 = tmp / 100;
316 v2 = (tmp - (v1 * 100)) / 10;
317 sprintf(buf, "%c%02d.%1d", ((val < 0) ? '-' : '+'), v1, v2);
318 vputs(obj8, 7, 8 + (var * 9), buf, SDW12ATR);
319}
320
321/*
322 =============================================================================
323 ds_anvl() -- display analog values
324 =============================================================================
325*/
326
[0580615]327void ds_anvl(void)
[f40a309]328{
[7258c6a]329 register int16_t i;
[f40a309]330
331 if (ndisp NE 2)
332 return;
333
334 for (i = 0; i < 6; i++)
335 dsanval(i);
336}
337
338/*
339 =============================================================================
340 uclk() -- underline clock label
341 =============================================================================
342*/
343
[0580615]344void uclk(void)
[f40a309]345{
346 if (sliders NE LS_VOICE) {
347
348 point = GLCplot;
349
350 GLCcurs(G_ON);
351
352 if (clkrun)
353 lseg(CK_XL, CK_Y, CK_XR, CK_Y, 1); /* clock on */
354 else
355 lseg(CK_XL, CK_Y, CK_XR, CK_Y, 0); /* clock off */
356
357 GLCcurs(G_OFF);
358 }
359}
360
361/*
362 =============================================================================
363 dclkmd() -- display clock mode
364 =============================================================================
365*/
366
[0580615]367void dclkmd(void)
[f40a309]368{
369 uclk();
370
371 if (ndisp NE 2)
372 return;
373
374 if (v_regs[5] & 0x0180)
375 vbank(0);
376
377 vputs(obj8, 0, 29, "Clock",
378 clkrun ? ((SD_CHNG << 4) | SDBG02) : SDW02ATR);
379}
380
381/*
382 =============================================================================
383 dsclk() -- display clock status, control, and source
384 =============================================================================
385*/
386
[0580615]387void dsclk(void)
[f40a309]388{
[7258c6a]389 int16_t atr[26];
[f40a309]390
391 uclk();
392
393 if (ndisp NE 2)
394 return;
395
396 memsetw(atr, SDW02ATR, 26);
397
398 if (clkrun)
399 memsetw(atr, (SDBG02 | (SD_CHNG << 4)), 5);
400
401 sprintf(bfs, "Clock Con %5.5s Src %5.5s ",
402 clklbl[clkctl], clklbl[clksrc]);
403
404 if (v_regs[5] & 0x0180)
405 vbank(0);
406
407 vputsa(obj8, 0, 29, bfs, atr);
408}
409
410/*
411 =============================================================================
412 dssect() -- display current score section
413 =============================================================================
414*/
415
[0580615]416void dssect(void)
[f40a309]417{
418 if (ndisp NE 2)
419 return;
420
421 sprintf(bfs, "%02d", cursect + 1);
422
423 if (v_regs[5] & 0x0180)
424 vbank(0);
425
426 vputs(obj8, 0, 6, bfs, SDW01ATR);
427}
428
429/*
430 =============================================================================
431 dslocn() -- display current score location
432 =============================================================================
433*/
434
[0580615]435void dslocn(void)
[f40a309]436{
[7258c6a]437 register int32_t curfr, beat;
438 register int16_t frame;
[f40a309]439
440 if (ndisp NE 2)
441 return;
442
443 curfr = t_ctr;
444 beat = curfr / 48;
445 frame = curfr % 48;
446
447 sprintf(bfs, "%05ld F %02d", beat, frame);
448
449 if (v_regs[5] & 0x0180)
450 vbank(0);
451
452 vputs(obj8, 0, 11, bfs, SDW00ATR);
453}
454
455/*
456 =============================================================================
457 dnedmod() -- display note edit mode
458 =============================================================================
459*/
460
[0580615]461void dnedmod(void)
[f40a309]462{
463 if (ndisp NE 2)
464 return;
465
466 if (v_regs[5] & 0x0180)
467 vbank(0);
468
469 vputs(obj8, 0, 55, nedlbl[noteop],
470 (notesel ? ((SD_CHNG << 4) | SDBG03) : SDW03ATR) |
471 (noteop EQ NOP_NUL ? 0 : C_BLINK));
472}
473
474/*
475 =============================================================================
476 dsmem() -- display remaining memory 'units' (long words)
477 =============================================================================
478*/
479
[0580615]480void dsmem(void)
[f40a309]481{
482 if (ndisp NE 2)
483 return;
484
485 sprintf(bfs, "M %05ld", evleft());
486
487 if (v_regs[5] & 0x0180)
488 vbank(0);
489
490 vputs(obj8, 8, 57, bfs, SDW15ATR);
491}
492
493/*
494 =============================================================================
495 dsgstat() -- display group status
496 =============================================================================
497*/
498
[7258c6a]499void dsgstat(int16_t n)
[f40a309]500{
[7258c6a]501 int8_t c;
[f40a309]502
503 if (ndisp NE 2)
504 return;
505
506 if (v_regs[5] & 0x0180)
507 vbank(0);
508
509 c = 1 + n + (grpstat[n] ? ((n > 8) ? 162 : '0') : 192);
510 vputc(obj8, 2, 5 + (n * 5), c, (((n + 3) << 4) | 2));
511}
512
513/*
514 =============================================================================
515 dsgmode() -- display group mode
516 =============================================================================
517*/
518
[7258c6a]519void dsgmode(int16_t n)
[f40a309]520{
521 if (ndisp NE 2)
522 return;
523
524 if (v_regs[5] & 0x0180)
525 vbank(0);
526
527 vputc(obj8, 2, 6 + (n * 5), '*', simled[grpmode[n]]);
528}
529
530/*
531 =============================================================================
532 dsgmods() -- display mode and status for all groups
533 =============================================================================
534*/
535
[0580615]536void dsgmods(void)
[f40a309]537{
[7258c6a]538 register int16_t i;
[f40a309]539
540 if (ndisp NE 2)
541 return;
542
543 for (i = 0; i < 12; i++) {
544
545 dsgstat(i);
546 dsgmode(i);
547 }
548}
549
550/*
551 =============================================================================
552 dsgmodz() -- display modes for all groups and variables
553 =============================================================================
554*/
555
[0580615]556void dsgmodz(void)
[f40a309]557{
[7258c6a]558 register int16_t i;
[f40a309]559
560 if (ndisp NE 2)
561 return;
562
563 for (i = 0; i < 12; i++) /* group modes */
564 dsgmode(i);
565
566 for (i = 0; i < 6; i++) /* variable modes */
567 dsvmode(i);
568}
569
570/*
571 =============================================================================
572 dsrpmod() -- display record / play modes
573 =============================================================================
574*/
575
[0580615]576void dsrpmod(void)
[f40a309]577{
[7258c6a]578 int16_t atr[25];
[f40a309]579
580 switch (sliders) {
581
582 case LS_PRMTR:
583 case LS_OTHER:
584 case LS_EQ:
585 case LS_NGRP:
586
587 point = GLCplot;
588
589 GLCcurs(G_ON);
590
591 if (recsw) {
592
593 lseg(RP_RL, RP_Y, RP_RR, RP_Y, 1); /* record */
594 lseg(RP_PL, RP_Y, RP_PR, RP_Y, 0);
595
596 } else {
597
598 lseg(RP_RL, RP_Y, RP_RR, RP_Y, 0); /* play */
599 lseg(RP_PL, RP_Y, RP_PR, RP_Y, 1);
600 }
601
602 GLCcurs(G_OFF);
603 }
[fa38804]604
[f40a309]605 if (ndisp NE 2)
606 return;
607
608 memsetw(atr, SDW14ATR, 25);
609
610 if (recsw) /* record */
611 memsetw(&atr[5], (C_BLINK | SDBG14 | (SD_CHNG << 4)), 5);
612 else /* play */
613 memsetw(&atr[0], (SDBG14 | (SD_CHNG << 4)), 4);
614
615 if (dubsw) /* overdub */
616 memsetw(&atr[11], (SDBG14 | (SD_CHNG << 4)), 6);
617
618 if (pchsw) /* punch in enable */
619 memsetw(&atr[18], (SDBG14 | (SD_CHNG << 4)), 7);
620
621 if (v_regs[5] & 0x0180)
622 vbank(0);
623
624 vputsa(obj8, 8, 31, "Play Recrd OvrDub PunchIn", atr);
625}
626
627/*
628 =============================================================================
629 dsimode() -- display insert mode
630 =============================================================================
631*/
632
[0580615]633void dsimode(void)
[f40a309]634{
[7258c6a]635 int16_t atr[7];
[f40a309]636
637 if (ndisp NE 2)
638 return;
639
640 if (insmode)
641 memsetw(atr, (SDBG01 | (SD_CHNG << 4)), 7);
642 else
643 memsetw(atr, SDW01ATR, 7);
644
645 if (v_regs[5] & 0x0180)
646 vbank(0);
647
648 vputsa(obj8, 0, 22, "Insert ", atr);
649}
650
651/*
652 =============================================================================
653 sdwin() -- fill in a score display window
654 =============================================================================
655*/
656
[7258c6a]657void sdwin(int16_t n)
[f40a309]658{
[7ecfb7b]659 int16_t atrib, i;
[f40a309]660
661 if (ndisp NE 2) /* only if score is selected */
662 return;
663
664 if (v_regs[5] & 0x0180) /* select bank 0 */
665 vbank(0);
666
667 switch (n) { /* dispatch off of window number */
668
669 case 0: /* score location */
670
671 vputs(obj8, 0, 0,
672 ac_code EQ N_SHARP ? "\250 " : "\251 ",
673 SDW00ATR);
674
675 vputs(obj8, 0, 2, "Sec ", SDW01ATR);
676 vputs(obj8, 0, 9, "B F ", SDW00ATR);
677
678 dssect(); /* display current section */
679 dslocn(); /* display score location */
680 return;
681
682 case 1: /* insert mode */
683
684 dsimode(); /* display score insert mode */
685 return;
686
687 case 2: /* clock */
688
689 dsclk(); /* display clock status */
690 return;
691
692 case 3: /* note edit */
693
694 dnedmod();
695 return;
[fa38804]696
[f40a309]697 case 4: /* assignment */
698
699 vputs(obj8, 1, 0, "Assignment ", SDW04ATR);
700 rd_ioas(0); /* display assignment table number */
701 return;
702
703 case 5: /* tuning */
704
705 vputs(obj8, 1, 14, "Tune ", SDW05ATR);
706 rd_tune(0); /* display tuning table number */
707 return;
708
709 case 6: /* tempo */
710
711 vputs(obj8, 1, 21, "Tempo ", SDW06ATR);
712 rd_tmpo(0); /* display tempo */
713 return;
714
715 case 7: /* interpolate */
716
717 vputs(obj8, 1, 31, "Int ", SDW07ATR);
718 rd_intp(0);
719 return;
720
721 case 8: /* stop/next */
722
723 vputs(obj8, 1, 40, "Stop/Next ", SDW08ATR);
724 return;
725
726 case 9: /* punch in/out */
727
728 vputs(obj8, 1, 50, "In/Out ", SDW09ATR);
729 return;
730
731 case 10: /* output */
732
733 vputs(obj8, 1, 57, "Output ", SDW10ATR);
734 return;
735
736 case 11: /* group/instr, transposition, dyn/loc, velocity */
737
738 vputs(obj8, 2, 0, sdisp[1], SDW11ATR);
739 dsgmods(); /* display mode and status for all groups */
740 ds_inst(); /* display instruments */
741
742 vputs(obj8, 3, 4, sdisp[8], SDW11ATR);
743 vputs(obj8, 3, 0, sdisp[4], SDW11ATR);
744 ds_trns(); /* display transpositions */
745
746 vputs(obj8, 4, 4, sdisp[8], SDW11ATR); /* dyn/loc */
747 vputs(obj8, 4, 0, sdisp[5], SDW11ATR);
748 ds_dyn(); /* display dynamics */
749 ds_loc(); /* display locations */
750
751 vputs(obj8, 5, 4, sdisp[8], SDW11ATR); /* velocity */
752 vputs(obj8, 5, 0, sdisp[6], SDW11ATR);
753 ds_vel(); /* display velocities */
754
755 return;
[fa38804]756
[f40a309]757 case 12: /* analog variables */
758
759 vputs(obj8, 6, 0, sdisp[2], SDW12ATR);
760 vputs(obj8, 7, 0, sdisp[7], SDW12ATR);
761
762 if (angroup < 0)
763 atrib = SDW12ATR;
764 else
765 atrib = (SD_CHNG << 4) | SDBG12;
766
767 for (i = 0; i < 4; i++)
768 vputa(obj8, 7, i, atrib);
769
770 if (ancmsw)
771 atrib = (SD_CHNG << 4) | SDBG12;
772 else
773 atrib = SDW12ATR;
774
775 for (i = 0; i < 4; i++)
776 vputa(obj8, 6, i, atrib);
777
778 ds_anmd();
779 ds_angr();
780 ds_anrs();
781 ds_anvl();
782
783 return;
784
785 case 13: /* score */
786
787 sprintf(bfs, "Score %02.2d %16.16s ",
788 curscor + 1, scname[curscor]);
789
790 vputs(obj8, 8, 0, bfs, SDW13ATR);
791 return;
792
793 case 14: /* record/play, overdub, punchin */
794
795 vputs(obj8, 8, 27, sdisp[3], SDW14ATR); /* Rec Mode */
796 dsrpmod(); /* display rec/play modes */
797 return;
798
799 case 15: /* memory */
800
801 dsmem(); /* display available events */
802 return;
803 }
804}
805
806/*
807 =============================================================================
808 sdwins() -- display all score windows
809 =============================================================================
810*/
811
[0580615]812void sdwins(void)
[f40a309]813{
[7258c6a]814 register int16_t i;
[f40a309]815
816 if (ndisp NE 2) /* only if score display is selected */
817 return;
818
819 for (i = 0; i < 17; i++) /* refresh each of the windows */
820 sdwin(i);
821}
822
823/*
824 =============================================================================
825 sdsetup() -- setup the score display
826 =============================================================================
827*/
828
[0580615]829void sdsetup(void)
[f40a309]830{
831 dswap(); /* clear the video display */
832
833 sd = D_FWD; /* display direction = forward */
834 noteop = NOP_NUL; /* no pending note edit operation */
835 notesel = FALSE; /* no note selected */
836 secop = SOP_NUL; /* no pending section edit operation */
837 scmctl = -1; /* no area 1 menu up */
838 sdmctl = -1; /* no area 2 menu up */
839 submenu = FALSE; /* submenu cursor not enabled */
840 lastam = 0; /* reset assignment menu page */
841
842 clrsctl(); /* clear out the slices */
843
844 /* setup object pointers */
845
846 obj0 = v_curs0; /* 0 - cursor (arrow) */
847 obj2 = v_tcur; /* 2 - cursor (typewriter) */
848 obj3 = v_cur; /* 3 - cursor (underline) */
849 obj8 = v_ct0; /* 8 - character text */
850 obj11 = v_win0; /* 11 - window */
851 obj13 = v_kbobj; /* 13 - keyboard */
852 obj14 = v_score; /* 14 - score */
853 obj15 = v_lnobj; /* 15 - line */
854
855 /* ---------------- initialize object table -------------------- */
856 /* obj, typ, bnk, base, xpix, ypix, x0, y0, flags, pri */
857
858 SetObj( 0, 0, 1, obj0, 16, 16, C1X, C1Y, OBFL_00, -1);
859 SetObj(TTCURS, 0, 1, obj2, 16, 16, 0, 0, TTCCFL, -1);
860 SetObj( 3, 0, 1, obj3, 512, 18, 0, 0, OBFL_01, -1);
861 SetObj( 8, 1, 0, obj8, 512, 108, 0, 0, OBFL_08, -1);
862 SetObj( 11, 0, 1, obj11, 512, 224, 0, 14, OBFL_11, -1);
863 SetObj( 13, 0, 1, obj13, 16, 224, 0, 14, OBFL_13, -1);
864 SetObj( 14, 0, 0, obj14, 512, 224, 0, 14, OBFL_14, -1);
865 SetObj( 15, 0, 1, obj15, 16, 224, 248, 14, OBFL_15, -1);
866
867 if (v_regs[5] & 0x0180) /* select bank 0 */
868 vbank(0);
869
870 memsetw(obj14, 0, 32767); /* clear score object */
871 memsetw(obj14+32767L, 0, 24577);
872
873 vbank(1); /* select bank 1 */
874
875 stcset(); /* setup text cursor colors */
876 stcclr(); /* clear text cursors */
877 arcurs(SDCURSR); /* setup arrow cursor */
878 ttcini(SDCURSR); /* setup typewriter cursor */
879
[fa38804]880
[f40a309]881 if ((v_regs[5] & 0x0180) NE 0x0100)
882 vbank(1); /* select bank 1 */
883
884 memcpyw(obj13, kbobj, 896); /* setup 'keyboard' object */
885 makeln(LN_VRT, LN_HOR); /* setup 'lines' object */
886 sdwins(); /* fill in the windows */
887
888 /* display some objects */
889
890 SetPri( 3, 12); /* Underline cursors */
891 objclr(12);
892 objon(12, 12, 2); /* ... row 0 */
893 objon(12, 250, 2); /* ... row 17 */
894 objon(12, 264, 2); /* ... row 18 */
895 objon(12, 278, 2); /* ... row 19 */
896 objon(12, 292, 2); /* ... row 20 */
897 objon(12, 306, 2); /* ... row 21 */
898 objon(12, 320, 2); /* ... row 22 */
899 objon(12, 334, 2); /* ... row 23 */
900 objon(12, 348, 2); /* ... row 24 */
901
902 SetPri( 8, 7); /* Character Text */
903 objclr(7);
904 objon(7, 0, 12); /* ... row 0 */
905 objon(7, 238, 12); /* ... row 17 */
906 objon(7, 252, 12); /* ... row 18 */
907 objon(7, 266, 12); /* ... row 19 */
908 objon(7, 280, 12); /* ... row 20 */
909 objon(7, 294, 12); /* ... row 21 */
910 objon(7, 308, 12); /* ... row 22 */
911 objon(7, 322, 12); /* ... row 23 */
912 objon(7, 336, 12); /* ... row 24 */
[9519422]913
[f40a309]914 SetPri(13, 2); /* Keyboard object */
915 SetPri(14, 1); /* Score object */
916 SetPri(15, 0); /* Line object */
917
918 vsndpal(scorpal); /* set the palette */
919
920 SetPri( 0, 15); /* Turn on arrow cursor */
921 setgc(C1X, C1Y);
922
923 sc_refr(t_cur); /* position the score on the display */
924}
[6262b5c]925
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