source: buchla-68k/rom/romp.c@ 6d5247b

Last change on this file since 6d5247b was 432327d, checked in by Thomas Lopatic <thomas@…>, 7 years ago

Fix conversion warnings.
  • Property mode set to 100644
File size: 68.6 KB
RevLine 
[f40a309]1/*
2 ============================================================================
3 romp.c -- ROMP debug monitor
4 (c) Copyright 1987,1988 -- D.N. Lynx Crowe
5
6 See ROMPVER, below, for version number and date.
7
8 CAUTION: This code is designed to live in PROM, so initialized
9 variables are PERMANENTLY initialized, since the compiler assigns
10 initialized variables to the data segment, which ends up in PROM.
11
12 Un-initialized variables go into the bss segment, which ends up in RAM.
13
14 Set ON_B700 non-zero to get a Buchla 700 PROM,
15 or zero to get a NASA 3D Helmet Display PROM.
16 ============================================================================
17*/
18
19#define ROMPVER "22.00 -- 1988-06-20"
20
21#define TINYMSG 0 /* 1 for short messages, 0 for normal ones */
22
23#define ON_B700 1 /* 1 for Buchla 700, 0 for NASA */
24#define ONEMEG 1 /* 1 if 1024K, 0 if 512K RAM space (Buchla 700) */
25
[b28a12e]26#include "rom.h"
[f40a309]27
28#if ON_B700
29#define USER_RAM 0x00010000L /* Start of user RAM (TPA) */
30#if ONEMEG
31#define RAM_TOP 0x000FFFFEL /* Default top word of memory */
32#define ISTACK 0x000FFFFEL /* Default initial stack */
33#else
34#define RAM_TOP 0x0007FFFEL /* Default top word of memory */
35#define ISTACK 0x0007FFFEL /* Default initial stack */
36#endif
37#define KB_EI 2 /* Enable level for panel */
38#define DEFIPL 2 /* Default internal processor level */
39#define INITSR 0x2200 /* Default initial status register */
40#define BOOTFILE "midas.abs" /* Boot file name */
41#define BOOTKEY 39 /* Boot panel key */
42#define ROMPKEY 40 /* ROMP panel key */
43#define FIFOLIM 60000 /* FIFO clear limit */
44#define I_TABX 53 /* Tablet X */
45#define I_TABY 54 /* Tablet Y */
46#define I_CURX 55 /* Cursor X */
47#define I_CURY 56 /* Cursor Y */
48#define I_LONGL 57 /* LongPot Left */
49#define I_LONGR 58 /* LongPot Right */
50#define I_SCROLL 59 /* Scroll */
51#define I_TEMPO 73 /* Tempo Multiplier */
52#define I_TIME 74 /* Time Scaling */
53#define I_TUNE 75 /* Fine Tuning */
54#define I_LEVEL 76 /* Amplitude */
55#define BARBASE 5120L /* Base of bars in VSDD RAM */
56#define SWBASE 38400L /* Base of switches in VSDD RAM */
57#define MARGIN 4 /* Offset from left edge of screen */
58#else
59#define DEFIPL 3
60#define USER_RAM 0x00008000L
61#define RAM_TOP 0x0001FFFEL
62#define ISTACK 0x0001FFFEL
63#define INITSR 0x2300
64#endif
65
66#define ROMADDR 0x00100000L
67
68#define PRM_DATE 0x0100008L
69#define PRM_VERS 0x0100002L
70
71#define BPINST 0x4E4F /* breakpoint instruction */
72
73#define CRLF "\r\n"
74
75#define TACK "K\r" /* good response from load command */
76#define NACK "?\r" /* bad response from load command */
77
78#define SREC9 "04000000FB" /* tail of a type 9 Motorola S-Record */
79
80#define MON_C 1 /* monitor character code */
81#define MON_S 2 /* monitor short code */
82#define MON_L 4 /* monitor long code */
83
84/*
85 ============================================================================
86 error message string definitions
87 ============================================================================
88*/
89
90#define EMSG1 "\r\n** Command error **\r\n"
91#define EMSG2 "\r\n** Invalid parameter **\r\n"
92#define EMSG3 "\r\n** Unrecognized command **\r\n"
93
94#define EMSG5 "\r\n** Command not repeatable **\r\n"
95#define EMSG6 "\r\n** Invalid line terminator **\r\n"
96#define EMSG7 "\r\n** do_cmd() switch failed **\r\n"
97
98#define CANNED "\r\n----- Cancelled -----\r\n"
99
100/*
101 ============================================================================
102 initialized variables (These end up in the data segment in PROM)
103 ============================================================================
104*/
105
106struct cmdent { /* command table entry */
107
[7258c6a]108 int8_t *cname; /* command name pointer */
[0170798]109 int16_t (*cp)(void); /* command parser function pointer */
110 int16_t (*cx)(void); /* command execution function pointer */
[7258c6a]111 int8_t *hstr; /* help string pointer */
[f40a309]112};
113
[39a696b]114static struct cmdent cmtab[] = {
[f40a309]115
116#if ON_B700
117 {"adisp", cp_null, cx_adsp, ""},
118 {"boot", cp_boot, cx_boot, ""},
119 {"bpb", cp_null, cx_bpb, ""},
120#endif
121
122 {"check", cp_chek, cx_chek, "start,end"},
123 {"copy", cp_copy, cx_copy, "from,to,len"},
124
125#if ON_B700
126 {"crash", cp_null, cx_crsh, ""},
127 {"dinit", cp_null, cx_dini, ""},
128#endif
129
130 {"dump", cp_dump, cx_dump, "from[,[to=from][,width=16]]"},
131 {"exit", cp_null, cx_exit, ""},
132 {"fill", cp_fill, cx_fill, "loc,count,byte"},
133 {"go", cp_go, cx_go, "[addr][,[brk1][,brk2]]"},
134 {"help", cp_null, cx_help, ""},
135 {"ipl", cp_ilev, cx_ilev, "level"},
136 {"ldump", cp_ldmp, cx_ldmp, "from[,[to=from][,width=4]]"},
137 {"load", cp_null, cx_load, ""},
138
139#if ON_B700
140 {"midas", cp_null, cx_mlod, ""},
141#endif
142
143 {"monc", cp_monc, cx_mon, "addr"},
144 {"mons", cp_mons, cx_mon, "addr"},
145 {"monl", cp_monl, cx_mon, "addr"},
146 {"mset", cp_mset, cx_mset, "addr,b1[,...,bn]"},
147 {"mtest", cp_mtst, cx_mtst, hs_mtst},
148 {"next", cp_null, cx_next, ""},
149 {"obmap", cp_null, cx_omap, ""},
150
151#if ON_B700
152 {"read", cp_read, cx_read, "sector,buffer,count"},
153#endif
154
155 {"regs", cp_null, cx_regs, ""},
156 {"reset", cp_null, cx_rest, ""},
157 {"rset", cp_rset, cx_rset, "register,value"},
158 {"vregs", cp_null, cx_vreg, ""},
159 {"vrset", cp_vrst, cx_vrst, "register,value"},
160 {"wdump", cp_wdmp, cx_wdmp, "from[,[to=from][,width=8]]"},
161 {"wfill", cp_wfil, cx_wfil, "loc,count,word"},
162
163#if ON_B700
164 {"write", cp_read, cx_writ, "sector,buffer,count"},
165#endif
166
167 {"wset", cp_wset, cx_wset, "addr,w1[,...,wn]"},
168 {"zap", cp_null, cx_zap, ""}
169};
170
171#define NCMDS ((sizeof cmtab) / (sizeof cmtab[0]))
172
[7258c6a]173int8_t ahex[] = "0123456789abcdefABCDEF";
[f40a309]174
[7258c6a]175int8_t *rlist[] = { /* register name list */
[f40a309]176
177 "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7",
178 "a0", "a1", "a2", "a3", "a4", "a5", "a6", "a7",
179 "sr", "pc", "sp",
[7258c6a]180 (int8_t *)0
[f40a309]181};
182
[7258c6a]183int8_t *vrlist[] = { /* video register name list */
[f40a309]184
185 "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7",
186 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15",
187 "h0", "h1", "h2", "h3", "v0", "v1", "v2", "v3",
[7258c6a]188 (int8_t *)0
[f40a309]189};
190
191#if ON_B700
[7258c6a]192int16_t sigadr[] = { /* display offsets for signals */
[f40a309]193
194 0, 0, 0, 0, 0, 1, 1, 1, 1, 1, /* keys */
195 2, 2, 2, 2, 2, 3, 3, 3, 3, 3,
196 4, 4, 4, 4,
197 7, 7, 7, 7, 7, 8, 8, 8, 8, 8, /* sliders */
198 9, 9, 9, 9,
199 12, 12, 12, 12, 12, 13, 13, 13, 13, 13, /* switches */
200 14, 14, 14, 14,
201 17, 17, /* tablet */
202 20, 20, /* cursor */
203 23, 23, /* longpot */
204 26, /* scrollpot */
205 29, 29, 29, 29, 29, 30, 30, 30, 30, 30, /* digits */
206 32, 32, 32, /* x, e, m */
207 35, 35, 35, 35, /* pots */
208 37, 37, /* pedals */
209 39, 39, 39, 39 /* analog in */
210};
211#endif
212
213/*
214 ============================================================================
215 un-initialized variables (These end up in the bss segment in RAM)
216 ============================================================================
217*/
218
[7258c6a]219int8_t argsep; /* argument separator */
[f40a309]220
[7258c6a]221int8_t *aptr, /* argument pointer */
[f40a309]222 *monptr, /* monitored variable pointer */
223 *d_cur, /* dump current from */
224 *d_next, /* dump next from */
225 *d_last, /* dump next to */
226 *p_end, /* end parameter */
227 *p_from, /* from parameter */
228 *p_to, /* to parameter */
229 *sptr; /* string scan pointer */
230
[7258c6a]231int16_t argln, /* argument length */
[f40a309]232 b0flag, /* breakpoint 0 flag */
233 b1flag, /* breakpoint 1 flag */
234 cmdunit, /* command unit */
235 dflag, /* dump limit flag */
236 exflag, /* exit do_cmd flag */
237 first1, /* first time flag */
238 goflag, /* pc set flag */
239 ilast, /* index of last command */
240 inext, /* command index for "next" command */
241 iplev, /* ROMP IPL level */
242 monsw, /* monitor switch */
243 redo, /* re-doable command flag */
244 rnum, /* register number */
245 vrnum; /* video register number */
246
247#if ON_B700
[7258c6a]248int16_t asig, /* signal number */
[f40a309]249 aval, /* signal value */
250 astat, /* signal status */
251 aflag, /* signal activity flag */
252 baseled, /* base LED for scan */
253 ledcntr; /* LED scan counter */
254
[7258c6a]255int16_t sigtab[128][2]; /* signal table */
[f40a309]256
[7258c6a]257int32_t afi, /* analog FIFO input */
[f40a309]258 ftimer; /* analog FIFO clear timer */
259
[7258c6a]260uint16_t baron, /* bar 'on' color */
[f40a309]261 baroff, /* bar 'off' color */
262 swon, /* switch 'on' color */
[8c8b4e5]263 swoff; /* switch 'off' color */
264
265volatile uint16_t *obj0; /* object pointer */
[f40a309]266#endif
267
[7258c6a]268uint16_t *tba0, /* breakpoint 0 temporary */
[5117699]269 *tba1; /* breakpoint 1 temporary */
[f40a309]270
[7258c6a]271uint16_t p_bv0, /* breakpoint 0 value */
[5117699]272 p_bv1; /* breakpoint 1 value */
[f40a309]273
[7258c6a]274uint16_t *p_ba0, /* breakpoint 0 address */
[5117699]275 *p_ba1; /* breakpoint 1 address */
[f40a309]276
277jmp_buf restart; /* jmp environment */
278
[add86dd]279int32_t p_goto, /* goto parameter */
280 p_len, /* length parameter */
[f40a309]281 p_value, /* value parameter */
282 p_width; /* width parameter */
283
284struct regs *regptr; /* register save area pointer */
285
[7258c6a]286int8_t argstr[MAXARGLN+1], /* argument string */
[f40a309]287 cmdline[MAXCMDLN+1], /* command line */
288 bfname[MAXFNLN+1], /* boot file name */
289 hs_mtst[MAXHS+1], /* mtest help string */
290 idbuf[MAXID+1], /* ID string */
291 promdate[PDATELN+1]; /* PROM date area */
292
293/*
294 ============================================================================
295 cx_exit -- restart ROMP
296 ============================================================================
297*/
298
[298f0b4]299int16_t cx_exit(void)
[f40a309]300{
301 longjmp(&restart, 1); /* restart ROMP */
[298f0b4]302 return(TRUE); /* not reached */
[f40a309]303}
304
305/*
306 ============================================================================
307 cx_rest -- execute the reset command
308 ============================================================================
309*/
310
[298f0b4]311int16_t cx_rest(void)
[f40a309]312{
[add86dd]313 rjumpto((void *)ROMADDR);
[298f0b4]314 return(TRUE); /* not reached */
[f40a309]315}
316
317/*
318 ============================================================================
319 cx_mlod() -- execute the midas command
320 ============================================================================
321*/
322
[7258c6a]323int16_t cx_mlod(void)
[f40a309]324{
[7258c6a]325 register int16_t i;
[f40a309]326
327 B_log_s = TRUE;
328 B_dbg_s = FALSE;
329 redo = FALSE;
330
331 hdvini();
332 _bpbin = FALSE;
333
334 if (booter("midas.abs", 0L)) {
335
336 return(FALSE);
337
338 } else {
339
[298f0b4]340 for (i = 0; i < 8; i++) /* clear d0..d7 */
[f40a309]341 regptr->d_reg[i] = 0L;
342
[298f0b4]343 for (i = 0; i < 7; i++) /* clear a0..a6 */
344 regptr->a_reg[i] = 0L;
[f40a309]345
[298f0b4]346 regptr->a_reg[7] = ISTACK; /* setup initial stack */
[f40a309]347
[298f0b4]348 regptr->reg_sr = INITSR; /* setup sr */
349 regptr->reg_pc = (uint32_t)B_buf_a; /* setup pc */
[f40a309]350
351 return(TRUE);
352 }
353}
354
355/*
356 ============================================================================
357 cp_boot() -- parse boot command
358 ============================================================================
359*/
360
[7258c6a]361int16_t cp_boot(void)
[f40a309]362{
[7258c6a]363 register int16_t i;
364 register int8_t endc;
[f40a309]365
366 redo = FALSE;
367
368 for (;;) {
369
370 writeln(cmdunit, "File name: ");
[5117699]371 endc = (int8_t)getln(cmdunit, MAXFNLN+1, bfname);
[f40a309]372 writeln(cmdunit, CRLF);
373
374 if (endc EQ A_CR)
375 break;
376
377 if (endc EQ CTL('X')) {
378
379 writeln(cmdunit, CANNED);
380 return(FALSE);
381 }
382
383 if (endc EQ ERR01)
384 writeln(cmdunit, EMSG2);
385 }
386
387 for (i = 0; i < MAXFNLN+1; i++)
388 if (bfname[i] EQ A_CR)
389 bfname[i] = '\0';
390
391 return(TRUE);
392}
393
394/*
395 ============================================================================
396 cx_boot() -- execute boot command
397 ============================================================================
398*/
399
[7258c6a]400int16_t cx_boot(void)
[f40a309]401{
[7258c6a]402 register int16_t i;
[f40a309]403
404 B_log_s = TRUE;
405 B_dbg_s = FALSE;
406
407 hdvini();
408 _bpbin = FALSE;
409
410 if (booter(bfname, 0L)) {
411
412 return(FALSE);
413
414 } else {
415
[add86dd]416 for (i = 0; i < 8; i++) /* clear d0..d7 */
[f40a309]417 regptr->d_reg[i] = 0L;
418
[add86dd]419 for (i = 0; i < 7; i++) /* clear a0..a6 */
[298f0b4]420 regptr->a_reg[i] = 0L;
[f40a309]421
[add86dd]422 regptr->a_reg[7] = ISTACK; /* setup initial stack */
[f40a309]423
[add86dd]424 regptr->reg_sr = INITSR; /* setup sr */
425 regptr->reg_pc = (uint32_t)B_buf_a; /* setup pc */
[f40a309]426
427 return(TRUE);
428 }
429}
430
431/*
432 =============================================================================
433 dobar(nb, bv) -- draw bar 'nb' with value 'bv'
434 =============================================================================
435*/
436
[7258c6a]437void dobar(int16_t nb, int16_t bv)
[f40a309]438{
[8c8b4e5]439 volatile uint16_t *bp;
440 int16_t i;
[f40a309]441
442 if ((nb LT 1) OR (nb GT 82))
443 return;
444
445 --nb;
[7258c6a]446 bp = obj0 + BARBASE + (int32_t)(sigadr[nb] + MARGIN + nb);
[f40a309]447
448 for (i = 127; i GE 0; --i) {
449
450 if (i GT bv) {
451
452 *bp = baroff;
453 bp += 128L;
454 *bp = baroff;
455
456 } else {
457
458 *bp = baron;
459 bp += 128L;
460 *bp = baron;
461 }
462
463 bp += 128L;
464 }
465}
466
467/*
468 =============================================================================
469 dosw(nb, sv) -- display value 'sv' of switch 'nb'
470 =============================================================================
471*/
472
[7258c6a]473void dosw(int16_t nb, int16_t sv)
[f40a309]474{
[8c8b4e5]475 volatile uint16_t *bp;
476 uint16_t j;
477 int16_t i;
[f40a309]478
479 if ((nb LT 1) OR (nb GT 82))
480 return;
481
482 --nb;
[7258c6a]483 bp = obj0 + SWBASE + (int32_t)(sigadr[nb] + MARGIN + nb);
[f40a309]484
485 if (sv)
486 j = swon;
487 else
488 j = swoff;
489
490 for (i = 0; i < 8; i++) {
491
492 *bp = j;
493 bp += 128L;
494 }
495}
496
497/*
498 =============================================================================
499 exp_c() -- expand a 4 bit color into a 16 bit word
500 =============================================================================
501*/
502
[432327d]503uint16_t exp_c(int16_t c)
[f40a309]504{
[432327d]505 uint16_t r;
[f40a309]506
[432327d]507 r = (uint16_t)c & 0x000F;
508 r |= r << 4;
509 r |= r << 8;
510
511 return(r);
[f40a309]512}
513
514/*
515 =============================================================================
516 cx_adsp() -- display values of analog processor variables as a bar graph
517 =============================================================================
518*/
519
[7258c6a]520int16_t cx_adsp(void)
[f40a309]521{
[8c8b4e5]522 int16_t xasig, xastat, xaval;
523 int32_t xafi;
524 int32_t lc;
525 volatile uint16_t *bp;
[7258c6a]526 int16_t i, j, k;
527 int16_t oldi;
[f40a309]528
529 memsetw(sigtab, 0, sizeof sigtab / 2);
530
531 VHinit();
532 VSinit();
533 vsndpal(dfltpal);
534
[8c8b4e5]535 obj0 = (volatile uint16_t *)0x200400L;
[f40a309]536
537 SetObj(0, 0, 0, obj0, 512, 350, 0, 0, (V_RES3 | V_TDE), -1);
538
539 bp = obj0;
540
541 for (lc = 0; lc < 44800; lc++)
542 *bp++ = 0x0000;
543
544 baron = 0x0FFF & exp_c(P_WHT);
545 baroff = 0x0FFF & exp_c(P_DKGRY);
546 swon = 0x0FFF & exp_c(P_YEL);
547 swoff = 0x0FFF & exp_c(P_DKGRY);
548
549 SetPri(0, 7);
550
551 for (i = 1; i < 83; i++) {
552
553 dobar(i, 0);
554 dosw(i, 0);
555 }
556
557 oldi = setipl(2);
558
559 while (0L EQ BIOS(B_RDAV, CON_DEV)) {
560
561 if (-1L NE (xafi = XBIOS(X_ANALOG))) {
562
563 xasig = 0x007F & (xafi >> 8);
564 xastat = 0x0001 & (xafi >> 7);
565 xaval = 0x007F & xafi;
566
567 if (xasig) {
568
569 sigtab[xasig][0] = xaval;
570 sigtab[xasig][1] = xastat;
571
572 if (xasig LT 83) {
573
574 dobar(xasig, xaval);
575 dosw(xasig, xastat);
576 }
577
578 } else {
579
580 for (i = 0; i < 83; i++)
581 sigtab[i][1] = 0;
582 }
583 }
584 }
585
586 BIOS(B_GETC, CON_DEV);
587
588 for (j = 1; j < 83; j++) {
589
590 dobar(j, sigtab[j][0]);
591 dosw(j, sigtab[j][1]);
592 }
593
594 k = 0;
595
596 printf("\n");
597 printf(" x0 x1 x2 x3 x4 x5 x6 x7 x8 x9\r\n");
598 printf(" ----- ----- ----- ----- ----- ----- ----- ----- ----- -----\r\n");
[7848656]599
[f40a309]600 for (i = 0; i < 9; i++ ) {
601
602 printf("%01dx ", k/10);
603
604 for (j = 0; j < 10; j++) {
605
606 if (k)
607 printf("%1d:%3d ", sigtab[k][1], sigtab[k][0]);
608 else
609 printf(" ");
610
611 if (++k EQ 83)
612 goto outofit;
613 }
614
615 printf("\n");
616 }
617
618outofit:
619
620 printf("\nTempo = %3d, Time = %3d, Tuning = %3d, Level = %3d\n",
621 sigtab[I_TEMPO][0], sigtab[I_TIME][0],
622 sigtab[I_TUNE][0], sigtab[I_LEVEL][0]);
623
624 printf("LongPot L = %3d, LongPot R = %3d, Scroll = %3d\n",
625 sigtab[I_LONGL][0], sigtab[I_LONGR][0],
626 sigtab[I_SCROLL][0]);
627
628 printf("Tablet X = %3d, Tablet Y = %3d\n",
629 sigtab[I_TABX][0], sigtab[I_TABY][0]);
630
631 printf("Cursor X = %3d, Cursor Y = %3d\n",
632 sigtab[I_CURX][0], sigtab[I_CURY][0]);
633
634 setipl(oldi);
635 return(TRUE);
636}
637
638/*
639 =============================================================================
[6262b5c]640 waitcr2() -- wait for a CR from CON_DEV
[f40a309]641 Returns: 0 = continue
642 1 = ^G hit - abort
643 =============================================================================
644*/
645
[6262b5c]646int16_t waitcr2(void)
[f40a309]647{
[7258c6a]648 int8_t c;
[f40a309]649
650 BIOS(B_PUTC, CON_DEV, '\007');
651
652 while ('\r' NE (c = (0x7F & BIOS(B_GETC, CON_DEV)))) {
653
654 if (c EQ '\007')
655 return(1);
656 }
657
658 return(0);
659}
660
661/*
662 ============================================================================
663 xdtoi -- convert hex ASCII to an int digit
664 ============================================================================
665*/
666
[7258c6a]667int16_t xdtoi(int16_t c)
[f40a309]668{
[7258c6a]669 register int16_t i;
670 register int8_t *ap = &ahex[0];
[f40a309]671
672 for (i = 0; i < 22; i++)
[5117699]673 if (c EQ *ap++) {
[f40a309]674 if (i >15)
675 return(i - 6);
676 else
677 return(i);
[5117699]678 }
[f40a309]679
680 return(-1);
681}
682
683/*
684 ============================================================================
685 getcmd -- parse command from input line
686 ============================================================================
687*/
688
[7258c6a]689int16_t getcmd(void)
[f40a309]690{
[7258c6a]691 register int16_t c;
[f40a309]692
693 sptr = cmdline;
694 argln = 0;
695 aptr = argstr;
696 memset(argstr, 0, MAXARGLN+1);
697
698 do {
699
700 switch (c = 0x00FF & *sptr) {
701
702 case '\0':
703 case A_CR:
704 case A_LF:
705
[5117699]706 argsep = (int8_t)c;
[f40a309]707 return(argln);
708
709 case ' ':
710
711 ++sptr;
712
713 while (*sptr EQ ' ')
714 ++sptr;
715
716 if (*sptr EQ A_CR OR *sptr EQ A_LF OR *sptr EQ '\0')
717 c = 0x00FF & *sptr;
718
[5117699]719 argsep = (int8_t)c;
[f40a309]720 return(argln);
721
722 default:
723
724 if (isupper(c))
725 c = _tolower(c);
726
[5117699]727 *aptr++ = (int8_t)c;
[f40a309]728 ++sptr;
729 ++argln;
730 }
731
732 } while (*sptr);
733
734 argsep = 0;
735 return(argln);
736}
737
738/*
739 ============================================================================
740 getarg -- parse out an argument to analyze
741 ============================================================================
742*/
743
[7258c6a]744int16_t getarg(void)
[f40a309]745{
[7258c6a]746 register int16_t c;
[f40a309]747
748 argln = 0;
749 aptr = argstr;
750 memset(argstr, 0, MAXARGLN+1);
751
752 do {
753
754 switch (c = 0x00FF & *sptr) {
755
756 case '\0':
757 case A_CR:
758 case A_LF:
759
[5117699]760 argsep = (int8_t)c;
[f40a309]761 return(argln);
762
763 case ' ':
764
765 ++sptr;
766
767 while (*sptr EQ ' ')
768 ++sptr;
769
770 if (*sptr EQ A_CR OR *sptr EQ A_LF OR *sptr EQ '\0')
771 c = 0x00FF & *sptr;
772
[5117699]773 argsep = (int8_t)c;
[f40a309]774 return(argln);
775
776 case ',':
777
778 ++sptr;
[5117699]779 argsep = (int8_t)c;
[f40a309]780 return(argln);
781
782 default:
783
[5117699]784 *aptr++ = (int8_t)c;
[f40a309]785 ++sptr;
786 ++argln;
787 }
788
789 } while (*sptr);
790
791 argsep = 0;
792 return(argln);
793}
794
795/*
796 ============================================================================
797 getlong -- get a long integer (either hex or decimal)
798 ============================================================================
799*/
800
[7258c6a]801int16_t getlong(int32_t *var)
[f40a309]802{
[7258c6a]803 register int32_t temp = 0L;
804 register int16_t csw = FALSE,
[f40a309]805 c;
806
807 if (*aptr EQ '$') {
808
809 ++aptr;
810
811 while (isxdigit(c = *aptr++)) {
812
813 temp = (temp << 4) + xdtoi(c);
814 csw = TRUE;
815 }
816
817 } else {
818
819 while (isdigit(c = *aptr++)) {
820
821 temp = (temp * 10) + (c - '0');
822 csw = TRUE;
823 }
824 }
825
826 if (csw)
827 *var = temp;
828
829 return(c);
830}
831
832/*
833 ============================================================================
834 setvar -- parse an expression and set a long variable
835 ============================================================================
836*/
837
[7258c6a]838int16_t setvar(int32_t *var, int32_t deflt)
[f40a309]839{
[7258c6a]840 int16_t rc;
841 int32_t temp;
[f40a309]842
843 *var = deflt;
844 aptr = argstr;
845
846 rc = getlong(var);
847
848 if (rc) {
849
850 do {
851
852 switch (rc) {
853
854 case '+':
855
856 temp = 0L;
857 rc = getlong(&temp);
858 *var = *var + temp;
859 continue;
860
861 case '-':
862
863 temp = 0L;
864 rc = getlong(&temp);
865 *var = *var - temp;
866 continue;
867
868 default:
869
870 *var = deflt;
871 return(FALSE);
872 }
873
874 } while (rc);
875
876 return(TRUE);
877 }
878
879 return(TRUE);
880}
881
[7d4cf30]882/*
883 ============================================================================
884 setp -- parse an expression and set a pointer variable
885 ============================================================================
886*/
887
888int16_t setp(void *var, void *deflt)
889{
890 return setvar((int32_t *)var, (int32_t)deflt);
891}
892
[f40a309]893/*
894 ============================================================================
895 putn -- output a decimal number
896 ============================================================================
897*/
898
[298f0b4]899void putn(uint32_t num, int16_t cw, int16_t unit)
[f40a309]900{
[7258c6a]901 register int16_t d;
[f40a309]902
903 if (!cw)
904 return;
905
906 putn(num/10, cw-1, unit);
907
[5117699]908 d = (int16_t)(num % 10);
[f40a309]909
910 BIOS(B_PUTC, unit, (d + '0'));
911
912 return;
913}
914
915/*
916 ============================================================================
917 puthn -- output a hex number
918 ============================================================================
919*/
920
[298f0b4]921void puthn(uint32_t num, int16_t cw, int16_t unit)
[f40a309]922{
[7258c6a]923 register int16_t d;
[f40a309]924
925 if (!cw)
926 return;
927
928 puthn(num >> 4, cw-1, unit);
929
930 d = 0x0F & num;
931
932 if (d > 9)
933 BIOS(B_PUTC, unit, (d - 10 + 'A'));
934 else
935 BIOS(B_PUTC, unit, (d + '0'));
936
937 return;
938}
939
940/*
941 ============================================================================
942 ddump -- do the hex portion of a dump
943 ============================================================================
944*/
945
[7258c6a]946int16_t ddump(int8_t *loc, int8_t *lastloc, int16_t nwide, int16_t unit)
[f40a309]947{
948 while (nwide--) {
949
[298f0b4]950 puthn((uint32_t)(0xFF & *loc), 2, unit);
[f40a309]951 BIOS(B_PUTC, unit, ' ');
952
953 if (BIOS(B_RDAV, unit)) {
954
955 BIOS(B_GETC, unit);
956 return(TRUE);
957 }
958
959 if (loc EQ lastloc) {
960
961 dflag = TRUE;
962 return(FALSE);
963 }
964
965 ++loc;
966 }
967
968
969 return(FALSE);
970}
971
972/*
973 ============================================================================
974 padr -- print dump address
975 ============================================================================
976*/
977
[add86dd]978void padr(void *adr, int16_t unit)
[f40a309]979{
[298f0b4]980 puthn((uint32_t)adr, 8, unit);
[f40a309]981 BIOS(B_PUTC, unit, ' ');
982 BIOS(B_PUTC, unit, '-');
983 BIOS(B_PUTC, unit, ' ');
984}
985
986/*
987 ============================================================================
988 dtext -- do the text portion of a dump
989 ============================================================================
990*/
991
[7258c6a]992int16_t dtext(int8_t *loc, int8_t *lastloc, int16_t nwide, int16_t unit)
[f40a309]993{
[7258c6a]994 register int16_t c;
[f40a309]995
996 BIOS(B_PUTC, unit, ' ');
997 BIOS(B_PUTC, unit, '|');
998
999 while (nwide--) {
1000
1001 c = 0xFF & *loc;
1002
1003 if (isascii(c) AND isprint(c))
1004 BIOS(B_PUTC, unit, c);
1005 else
1006 BIOS(B_PUTC, unit, '.');
1007
1008 if (BIOS(B_RDAV, unit)) {
1009
1010 BIOS(B_GETC, unit);
1011 BIOS(B_PUTC, unit, '|');
1012 return(TRUE);
1013 }
1014
1015 if (loc EQ lastloc) {
1016
1017 BIOS(B_PUTC, unit, '|');
1018 return(FALSE);
1019 }
1020
1021 ++loc;
1022 }
1023
1024 BIOS(B_PUTC, unit, '|');
1025 return(FALSE);
1026}
1027
1028/*
1029 ============================================================================
1030 cp_mset -- parse parameters for mset command
1031 ============================================================================
1032*/
1033
[7258c6a]1034int16_t cp_mset(void)
[f40a309]1035{
1036 redo = FALSE;
1037
1038 if (0 EQ getarg())
1039 return(FALSE);
1040
1041 if (argsep NE ',')
1042 return(FALSE);
1043
[7d4cf30]1044 if (setp(&p_from, p_from) EQ FALSE)
[f40a309]1045 return(FALSE);
1046
1047 return(TRUE);
1048}
1049
1050/*
1051 ============================================================================
1052 cx_mset -- execute the mset command
1053 ============================================================================
1054*/
1055
[7258c6a]1056int16_t cx_mset(void)
[f40a309]1057{
1058 while (TRUE) {
1059
1060 if (getarg())
1061 if (setvar(&p_value, p_value) EQ FALSE)
1062 return(FALSE);
1063
1064 if (p_value & ~0xFFL)
1065 return(FALSE);
1066
[5117699]1067 *p_from++ = (int8_t)(0xFF & p_value);
[f40a309]1068
1069 if (argsep EQ A_CR)
1070 return(TRUE);
1071 }
1072}
1073
1074/*
1075 ============================================================================
1076 cp_wset -- parse parameters for wset command
1077 ============================================================================
1078*/
1079
[7258c6a]1080int16_t cp_wset(void)
[f40a309]1081{
1082 redo = FALSE;
1083
1084 if (0 EQ getarg())
1085 return(FALSE);
1086
1087 if (argsep NE ',')
1088 return(FALSE);
1089
[7d4cf30]1090 if (setp(&p_from, p_from) EQ FALSE)
[f40a309]1091 return(FALSE);
1092
[7258c6a]1093 if ((int32_t)p_from & 1L)
[f40a309]1094 return(FALSE);
1095
1096 return(TRUE);
1097}
1098
1099/*
1100 ============================================================================
1101 cx_wset -- execute the wset command
1102 ============================================================================
1103*/
1104
[7258c6a]1105int16_t cx_wset(void)
[f40a309]1106{
[7258c6a]1107 uint16_t *p_uint;
[f40a309]1108
[7258c6a]1109 p_uint = (uint16_t *)p_from;
[f40a309]1110
1111 while (TRUE) {
1112
1113 if (getarg())
1114 if (setvar(&p_value, p_value) EQ FALSE)
1115 return(FALSE);
1116
1117 if (p_value & ~0xFFFFL)
1118 return(FALSE);
1119
[5117699]1120 *p_uint++ = (uint16_t)(0xFFFF & p_value);
[f40a309]1121
1122 if (argsep EQ A_CR)
1123 return(TRUE);
1124 }
1125}
1126
1127/*
1128 ============================================================================
1129 cp_mtst -- parse mtest command arguments
1130 ============================================================================
1131*/
1132
[7258c6a]1133int16_t cp_mtst(void)
[f40a309]1134{
1135 inext = ilast;
1136
1137 if (argsep EQ A_CR OR argsep EQ '\0') {
1138
[7258c6a]1139 p_from = (int8_t *)0x00000008L;
1140 p_to = (int8_t *)USER_RAM - 2L;
[f40a309]1141 return(TRUE);
1142 }
1143
1144 if (getarg())
[7d4cf30]1145 if (setp(&p_from, (int8_t *)USER_RAM) EQ FALSE)
[f40a309]1146 return(FALSE);
1147
1148 if (argsep NE ',')
1149 return(FALSE);
1150
1151 if (getarg())
[7d4cf30]1152 if (setp(&p_to, (int8_t *)RAM_TOP) EQ FALSE)
[f40a309]1153 return(FALSE);
1154
[7258c6a]1155 if ((int32_t)p_from & 1L)
[f40a309]1156 return(FALSE);
1157
[7258c6a]1158 if ((int32_t)p_to & 1L)
[f40a309]1159 return(FALSE);
1160
1161 if (p_from GT p_to)
1162 return(FALSE);
1163
1164 return(TRUE);
1165}
1166
1167/*
1168 ============================================================================
1169 cx_mtst -- execute the mtest command
1170 ============================================================================
1171*/
1172
[7258c6a]1173int16_t cx_mtst(void)
[f40a309]1174{
[7258c6a]1175 register int16_t mask, was, *loc, *eloc, *oldloc;
[f40a309]1176
1177 mask = 0x0001;
[7258c6a]1178 loc = (int16_t *)p_from;
1179 eloc = (int16_t *)p_to;
[f40a309]1180 oldloc = loc;
1181
[7258c6a]1182 if (p_from LT (int8_t *)USER_RAM)
[f40a309]1183 setipl(7);
1184
1185 do {
1186
1187 while (mask) {
1188
1189 *loc = mask;
1190
[5117699]1191 if (mask NE (was = *loc)) {
[7258c6a]1192 if (p_from LT (int8_t *)USER_RAM)
[f40a309]1193 halt();
1194 else
1195 printf("%08lX was %04X, expected %04X\r\n",
1196 loc, was, mask);
[5117699]1197 }
[f40a309]1198
1199 *loc = ~mask;
1200
[5117699]1201 if (~mask NE (was = *loc)) {
[7258c6a]1202 if (p_from LT (int8_t *)USER_RAM)
[f40a309]1203 halt();
1204 else
1205 printf("%08lX was %04X, expected %04X\r\n",
1206 loc, was, ~mask);
[5117699]1207 }
[f40a309]1208
1209 mask <<= 1;
1210 }
1211
1212 mask = 0x0001;
1213 loc++;
1214
1215 } while (loc LE eloc);
1216
[7258c6a]1217 if (oldloc LT (int16_t *)USER_RAM)
[add86dd]1218 rjumpto((void *)ROMADDR);
[f40a309]1219
1220 return(TRUE);
1221}
1222
1223/*
1224 ============================================================================
1225 cp_go -- parse parameters for go command
1226 ============================================================================
1227*/
1228
[7258c6a]1229int16_t cp_go(void)
[f40a309]1230{
1231 redo = FALSE;
1232 b0flag = FALSE;
1233 b1flag = FALSE;
1234 goflag = FALSE;
1235
1236 if (getarg()) {
1237
[add86dd]1238 if (setvar(&p_goto, p_goto) EQ FALSE)
[f40a309]1239 return(FALSE);
1240
[add86dd]1241 if (1L & p_goto)
[f40a309]1242 return(FALSE);
1243
1244 goflag = TRUE;
1245
1246 }
1247
1248 if (getarg()) {
1249
[7d4cf30]1250 if (setp(&tba0, NULL) EQ FALSE)
[f40a309]1251 return(FALSE);
1252
[7258c6a]1253 if (1L & (int32_t)tba0)
[f40a309]1254 return(FALSE);
1255
1256 b0flag = TRUE;
1257 }
1258
1259 if (getarg()) {
1260
[7d4cf30]1261 if (setp(&tba1, NULL) EQ FALSE)
[f40a309]1262 return(FALSE);
1263
[7258c6a]1264 if (1L & (int32_t)tba1)
[f40a309]1265 return(FALSE);
1266
1267 b1flag = TRUE;
1268 }
1269
1270 return(TRUE);
1271}
1272
1273#if ON_B700
1274
1275/*
1276 ============================================================================
1277 cx_dini() -- execute the dinit command
1278 ============================================================================
1279*/
1280
[7258c6a]1281int16_t cx_dini(void)
[f40a309]1282{
1283 redo = TRUE;
1284 hdvini();
1285 return(TRUE);
1286}
1287
1288#endif
1289
1290/*
1291 ============================================================================
1292 cx_zap -- execute the zap command
1293 ============================================================================
1294*/
1295
[298f0b4]1296int16_t cx_zap(void)
[f40a309]1297{
[7258c6a]1298 register int16_t *p, *q;
[f40a309]1299
[7258c6a]1300 p = (int16_t *)USER_RAM;
1301 q = (int16_t *)RAM_TOP;
[f40a309]1302
1303 setipl(7);
1304
1305 while (p LE q)
1306 *p++ = 0;
1307
[add86dd]1308 rjumpto((void *)ROMADDR);
[298f0b4]1309 return(TRUE); /* not reached */
[f40a309]1310}
1311
1312/*
1313 ============================================================================
1314 cx_omap() -- execute the omap command
1315 ============================================================================
1316*/
1317
[7258c6a]1318int16_t cx_omap(void)
[f40a309]1319{
[7258c6a]1320 register int16_t i, width, xloc;
[f40a309]1321
1322 printf("Pr B/C Locn Wd Xloc Flags\r\n");
1323
1324 for (i = 0; i < 16; i++) {
1325
[5117699]1326 xloc = (int16_t)(v_odtab[i][1] & 0x03FF);
[f40a309]1327
1328 if (xloc & 0x0200) /* sign extend xloc */
[5117699]1329 xloc = xloc - 0x400;
[f40a309]1330
[5117699]1331 width = (int16_t)((v_odtab[i][1] >> 10) & 0x003F);
[f40a309]1332
1333 printf("%2d %s ",
1334 i, ((v_odtab[i][0] & V_CBS) ? "Chr" : "Bit"));
1335
1336 printf("$%08lX %2d %4d ",
[7258c6a]1337 ((int32_t)v_odtab[i][2] << 1), width, xloc);
[f40a309]1338
1339 printf("$%04X\r\n", v_odtab[i][0]);
1340 }
1341
1342 return(TRUE);
1343}
1344
1345/*
1346 ============================================================================
1347 cx_help -- execute the help command
1348 ============================================================================
1349*/
1350
[7258c6a]1351int16_t cx_help(void)
[f40a309]1352{
[7258c6a]1353 int16_t i, j;
[f40a309]1354
1355 j = 0;
1356
1357 writeln(cmdunit, CRLF);
1358
[5117699]1359 for (i = 0; i < (int16_t)NCMDS; i++) {
[f40a309]1360
1361 if (j++ EQ 22) {
1362
1363 j = 0;
1364
[6262b5c]1365 if (waitcr2())
[f40a309]1366 return(TRUE);
1367 }
1368
1369 writeln(cmdunit, " ");
1370 writeln(cmdunit, cmtab[i].cname);
1371 writeln(cmdunit, " ");
1372 writeln(cmdunit, cmtab[i].hstr);
1373 writeln(cmdunit, CRLF);
1374 }
1375
1376 writeln(cmdunit, CRLF);
1377 return(TRUE);
1378}
1379
1380/*
1381 ============================================================================
1382 cx_bpb -- execute bpb command
1383 ============================================================================
1384*/
1385
[7258c6a]1386int16_t cx_bpb(void)
[f40a309]1387{
1388 register struct bpb *bpp;
1389
1390 if (0L EQ (bpp = (struct bpb *)BIOS(B_GBPB, 0) ) ) {
1391
1392 writeln(cmdunit, "\r\n\nERROR -- Unable to read BPB\r\n\n");
1393 return(FALSE);
1394
1395 } else {
1396
1397 writeln(cmdunit, "\r\n\nBPB values:\r\n");
1398 writeln(cmdunit, "\r\n recsiz ");
[298f0b4]1399 putn((uint32_t)bpp->recsiz, 5, cmdunit);
[f40a309]1400 writeln(cmdunit, "\r\n clsiz ");
[298f0b4]1401 putn((uint32_t)bpp->clsiz, 4, cmdunit);
[f40a309]1402 writeln(cmdunit, "\r\n clsizb ");
[298f0b4]1403 putn((uint32_t)bpp->clsizb, 5, cmdunit);
[f40a309]1404 writeln(cmdunit, "\r\n rdlen ");
[298f0b4]1405 putn((uint32_t)bpp->rdlen, 4, cmdunit);
[f40a309]1406 writeln(cmdunit, "\r\n fsiz ");
[298f0b4]1407 putn((uint32_t)bpp->fsiz, 4, cmdunit);
[f40a309]1408 writeln(cmdunit, "\r\n fatrec ");
[298f0b4]1409 putn((uint32_t)bpp->fatrec, 5, cmdunit);
[f40a309]1410 writeln(cmdunit, "\r\n datrec ");
[298f0b4]1411 putn((uint32_t)bpp->datrec, 5, cmdunit);
[f40a309]1412 writeln(cmdunit, "\r\n numcl ");
[298f0b4]1413 putn((uint32_t)bpp->numcl, 5, cmdunit);
[f40a309]1414 writeln(cmdunit, "\r\n bflags ");
[298f0b4]1415 puthn((uint32_t)bpp->bflags, 4, cmdunit);
[f40a309]1416 writeln(cmdunit, "\r\n ntracks ");
[298f0b4]1417 putn((uint32_t)bpp->ntracks, 4, cmdunit);
[f40a309]1418 writeln(cmdunit, "\r\n nsides ");
[298f0b4]1419 putn((uint32_t)bpp->nsides, 4, cmdunit);
[f40a309]1420 writeln(cmdunit, "\r\n sec/cyl ");
[298f0b4]1421 putn((uint32_t)bpp->dspc, 5, cmdunit);
[f40a309]1422 writeln(cmdunit, "\r\n sec/trk ");
[298f0b4]1423 putn((uint32_t)bpp->dspt, 5, cmdunit);
[f40a309]1424 writeln(cmdunit, "\r\n hidden ");
[298f0b4]1425 putn((uint32_t)bpp->hidden, 4, cmdunit);
[f40a309]1426 writeln(cmdunit, "\r\n\n");
1427 return(TRUE);
1428 }
1429}
1430
1431/*
1432 ============================================================================
1433 cx_go -- execute the go command
1434 ============================================================================
1435*/
1436
[7258c6a]1437int16_t cx_go(void)
[f40a309]1438{
1439 redo = FALSE;
1440 exflag = TRUE;
1441 wzcrsh = FALSE;
1442
1443 if (goflag)
[5117699]1444 regptr->reg_pc = (uint32_t)p_goto;
[f40a309]1445
1446 if (b0flag ) {
1447
1448 if (p_ba0) {
1449
[7258c6a]1450 if (*p_ba0 NE (uint16_t)BPINST) {
[f40a309]1451
1452 writeln(cmdunit, "\r\n\n** Breakpoint 0 at ");
[298f0b4]1453 puthn((uint32_t)p_ba0, 8, cmdunit);
[f40a309]1454 writeln(cmdunit, " was ");
[298f0b4]1455 puthn(0xFFFFL & (uint32_t)(*p_ba0), 4, cmdunit);
[f40a309]1456 writeln(cmdunit, " instead of ");
[298f0b4]1457 puthn(0xFFFFL & (uint32_t)BPINST, 4, cmdunit);
[f40a309]1458 writeln(cmdunit, " **\r\n\n");
1459 }
1460
1461 *p_ba0 = p_bv0;
1462 }
1463
1464 p_ba0 = tba0;
1465 p_bv0 = *p_ba0;
[7258c6a]1466 *p_ba0 = (uint16_t)BPINST;
[f40a309]1467 }
1468
1469 if (b1flag ) {
1470
1471 if (p_ba1) {
1472
[7258c6a]1473 if (*p_ba1 NE (uint16_t)BPINST) {
[f40a309]1474
1475 writeln(cmdunit, "\r\n\n** Breakpoint 1 at ");
[298f0b4]1476 puthn((uint32_t)p_ba1, 8, cmdunit);
[f40a309]1477 writeln(cmdunit, " was ");
[298f0b4]1478 puthn(0xFFFFL & (uint32_t)(*p_ba1), 4, cmdunit);
[f40a309]1479 writeln(cmdunit, " instead of ");
[298f0b4]1480 puthn(0xFFFFL & (uint32_t)BPINST, 4, cmdunit);
[f40a309]1481 writeln(cmdunit, " **\r\n\n");
1482 }
1483
1484 *p_ba1 = p_bv1;
1485 }
1486
1487 p_ba1 = tba1;
1488 p_bv1 = *p_ba1;
[7258c6a]1489 *p_ba1 = (uint16_t)BPINST;
[f40a309]1490 }
1491
1492 return(TRUE);
1493}
1494
1495/*
1496 ============================================================================
1497 cp_dump -- parse dump parameters
1498 ============================================================================
1499*/
1500
[7258c6a]1501int16_t cp_dump(void)
[f40a309]1502{
1503 inext = ilast;
1504
1505 if (getarg())
[7d4cf30]1506 if (setp(&p_from, p_from) EQ FALSE) {
[f40a309]1507
1508 redo = FALSE;
1509 return(FALSE);
1510 }
1511
1512 if (argsep EQ A_CR OR argsep EQ '\0') {
1513
1514 p_to = p_from;
1515 p_width = 16L;
1516 redo = TRUE;
1517 return(TRUE);
1518 }
1519
1520 if (getarg())
[7d4cf30]1521 if (setp(&p_to, p_to) EQ FALSE) {
[f40a309]1522
1523 redo = FALSE;
1524 return(FALSE);
1525 }
1526
1527 if (argsep EQ A_CR OR argsep EQ '\0') {
1528
1529 p_width = 16L;
1530 redo = TRUE;
1531 return(TRUE);
1532 }
1533
1534 if (getarg())
1535 if (setvar(&p_width, p_width) EQ FALSE) {
1536
1537 redo = FALSE;
1538 return(FALSE);
1539 }
1540
1541 if ((p_width LE 0L) OR (p_width GT 16L)) {
1542
1543 p_width = 16L;
1544 redo = FALSE;
1545 return(FALSE);
1546 }
1547
1548 redo = TRUE;
1549 return(TRUE);
1550}
1551
1552/*
1553 ============================================================================
1554 cp_fill -- parse parameters for fill command
1555 ============================================================================
1556*/
1557
[7258c6a]1558int16_t cp_fill(void)
[f40a309]1559{
1560 redo = FALSE;
1561
1562 if (getarg())
[7d4cf30]1563 if (setp(&p_from, p_from) EQ FALSE)
[f40a309]1564 return(FALSE);
1565
1566 if (getarg())
1567 if (setvar(&p_len, p_len) EQ FALSE)
1568 return(FALSE);
1569
1570 if (getarg())
1571 if (setvar(&p_value, p_value) EQ FALSE)
1572 return(FALSE);
1573
1574 if (p_value & ~0xFFL)
1575 return(FALSE);
1576
1577 return(TRUE);
1578}
1579
1580/*
1581 ============================================================================
1582 cp_wfil -- parse parameters for wfill command
1583 ============================================================================
1584*/
1585
[7258c6a]1586int16_t cp_wfil(void)
[f40a309]1587{
1588 redo = FALSE;
1589
1590 if (getarg())
[7d4cf30]1591 if (setp(&p_from, p_from) EQ FALSE)
[f40a309]1592 return(FALSE);
1593
1594 if (getarg())
1595 if (setvar(&p_len, p_len) EQ FALSE)
1596 return(FALSE);
1597
1598 if (getarg())
1599 if (setvar(&p_value, p_value) EQ FALSE)
1600 return(FALSE);
1601
[7258c6a]1602 if ((int32_t)p_from & 1L)
[f40a309]1603 return(FALSE);
1604
1605 if (p_value & ~0xFFFFL)
1606 return(FALSE);
1607
1608 return(TRUE);
1609}
1610
1611/*
1612 ============================================================================
1613 cp_copy -- parse parameters for copy command
1614 ============================================================================
1615*/
1616
[7258c6a]1617int16_t cp_copy(void)
[f40a309]1618{
1619 redo = FALSE;
1620
1621 if (getarg())
[7d4cf30]1622 if (setp(&p_from, p_from) EQ FALSE)
[f40a309]1623 return(FALSE);
1624
1625 if (getarg())
[7d4cf30]1626 if (setp(&p_to, p_to) EQ FALSE)
[f40a309]1627 return(FALSE);
1628
1629 if (getarg())
1630 if (setvar(&p_len, p_len) EQ FALSE)
1631 return(FALSE);
1632
1633 return(TRUE);
1634}
1635
1636/*
1637 ============================================================================
1638 cp_chek -- parse parameters for chek command
1639 ============================================================================
1640*/
1641
[7258c6a]1642int16_t cp_chek(void)
[f40a309]1643{
1644 redo = FALSE;
1645
1646 if (getarg())
[7d4cf30]1647 if (setp(&p_from, p_from) EQ FALSE)
[f40a309]1648 return(FALSE);
1649
1650 if (getarg())
[7d4cf30]1651 if (setp(&p_to, p_to) EQ FALSE)
[f40a309]1652 return(FALSE);
1653
1654 return(TRUE);
1655}
1656
1657/*
1658 ============================================================================
1659 cp_read -- parse parameters for read command
1660 ============================================================================
1661*/
1662
[7258c6a]1663int16_t cp_read(void)
[f40a309]1664{
1665 redo = FALSE;
1666
1667 if (getarg())
[7d4cf30]1668 if (setp(&p_from, p_from) EQ FALSE)
[f40a309]1669 return(FALSE);
1670
1671 if (getarg())
[7d4cf30]1672 if (setp(&p_to, p_to) EQ FALSE)
[f40a309]1673 return(FALSE);
1674
1675 if (getarg())
1676 if (setvar(&p_len, p_len) EQ FALSE)
1677 return(FALSE);
1678
1679 if ((~0x7FFFL) & p_len)
1680 return(FALSE);
1681
[7258c6a]1682 if ((~0xFFFFL) & (int32_t)p_from)
[f40a309]1683 return(FALSE);
1684
1685 return(TRUE);
1686}
1687
1688/*
1689 ============================================================================
1690 cp_null -- parse null parameter line
1691 ============================================================================
1692*/
1693
[7258c6a]1694int16_t cp_null(void)
[f40a309]1695{
1696 return(TRUE);
1697}
1698
1699/*
1700 ============================================================================
1701 cp_rset -- parse rset command parameters
1702 ============================================================================
1703*/
1704
[7258c6a]1705int16_t cp_rset(void)
[f40a309]1706{
[7258c6a]1707 int16_t rc;
[f40a309]1708
1709 rc = 0;
1710 redo = FALSE;
1711
1712 if (0 EQ getarg())
1713 return(FALSE);
1714
1715 str2lc(argstr);
1716
1717 if (0 EQ (rc = strlcmp(argstr, rlist)))
1718 return(FALSE);
1719
1720 if (0 EQ getarg())
1721 return(FALSE);
1722
1723 if (FALSE EQ setvar(&p_value, 0L))
1724 return(FALSE);
1725
1726 rnum = rc;
1727 return(TRUE);
1728}
1729
[fa38804]1730
[f40a309]1731/*
1732 ============================================================================
1733 cx_chek -- process chek command
1734 ============================================================================
1735*/
1736
[7258c6a]1737int16_t cx_chek(void)
[f40a309]1738{
[7258c6a]1739 register int32_t csum;
1740 register int8_t *cp;
[f40a309]1741
1742 redo = FALSE;
1743 csum = 0L;
1744
1745 for (cp = p_from; cp LE p_to; cp++)
1746 csum += 0x000000FFL & *cp;
1747
1748 printf("Checksum = 0x%08lX\r\n", csum);
1749
1750 return(TRUE);
1751}
1752
1753/*
1754 ============================================================================
1755 cx_rset -- process rset command
1756 ============================================================================
1757*/
1758
[7258c6a]1759int16_t cx_rset(void)
[f40a309]1760{
1761 redo = FALSE;
1762
1763 if (rnum < 1)
1764 return(FALSE);
1765
1766 if (rnum < 9) { /* d0..d7 -- data register */
1767
[5117699]1768 regptr->d_reg[rnum-1] = (uint32_t)p_value;
[f40a309]1769 return(TRUE);
1770 }
1771
1772 if (rnum < 17) { /* a0..a7 -- address register */
1773
[5117699]1774 regptr->a_reg[rnum-9] = (uint32_t)p_value;
[f40a309]1775 return(TRUE);
1776 }
1777
1778 if (rnum EQ 17) { /* sr -- status register */
1779
1780 if ((~0xFFFFL) & p_value)
1781 return(FALSE);
1782
[7258c6a]1783 regptr->reg_sr = (uint16_t)p_value;
[f40a309]1784 return(TRUE);
1785 }
1786
1787 if (rnum EQ 18) { /* pc -- program counter */
1788
1789 if (1L & p_value)
1790 return(FALSE);
1791
[5117699]1792 regptr->reg_pc = (uint32_t)p_value;
[f40a309]1793 return(TRUE);
1794 }
1795
1796 if (rnum EQ 19) { /* sp -- stack pointer */
1797
1798 if (1L & p_value)
1799 return(FALSE);
1800
[5117699]1801 regptr->a_reg[7] = (uint32_t)p_value;
[f40a309]1802 return(TRUE);
1803 }
1804
1805 return(FALSE);
1806}
1807
1808/*
1809 ============================================================================
1810 cp_vrst -- parse vrset command parameters
1811 ============================================================================
1812*/
1813
[7258c6a]1814int16_t cp_vrst(void)
[f40a309]1815{
[7258c6a]1816 int16_t rc;
[f40a309]1817
1818 rc = 0;
1819 redo = FALSE;
1820
1821 if (0 EQ getarg())
1822 return(FALSE);
1823
1824 str2lc(argstr);
1825
1826 if (0 EQ (rc = strlcmp(argstr, vrlist)))
1827 return(FALSE);
1828
1829 if (0 EQ getarg())
1830 return(FALSE);
1831
1832 if (FALSE EQ setvar(&p_value, 0L))
1833 return(FALSE);
1834
1835 if (vrnum < 17) { /* complete register */
1836
1837 vrnum = rc;
1838 return(TRUE);
1839 }
1840
1841 if (vrnum < 21) { /* horizontal register */
1842
1843 if (p_value & ~0x003F)
1844 return(FALSE);
1845
1846 vrnum = rc;
1847 return(TRUE);
1848 }
1849
1850 if (vrnum < 25) { /* vertical register */
1851
1852 if (p_value & ~0x03FF)
1853 return(FALSE);
1854
1855 vrnum = rc;
1856 return(TRUE);
1857 }
1858
1859 return(FALSE);
1860}
1861
1862/*
1863 ============================================================================
1864 cx_vrst -- process vrset command
1865 ============================================================================
1866*/
1867
[7258c6a]1868int16_t cx_vrst(void)
[f40a309]1869{
1870 redo = FALSE;
1871
1872 if (vrnum < 1)
1873 return(FALSE);
1874
1875 if (vrnum < 17) { /* 1..16 -- r0..r15 -- complete register */
1876
[5117699]1877 v_regs[vrnum-1] = (uint16_t)p_value;
[f40a309]1878 return(TRUE);
1879 }
1880
1881 if (vrnum < 21) { /* 17..20 -- h0..h3 -- horizontal register */
1882
1883 v_regs[vrnum-5] = (v_regs[vrnum-5] & 0x03FF) |
[5117699]1884 (((uint16_t)p_value << 10) & 0xFC00);
[f40a309]1885 return(TRUE);
1886 }
1887
1888 if (vrnum < 25) { /* 21..24 -- v0..v3 -- vertical register */
1889
[5117699]1890 v_regs[vrnum-9] = (v_regs[vrnum-9] & 0xFC00) | (uint16_t)p_value;
[f40a309]1891 return(TRUE);
1892 }
1893
1894 return(FALSE);
1895}
1896
1897/*
1898 ============================================================================
1899 cx_vreg -- process vregs command
1900 ============================================================================
1901*/
1902
[7258c6a]1903int16_t cx_vreg(void)
[f40a309]1904{
[c59409e]1905 int16_t i, j, k, l;
1906 volatile uint16_t *rp;
[f40a309]1907
1908 rp = &v_regs[0];
1909 l = 0;
1910
1911 for (i = 0; i < 2; i++) {
1912
1913 for (j = 0; j < 2; j++) {
1914
1915 for (k = 0; k < 4; k++) {
1916
1917 writeln(cmdunit, " ");
[298f0b4]1918 putn((uint32_t)l++, 2, cmdunit);
[f40a309]1919 writeln(cmdunit, ":");
[298f0b4]1920 puthn((uint32_t)*rp++, 4, cmdunit);
[f40a309]1921 }
1922
1923 writeln(cmdunit, " ");
1924 }
1925
1926 writeln(cmdunit, "\r\n");
1927 }
1928
1929 return(TRUE);
1930}
1931
1932/*
1933 ============================================================================
1934 do_srec -- load a Motorola S record
1935 ============================================================================
1936*/
1937
[7258c6a]1938int16_t do_srec(int8_t *line)
[f40a309]1939{
[7258c6a]1940 register int8_t *ldadr;
[5117699]1941 register int16_t c, i, len;
1942 register uint16_t val, csum;
[f40a309]1943
1944 if ('S' NE (c = *line++))
1945 return(-1); /* error 1 = missing initial S */
1946
1947 switch (c = *line++) {
1948
1949 case '2':
1950
1951 csum = 0;
1952
1953 if (isxdigit(c = *line++))
1954 len = xdtoi(c);
1955 else
1956 return(-2); /* error 2 = bad length byte */
1957
1958 if (isxdigit(c = *line++))
1959 len = (len << 4) + xdtoi(c);
1960 else
1961 return(-2);
1962
1963 csum += (len & 0xFF);
[7258c6a]1964 ldadr = (int8_t *)0;
[f40a309]1965 len -= 4;
1966
1967 for (i = 0; i < 3; i++) {
1968
1969 if (isxdigit(c = *line++))
[5117699]1970 val = (uint16_t)xdtoi(c);
[f40a309]1971 else
1972 return(-3); /* error 3 = bad address byte */
1973
1974 if (isxdigit(c = *line++))
[5117699]1975 val = (val << 4) + (uint16_t)xdtoi(c);
[f40a309]1976 else
1977 return(-3);
1978
[7258c6a]1979 ldadr = (int8_t *)(((int32_t)ldadr << 8) + (int32_t)val);
[f40a309]1980 csum += (val & 0xFF);
1981 }
1982
1983 for (i = 0; i < len; i++) {
1984
1985 if (isxdigit(c = *line++))
[5117699]1986 val = (uint16_t)xdtoi(c);
[f40a309]1987 else
1988 return(-4); /* error 4 = bad data byte */
1989
1990 if (isxdigit(c = *line++))
[5117699]1991 val = (val << 4) + (uint16_t)xdtoi(c);
[f40a309]1992 else
1993 return(-4);
1994
1995 csum += (val & 0xFF);
[5117699]1996 *ldadr = (int8_t)(val & 0xFF);
[f40a309]1997
1998 if ((*ldadr & 0xFF) NE (val & 0xFF))
1999 return(-5); /* error 5 = store failed */
2000
2001 ldadr++;
2002 }
2003
2004 csum = 0xFF & ~csum;
2005
2006 if (isxdigit(c = *line++))
[5117699]2007 val = (uint16_t)xdtoi(c);
[f40a309]2008 else
2009 return(-6); /* error 6 = bad checksum byte */
2010
2011 if (isxdigit(c = *line++))
[5117699]2012 val = (val << 4) + (uint16_t)xdtoi(c);
[f40a309]2013 else
2014 return(-6);
2015
2016 if (csum NE (val & 0xFF))
2017 return(-7); /* error 7 = bad checksum */
2018
2019 return(1);
2020
2021 case '9':
2022
2023 if (memcmpu(line, SREC9, 10) EQ 0)
2024 return(0);
2025 else
2026 return(-8); /* error 8 = bad end record */
2027
2028 default:
2029
2030 return(-9); /* error 9 = unknown s type */
2031 }
2032
2033 return(-10); /* error 10 = switch failed */
2034}
2035
2036/*
2037 ============================================================================
2038 cx_load -- process load command
2039 ============================================================================
2040*/
2041
[7258c6a]2042int16_t cx_load(void)
[f40a309]2043{
[7258c6a]2044 register int16_t rc;
[f40a309]2045
2046 do {
2047
2048 rc = getrln(cmdunit, MAXCMDLN, cmdline);
2049
2050 switch (rc) {
2051
2052 case A_CR:
2053
2054 rc = do_srec(cmdline);
2055
2056 if (rc LT 0) {
2057
2058 rc = -rc;
2059 writeln(cmdunit, NACK);
2060 writeln(cmdunit, "** Load error ");
[298f0b4]2061 putn((uint32_t)rc, 3, cmdunit);
[f40a309]2062 writeln(cmdunit, " **\r\n\n");
2063 return(FALSE);
2064
2065 } else {
2066
2067 writeln(cmdunit, TACK);
2068 }
2069
2070 continue;
2071
2072 case CTL('X'):
2073
2074 rc = 1;
2075 writeln(cmdunit, TACK);
2076 continue;
2077
2078 default:
2079
2080 writeln(cmdunit, NACK);
2081 writeln(cmdunit, "** Load aborted on ");
[298f0b4]2082 puthn((uint32_t)rc, 2, cmdunit);
[f40a309]2083 writeln(cmdunit, " **\r\n\n");
2084 return(FALSE);
2085 }
2086
2087 } while (rc);
2088
2089 return(TRUE);
2090}
2091
2092/*
2093 ============================================================================
2094 cx_fill -- execute the fill command
2095 ============================================================================
2096*/
2097
[7258c6a]2098int16_t cx_fill(void)
[f40a309]2099{
[7258c6a]2100 register int8_t *cp = p_from;
2101 register int32_t count;
[f40a309]2102
2103 redo = FALSE;
2104
2105 for (count = p_len; count > 0L; count--) {
2106
[7258c6a]2107 *cp = (int8_t)(0xFFL & p_value);
[f40a309]2108
[7258c6a]2109 if (*cp NE (int8_t)(0xFFL & p_value)) {
[f40a309]2110
2111 writeln(cmdunit, "\r\n** FILL failed at ");
[298f0b4]2112 puthn((uint32_t)cp, 8, cmdunit);
[f40a309]2113 writeln(cmdunit, " **\r\n");
2114 return(FALSE);
2115 }
2116
2117 ++cp;
2118 }
2119
2120 return(TRUE);
2121}
2122
2123/*
2124 ============================================================================
2125 cx_wfill -- execute the wfill command
2126 ============================================================================
2127*/
2128
[7258c6a]2129int16_t cx_wfil(void)
[f40a309]2130{
[7258c6a]2131 register uint16_t *cp = (uint16_t *)p_from;
2132 register int32_t count;
[f40a309]2133
2134 redo = FALSE;
2135
2136 for (count = p_len; count > 0L; count--)
[7258c6a]2137 *cp++ = (uint16_t)(0xFFFFL & p_value);
[f40a309]2138
2139 return(TRUE);
2140}
2141
2142/*
2143 ============================================================================
2144 cx_copy -- execute the copy command
2145 ============================================================================
2146*/
2147
[7258c6a]2148int16_t cx_copy(void)
[f40a309]2149{
[7258c6a]2150 register int8_t *from = p_from,
[f40a309]2151 *to = p_to;
[7258c6a]2152 register int32_t count = p_len;
[f40a309]2153
2154 redo = FALSE;
2155
2156 if (to GT from) {
2157
2158 from = from + count;
2159 to = to + count;
2160
2161 while (count--) {
2162
2163 --from;
2164 --to;
2165 *to = *from;
2166
2167 if (*from NE *to) {
2168
2169 writeln(cmdunit, "\r\n** COPY failed from ");
[298f0b4]2170 puthn((uint32_t)from, 8, cmdunit);
[f40a309]2171 writeln(cmdunit, " to ");
[298f0b4]2172 puthn((uint32_t)to, 8, cmdunit);
[f40a309]2173 writeln(cmdunit, " with (from) = ");
[298f0b4]2174 puthn((uint32_t)(*from), 2, cmdunit);
[f40a309]2175 writeln(cmdunit, " and (to) = ");
[298f0b4]2176 puthn((uint32_t)(*to), 2, cmdunit);
[f40a309]2177 writeln(cmdunit, " **\r\n");
2178 return(FALSE);
2179 }
2180 }
2181
2182 } else {
2183
2184 while (count--) {
2185
2186 *to = *from;
2187
2188 if (*from NE *to) {
2189
2190 writeln(cmdunit, "\r\n** COPY failed from ");
[298f0b4]2191 puthn((uint32_t)from, 8, cmdunit);
[f40a309]2192 writeln(cmdunit, " to ");
[298f0b4]2193 puthn((uint32_t)to, 8, cmdunit);
[f40a309]2194 writeln(cmdunit, " with (from) = ");
[298f0b4]2195 puthn((uint32_t)(*from), 2, cmdunit);
[f40a309]2196 writeln(cmdunit, " and (to) = ");
[298f0b4]2197 puthn((uint32_t)(*to), 2, cmdunit);
[f40a309]2198 writeln(cmdunit, " **\r\n");
2199 return(FALSE);
2200 }
2201
2202 ++from;
2203 ++to;
2204 }
2205 }
2206
2207 return(TRUE);
2208}
2209
2210
2211/*
2212 ============================================================================
2213 cx_dump -- execute the dump command
2214 ============================================================================
2215*/
2216
[7258c6a]2217int16_t cx_dump(void)
[f40a309]2218{
[7258c6a]2219 register int16_t nw, rc;
[f40a309]2220
2221 redo= TRUE;
2222 d_cur = p_from;
2223 d_next = p_to + 1;
[7258c6a]2224 d_last = ((int32_t)p_to - (int32_t)p_from) + d_next;
[5117699]2225 nw = (int16_t)p_width;
[f40a309]2226 rc = TRUE;
2227
2228 do {
2229
2230 writeln(cmdunit, CRLF);
2231 padr(p_from, cmdunit);
2232
2233 dflag = FALSE;
2234
2235 if (ddump(p_from, p_to, nw, cmdunit))
2236 rc = FALSE;
2237
2238 if (rc)
2239 if (dtext(p_from, p_to, nw, cmdunit))
2240 rc = FALSE;
2241
2242 p_from = p_from + p_width;
2243
2244 if (dflag)
2245 rc = FALSE;
2246
2247 } while (rc);
2248
2249 p_from = d_cur;
2250
2251 writeln(cmdunit, CRLF);
2252 writeln(cmdunit, CRLF);
2253
2254 return(TRUE);
2255}
2256
2257/*
2258 ============================================================================
2259 wdump -- dump words in hex (no ASCII)
2260 ============================================================================
2261*/
2262
[7258c6a]2263int16_t wdump(uint16_t *loc, uint16_t *lastloc, int16_t nwide, int16_t unit)
[f40a309]2264{
2265 while (nwide--) {
2266
[298f0b4]2267 puthn((uint32_t)(0xFFFFL & *loc), 4, unit);
[f40a309]2268 BIOS(B_PUTC,unit, ' ');
2269
2270 if (BIOS(B_RDAV, unit))
2271 return(TRUE);
2272
2273 if (loc EQ lastloc) {
2274
2275 dflag = TRUE;
2276 return(FALSE);
2277 }
2278
2279 ++loc;
2280 }
2281
2282 return(FALSE);
2283}
2284
2285/*
2286 ============================================================================
2287 ldump -- dump longs in hex (no ASCII)
2288 ============================================================================
2289*/
2290
[5117699]2291int16_t ldump(uint32_t *loc, uint32_t *lastloc, int16_t nwide, int16_t unit)
[f40a309]2292{
2293 while (nwide--) {
2294
[5117699]2295 puthn(*loc, 8, unit);
[f40a309]2296 BIOS(B_PUTC,unit, ' ');
2297
2298 if (BIOS(B_RDAV, unit))
2299 return(TRUE);
2300
2301 if (loc EQ lastloc) {
2302
2303 dflag = TRUE;
2304 return(FALSE);
2305 }
2306
2307 ++loc;
2308 }
2309
2310 return(FALSE);
2311}
2312
2313/*
2314 ============================================================================
2315 cp_wdmp -- process parameters for wdump command
2316 ============================================================================
2317*/
2318
[7258c6a]2319int16_t cp_wdmp(void)
[f40a309]2320{
2321 inext = ilast;
2322
2323 if (getarg())
[7d4cf30]2324 if (setp(&p_from, p_from) EQ FALSE) {
[f40a309]2325
2326 redo = FALSE;
2327 return(FALSE);
2328 }
2329
[7258c6a]2330 if ((int32_t)p_from & 1L) {
[f40a309]2331
2332 redo = FALSE;
2333 return(FALSE);
2334 }
2335
2336 if (argsep EQ A_CR OR argsep EQ '\0') {
2337
2338 p_to = p_from;
2339 p_width = 8;
2340 redo = TRUE;
2341 return(TRUE);
2342 }
2343
2344 if (getarg())
[7d4cf30]2345 if (setp(&p_to, p_to) EQ FALSE) {
[f40a309]2346
2347 redo = FALSE;
2348 return(FALSE);
2349 }
2350
[7258c6a]2351 if ((int32_t)p_to & 1L) {
[f40a309]2352
2353 redo = FALSE;
2354 return(FALSE);
2355 }
2356
2357 if (argsep EQ A_CR OR argsep EQ '\0') {
2358
2359 p_width = 8;
2360 redo = TRUE;
2361 return(TRUE);
2362 }
2363
2364 if (getarg())
2365 if (setvar(&p_width, p_width) EQ FALSE) {
2366
2367 redo = FALSE;
2368 return(FALSE);
2369 }
2370
2371 redo = TRUE;
2372 return(TRUE);
2373}
2374
2375/*
2376 ============================================================================
2377 cp_ldmp -- process parameters for ldump command
2378 ============================================================================
2379*/
2380
[7258c6a]2381int16_t cp_ldmp(void)
[f40a309]2382{
2383 inext = ilast;
2384
2385 if (getarg())
[7d4cf30]2386 if (setp(&p_from, p_from) EQ FALSE) {
[f40a309]2387
2388 redo = FALSE;
2389 return(FALSE);
2390 }
2391
[7258c6a]2392 if ((int32_t)p_from & 1L) {
[f40a309]2393
2394 redo = FALSE;
2395 return(FALSE);
2396 }
2397
2398 if (argsep EQ A_CR OR argsep EQ '\0') {
2399
2400 p_to = p_from;
2401 p_width = 4;
2402 redo = TRUE;
2403 return(TRUE);
2404 }
2405
2406 if (getarg())
[7d4cf30]2407 if (setp(&p_to, p_to) EQ FALSE) {
[f40a309]2408
2409 redo = FALSE;
2410 return(FALSE);
2411 }
2412
[7258c6a]2413 if ((int32_t)p_to & 1L) {
[f40a309]2414
2415 redo = FALSE;
2416 return(FALSE);
2417 }
2418
2419 if (argsep EQ A_CR OR argsep EQ '\0') {
2420
2421 p_width = 4;
2422 redo = TRUE;
2423 return(TRUE);
2424 }
2425
2426 if (getarg())
2427 if (setvar(&p_width, p_width) EQ FALSE) {
2428
2429 redo = FALSE;
2430 return(FALSE);
2431 }
2432
2433 redo = TRUE;
2434 return(TRUE);
2435}
2436
2437/*
2438 ============================================================================
2439 cp_ilev -- parse the ipl command
2440 ============================================================================
2441*/
2442
[7258c6a]2443int16_t cp_ilev(void)
[f40a309]2444{
[7258c6a]2445 int32_t iplevl;
[f40a309]2446
2447 if (argsep EQ A_CR OR argsep EQ '\0')
2448 return(TRUE);
2449
2450 if (getarg())
2451 if (setvar(&iplevl, iplevl) EQ FALSE)
2452 return(FALSE);
2453
2454 if (iplevl GT 7)
2455 return(FALSE);
2456
[5117699]2457 iplev = (int16_t)iplevl;
[f40a309]2458
2459 return(TRUE);
2460}
2461
2462/*
2463 ============================================================================
2464 cx_ilev -- execute ipl command
2465 ============================================================================
2466*/
2467
[7258c6a]2468int16_t cx_ilev(void)
[f40a309]2469{
2470 if (-1 EQ setipl(iplev)) {
2471
2472 printf("ERROR -- Could not set IPL to %d\r\n", iplev);
2473 return(FALSE);
2474 } else
2475 printf("ROMP IPL now set to %d\r\n", iplev);
2476
2477 return(TRUE);
2478}
2479
2480/*
2481 ============================================================================
2482 cp_monc() -- parse the monc command
2483 ============================================================================
2484*/
2485
[7258c6a]2486int16_t cp_monc(void)
[f40a309]2487{
2488 if (getarg())
[7d4cf30]2489 if (setp(&monptr, monptr) EQ FALSE)
[f40a309]2490 return(FALSE);
2491
2492 monsw = MON_C;
2493 redo = TRUE;
2494 return(TRUE);
2495}
2496
2497/*
2498 ============================================================================
2499 cp_mons() -- parse the mons command
2500 ============================================================================
2501*/
2502
[7258c6a]2503int16_t cp_mons(void)
[f40a309]2504{
2505 if (getarg())
[7d4cf30]2506 if (setp(&monptr, monptr) EQ FALSE)
[f40a309]2507 return(FALSE);
2508
2509 monsw = MON_S;
2510 redo = TRUE;
2511 return(TRUE);
2512}
2513
2514/*
2515 ============================================================================
2516 cp_monl() -- parse the monl command
2517 ============================================================================
2518*/
2519
[7258c6a]2520int16_t cp_monl(void)
[f40a309]2521{
2522 if (getarg())
[7d4cf30]2523 if (setp(&monptr, monptr) EQ FALSE)
[f40a309]2524 return(FALSE);
2525
2526 monsw = MON_L;
2527 redo = TRUE;
2528 return(TRUE);
2529}
2530
2531/*
2532 ============================================================================
2533 cx_mon() -- process the mon commands
2534 ============================================================================
2535*/
2536
[7258c6a]2537int16_t cx_mon(void)
[f40a309]2538{
[7258c6a]2539 register int8_t vc, vcc;
2540 register int16_t vs, vss, *vsp;
2541 register int32_t vl, vll, *vlp;
[f40a309]2542
2543 switch (monsw) {
2544
2545 case MON_C:
2546
[5117699]2547 vc = (int8_t)(*monptr & 0x0FF);
[298f0b4]2548 puthn((uint32_t)vc, 2, cmdunit);
[f40a309]2549 writeln(cmdunit, "\r\n");
2550
2551 while (!(0xFFFFL & BIOS(B_RDAV, CON_DEV))) {
2552
[5117699]2553 vcc = (int8_t)(*monptr & 0x0FF);
[f40a309]2554
2555 if (vc NE vcc) {
2556
2557 vc = vcc;
[298f0b4]2558 puthn((uint32_t)vc, 2, cmdunit);
[f40a309]2559 writeln(cmdunit, "\r\n");
2560 }
2561 }
2562
2563 BIOS(B_GETC, CON_DEV);
2564 return(TRUE);
2565
2566 case MON_S:
2567
[7258c6a]2568 vsp = (int16_t *)monptr;
[f40a309]2569 vs = *vsp;
[298f0b4]2570 puthn((uint32_t)vs, 4, cmdunit);
[f40a309]2571 writeln(cmdunit, "\r\n");
2572
2573 while (!(0xFFFFL & BIOS(B_RDAV, CON_DEV))) {
2574
2575 vss = *vsp;
2576
2577 if (vs NE vss) {
2578
2579 vs = vss;
[298f0b4]2580 puthn((uint32_t)vs, 4, cmdunit);
[f40a309]2581 writeln(cmdunit, "\r\n");
2582 }
2583 }
2584
2585 BIOS(B_GETC, CON_DEV);
2586 return(TRUE);
2587
[fa38804]2588
[f40a309]2589 case MON_L:
2590
[7258c6a]2591 vlp = (int32_t *)monptr;
[f40a309]2592 vl = *vlp;
[298f0b4]2593 puthn((uint32_t)vl, 8, cmdunit);
[f40a309]2594 writeln(cmdunit, "\r\n");
2595
2596 while (!(0xFFFFL & BIOS(B_RDAV, CON_DEV))) {
2597
2598 vll = *vlp;
2599
2600 if (vl NE vll) {
2601
2602 vl = vll;
[298f0b4]2603 puthn((uint32_t)vl, 8, cmdunit);
[f40a309]2604 writeln(cmdunit, "\r\n");
2605 }
2606 }
2607
2608 BIOS(B_GETC, CON_DEV);
2609 return(TRUE);
2610
2611 default:
2612 return(FALSE);
2613 }
2614}
2615
2616
2617/*
2618 ============================================================================
2619 cx_wdmp -- process wdump command
2620 ============================================================================
2621*/
2622
[7258c6a]2623int16_t cx_wdmp(void)
[f40a309]2624{
[7258c6a]2625 int16_t nw, rc;
[f40a309]2626
2627 d_cur = p_from;
2628 d_next = p_to + 2;
[7258c6a]2629 d_last = ((int32_t)p_to - (int32_t)p_from) + d_next;
[5117699]2630 nw = (int16_t)p_width;
[f40a309]2631 rc = TRUE;
2632
2633 do {
2634
2635 writeln(cmdunit, CRLF);
2636 padr(p_from, cmdunit);
2637 dflag = FALSE;
2638
[5117699]2639 if (wdump((uint16_t *)p_from, (uint16_t *)p_to, nw, cmdunit))
[f40a309]2640 rc = FALSE;
2641
2642 p_from = p_from + (p_width << 1);
2643
2644 if (dflag)
2645 rc = FALSE;
2646
2647 } while (rc);
2648
2649 p_from = d_cur;
2650
2651 writeln(cmdunit, CRLF);
2652 writeln(cmdunit, CRLF);
2653 return(TRUE);
2654}
2655
2656/*
2657 ============================================================================
2658 cx_ldmp -- process ldump command
2659 ============================================================================
2660*/
2661
[7258c6a]2662int16_t cx_ldmp(void)
[f40a309]2663{
[7258c6a]2664 int16_t nw, rc;
[f40a309]2665
2666 d_cur = p_from;
2667 d_next = p_to + 4;
[7258c6a]2668 d_last = ((int32_t)p_to - (int32_t)p_from) + d_next;
[5117699]2669 nw = (int16_t)p_width;
[f40a309]2670 rc = TRUE;
2671
2672 do {
2673
2674 writeln(cmdunit, CRLF);
2675 padr(p_from, cmdunit);
2676 dflag = FALSE;
2677
[5117699]2678 if (ldump((uint32_t *)p_from, (uint32_t *)p_to, nw, cmdunit))
[f40a309]2679 rc = FALSE;
2680
2681 p_from = p_from + (p_width << 2);
2682
2683 if (dflag)
2684 rc = FALSE;
2685
2686 } while (rc);
2687
2688 p_from = d_cur;
2689
2690 writeln(cmdunit, CRLF);
2691 writeln(cmdunit, CRLF);
2692 return(TRUE);
2693}
2694
2695/*
2696 ============================================================================
2697 do_cmd -- process a command line
2698 ============================================================================
2699*/
2700
[0580615]2701void do_cmd(void)
[f40a309]2702{
[7258c6a]2703 int16_t rc, i;
[f40a309]2704
2705 /* prompt for a command line */
2706
2707#if TINYMSG
2708 writeln(cmdunit, "R: ");
2709#else
2710 writeln(cmdunit, "ROMP: ");
2711#endif
2712
2713 /* get a command line */
2714
2715 rc = getln(cmdunit, MAXCMDLN, cmdline);
2716
2717 /* dispatch based on rc */
2718
2719 switch (rc) {
2720
2721 case A_CR:
2722
2723 writeln(cmdunit, CRLF);
2724
2725 if (getcmd()) {
2726
[5117699]2727 for (i = 0; i < (int16_t)NCMDS; i++) {
[f40a309]2728
2729 if (0 EQ strcmp(argstr, cmtab[i].cname)) {
2730
2731 ilast = i;
2732
2733 if ((*cmtab[i].cp)()) {
2734
2735 if (FALSE EQ (*cmtab[i].cx)())
2736 writeln(cmdunit, EMSG1);
2737
2738 } else {
2739
2740 writeln(cmdunit, EMSG2);
2741 }
2742
2743 return;
2744 }
2745 }
2746
2747 writeln(cmdunit, EMSG3);
2748 return;
2749
2750 } else {
2751
2752 if (redo) {
2753
2754 if (FALSE EQ (*cmtab[ilast].cx)())
2755 writeln(cmdunit, EMSG1);
2756
2757 } else {
2758
2759 writeln(cmdunit, EMSG5);
2760 }
2761
2762 return;
2763 }
2764
2765 case CTL('X'):
2766
2767 writeln(cmdunit, CANNED);
2768 return;
2769
2770 default:
2771
2772 writeln(cmdunit, EMSG6);
2773 return;
2774 }
2775
2776 writeln(cmdunit, EMSG7);
2777 return;
2778}
2779
2780/*
2781 ============================================================================
2782 cx_next -- process the next command
2783 ============================================================================
2784*/
2785
[7258c6a]2786int16_t cx_next(void)
[f40a309]2787{
2788 p_to = d_last;
2789 p_from = d_next;
2790 return((*cmtab[inext].cx)());
2791}
2792
2793/*
2794 ============================================================================
2795 cx_read() -- process the read command
2796 ============================================================================
2797*/
2798
[7258c6a]2799int16_t cx_read(void)
[f40a309]2800{
[7258c6a]2801 int32_t rc;
2802 int16_t ns, recno;
[f40a309]2803
2804 ns = p_len & 0x7FFFL;
[5117699]2805 recno = (int16_t)((int32_t)p_from & 0xFFFFL);
[f40a309]2806
2807 rc = BIOS(B_RDWR, 2, p_to, ns, recno, 0);
2808
2809 if (rc & 0xFFFFL) {
2810
2811 writeln(cmdunit, "\r\nERROR reading disk: ");
[298f0b4]2812 puthn((uint32_t)rc, 8, cmdunit);
[f40a309]2813 writeln(cmdunit, "\r\n\n");
2814 return(FALSE);
2815
2816 } else {
2817
2818 return(TRUE);
2819 }
2820}
2821
2822/*
2823 ============================================================================
2824 cx_writ() -- process the write command
2825 ============================================================================
2826*/
2827
[7258c6a]2828int16_t cx_writ(void)
[f40a309]2829{
[7258c6a]2830 int32_t rc;
2831 int16_t ns, recno;
[f40a309]2832
2833 ns = p_len & 0x7FFFL;
[5117699]2834 recno = (int16_t)((int32_t)p_from & 0xFFFFL);
[f40a309]2835
2836 rc = BIOS(B_RDWR, 3, p_to, ns, recno, 0);
2837
2838 if (rc & 0xFFFFL) {
2839
2840 writeln(cmdunit, "\r\nERROR writing disk: ");
[298f0b4]2841 puthn((uint32_t)rc, 8, cmdunit);
[f40a309]2842 writeln(cmdunit, "\r\n\n");
2843 return(FALSE);
2844
2845 } else {
2846
2847 return(TRUE);
2848 }
2849}
2850
2851/*
2852 ============================================================================
2853 showrs() -- show registers
2854 ============================================================================
2855*/
2856
[0580615]2857void showrs(struct regs *rp)
[f40a309]2858{
[7258c6a]2859 int16_t i;
2860 uint16_t srtemp;
[f40a309]2861
2862 writeln(cmdunit, " ");
2863
2864 for (i = 0; i < 8; i++) {
2865
2866 BIOS(B_PUTC, cmdunit, ' ');
2867 BIOS(B_PUTC, cmdunit, '0'+i);
2868 writeln(cmdunit, "_______");
2869 }
2870
2871 writeln(cmdunit, "\r\nd0..d7 ");
2872
2873 for (i = 0; i < 8; i++) {
2874
2875 BIOS(B_PUTC, cmdunit, ' ');
2876 puthn(rp->d_reg[i], 8, cmdunit);
2877 }
2878
2879 writeln(cmdunit, "\r\na0..a7 ");
2880
2881 for (i = 0; i < 8; i++) {
2882
2883 BIOS(B_PUTC, cmdunit, ' ');
2884 puthn(rp->a_reg[i], 8, cmdunit);
2885 }
2886
2887 writeln(cmdunit, "\r\nPC = ");
[298f0b4]2888 puthn((uint32_t)rp->reg_pc, 8, cmdunit);
[f40a309]2889
2890 srtemp = rp->reg_sr;
2891 writeln(cmdunit, ", SR = ");
[298f0b4]2892 puthn((uint32_t)srtemp & 0xFFFFL, 4, cmdunit);
[f40a309]2893
2894 writeln(cmdunit, " (IPL = ");
[298f0b4]2895 puthn((uint32_t)(srtemp >> 8) & 0x7L, 1, cmdunit);
[f40a309]2896 writeln(cmdunit, ", ");
2897
2898 if (srtemp & 0x8000)
2899 BIOS(B_PUTC, cmdunit, 'T');
2900 else
2901 BIOS(B_PUTC, cmdunit, '-');
2902
2903 if (srtemp & 0x2000)
2904 BIOS(B_PUTC, cmdunit, 'S');
2905 else
2906 BIOS(B_PUTC, cmdunit, '-');
2907
2908 BIOS(B_PUTC, cmdunit, ' ');
2909
2910 if (srtemp & 0x10)
2911 BIOS(B_PUTC, cmdunit, 'X');
2912 else
2913 BIOS(B_PUTC, cmdunit, '-');
2914
2915 if (srtemp & 0x8)
2916 BIOS(B_PUTC, cmdunit, 'N');
2917 else
2918 BIOS(B_PUTC, cmdunit, '-');
2919
2920 if (srtemp & 0x4)
2921 BIOS(B_PUTC, cmdunit, 'Z');
2922 else
2923 BIOS(B_PUTC, cmdunit, '-');
2924
2925 if (srtemp & 0x2)
2926 BIOS(B_PUTC, cmdunit, 'V');
2927 else
2928 BIOS(B_PUTC, cmdunit, '-');
2929
2930 if (srtemp & 0x1)
2931 BIOS(B_PUTC, cmdunit, 'C');
2932 else
2933 BIOS(B_PUTC, cmdunit, '-');
2934
2935 writeln(cmdunit, " )\r\n");
2936}
2937
2938/*
2939 ============================================================================
2940 showcr() -- show crash registers
2941 ============================================================================
2942*/
2943
[0580615]2944void showcr(void)
[f40a309]2945{
[7258c6a]2946 register int16_t i;
2947 register int8_t *cause;
2948 register uint16_t srtemp;
[f40a309]2949
2950 writeln(cmdunit, "BIOS Crash Area Dump\r\n");
2951 writeln(cmdunit, " ");
2952
2953 for (i = 0; i < 8; i++) {
2954
2955 BIOS(B_PUTC, cmdunit, ' ');
2956 BIOS(B_PUTC, cmdunit, '0'+i);
2957 writeln(cmdunit, "_______");
2958 }
2959
2960 writeln(cmdunit, "\r\nd0..d7 ");
2961
2962 for (i = 0; i < 8; i++) {
2963
2964 BIOS(B_PUTC, cmdunit, ' ');
2965 puthn(crshrg[i], 8, cmdunit);
2966 }
2967
2968 writeln(cmdunit, "\r\na0..a7 ");
2969
2970 for (i = 8; i < 16; i++) {
2971
2972 BIOS(B_PUTC, cmdunit, ' ');
2973 puthn(crshrg[i], 8, cmdunit);
2974 }
2975
2976 writeln(cmdunit, "\r\n\nPC = ");
[298f0b4]2977 puthn(crshpc, 8, cmdunit);
[f40a309]2978
2979 srtemp = crshsr;
2980 writeln(cmdunit, ", SR = ");
[298f0b4]2981 puthn((uint32_t)srtemp & 0xFFFFL, 4, cmdunit);
[f40a309]2982
2983 writeln(cmdunit, " (IPL = ");
[298f0b4]2984 puthn((uint32_t)(srtemp >> 8) & 0x7L, 1, cmdunit);
[f40a309]2985 writeln(cmdunit, ", ");
2986
2987 if (srtemp & 0x8000)
2988 BIOS(B_PUTC, cmdunit, 'T');
2989 else
2990 BIOS(B_PUTC, cmdunit, '-');
2991
2992 if (srtemp & 0x2000)
2993 BIOS(B_PUTC, cmdunit, 'S');
2994 else
2995 BIOS(B_PUTC, cmdunit, '-');
2996
2997 BIOS(B_PUTC, cmdunit, ' ');
2998
2999 if (srtemp & 0x10)
3000 BIOS(B_PUTC, cmdunit, 'X');
3001 else
3002 BIOS(B_PUTC, cmdunit, '-');
3003
3004 if (srtemp & 0x8)
3005 BIOS(B_PUTC, cmdunit, 'N');
3006 else
3007 BIOS(B_PUTC, cmdunit, '-');
3008
3009 if (srtemp & 0x4)
3010 BIOS(B_PUTC, cmdunit, 'Z');
3011 else
3012 BIOS(B_PUTC, cmdunit, '-');
3013
3014 if (srtemp & 0x2)
3015 BIOS(B_PUTC, cmdunit, 'V');
3016 else
3017 BIOS(B_PUTC, cmdunit, '-');
3018
3019 if (srtemp & 0x1)
3020 BIOS(B_PUTC, cmdunit, 'C');
3021 else
3022 BIOS(B_PUTC, cmdunit, '-');
3023
3024 writeln(cmdunit, " )\r\n");
3025
[fa38804]3026
[f40a309]3027 writeln(cmdunit, "TRAP vector number = ");
[298f0b4]3028 putn((uint32_t)crshvc[0], 2, cmdunit);
[f40a309]3029
3030 cause = " (no handler for interrupt)";
3031
3032 switch (crshvc[0] & 0xFF) {
3033
3034 case 2: /* 2: bus error */
3035
3036 cause = " (Bus error)";
3037 break;
3038
3039 case 3: /* 3: address error */
3040
3041 cause = " (Address error)";
3042 break;
3043
3044 case 4: /* 4: illegal instruction */
3045
3046 cause = " (Illegal instruction)";
3047 break;
3048
3049 case 5: /* 5: zero divide */
3050
3051 cause = " (Zero divide)";
3052 break;
3053
3054 case 6: /* 6: CHK instruction */
3055
3056 cause = " (CHK instruction)";
3057 break;
3058
3059 case 7: /* 7: TRAPV instruction */
3060
3061 cause = " (TRAPV instruction)";
3062 break;
3063
3064 case 8: /* 8: privilege violation */
3065
3066 cause = " (Privilege violation)";
3067 break;
3068
3069 case 9: /* 9: trace */
3070
3071 cause = " (Trace -- not implemented)";
3072 break;
3073
3074 case 10: /* 10: line 1010 emulator */
3075
3076 cause = " (Line 1010 Emulator -- not implemented)";
3077 break;
3078
3079 case 11: /* 11: line 1111 emulator */
3080
3081 cause = " (Line 1111 Emulator -- not implemented";
3082 break;
3083
3084 case 15: /* 15: uninitialized interrupt vector */
3085
3086 cause = " (Uninitialized interrupt)";
3087 break;
3088
3089 case 24: /* 24: spurious interrupt */
3090
3091 cause = " (Spurious interrupt)";
3092 break;
3093
3094 case 25: /* 25: Autovector Level 1*/
3095
3096 cause = " (Level 1 Interrupt -- unimplmented)";
3097 break;
3098
3099 case 26: /* 26: Autovector Level 2 */
3100
3101 cause = " (Level 2 Interrupt -- unimplmented)";
3102 break;
3103
3104 case 27: /* 27: Autovector Level 3 */
3105
3106 cause = " (Level 3 Interrupt -- unimplmented)";
3107 break;
3108
3109 case 28: /* 28: Autovector Level 4 */
3110
3111 cause = " (Level 4 Interrupt -- unimplmented)";
3112 break;
3113
3114 case 29: /* 29: Autovector Level 5 */
3115
3116 cause = " (Level 5 Interrupt -- unimplmented)";
3117 break;
3118
3119 case 30: /* 30: Autovector Level 6 */
3120
3121 cause = " (Level 6 Interrupt -- unimplmented)";
3122 break;
3123
3124 case 31: /* 31: Autovector Level 7 */
3125
3126 cause = " (Level 7 Interrupt -- unimplmented)";
3127 break;
3128
3129 }
3130
3131 writeln(cmdunit, cause);
3132 writeln(cmdunit, "\r\n");
3133}
3134
3135/*
3136 ============================================================================
3137 cx_crsh -- process the crash command
3138 ============================================================================
3139*/
3140
[7258c6a]3141int16_t cx_crsh(void)
[f40a309]3142{
3143 if (!wzcrsh)
3144 printf("** Crash switch NOT set **\r\n");
3145
3146 redo = FALSE;
3147 showcr();
3148 return(TRUE);
3149}
3150
3151/*
3152 ============================================================================
3153 bphit -- clear breakpoints, see if any were hit
3154 ============================================================================
3155*/
3156
[7258c6a]3157int16_t bphit(void)
[f40a309]3158{
[7258c6a]3159 int16_t rc;
[f40a309]3160
3161 rc = FALSE;
3162
[5117699]3163 if ((uint32_t)p_ba0 EQ regptr->reg_pc) {
[f40a309]3164
3165 if (*p_ba0 EQ BPINST) {
3166
3167 *p_ba0 = p_bv0;
3168 p_ba0 = 0L;
3169 p_bv0 = BPINST;
3170 rc = TRUE;
3171
3172 } else {
3173
3174 writeln(cmdunit, "** Breakpoint word at ");
[298f0b4]3175 puthn((uint32_t)p_ba0, 8 , cmdunit);
[f40a309]3176 writeln(cmdunit, " was ");
[298f0b4]3177 puthn(0xFFFFL & (uint32_t)(*p_ba0), 4, cmdunit);
[f40a309]3178 writeln(cmdunit, " instead of ");
[298f0b4]3179 puthn((uint32_t)BPINST, 4, cmdunit);
[f40a309]3180 writeln(cmdunit, " **\r\n\n");
3181 rc = TRUE;
3182 }
3183 }
3184
[5117699]3185 if ((uint32_t)p_ba1 EQ regptr->reg_pc) {
[f40a309]3186
3187 if (*p_ba1 EQ BPINST) {
3188
3189 *p_ba1 = p_bv1;
3190 p_ba1 = 0L;
3191 p_bv1 = BPINST;
3192 rc = TRUE;
3193
3194 } else {
3195
3196 writeln(cmdunit, "** Breakpoint word at ");
[298f0b4]3197 puthn((uint32_t)p_ba0, 8 , cmdunit);
[f40a309]3198 writeln(cmdunit, " was ");
[298f0b4]3199 puthn(0xFFFFL & (uint32_t)(*p_ba1), 4, cmdunit);
[f40a309]3200 writeln(cmdunit, " instead of ");
[298f0b4]3201 puthn((uint32_t)BPINST, 4, cmdunit);
[f40a309]3202 writeln(cmdunit, " **\r\n\n");
3203 rc = TRUE;
3204 }
3205 }
[fa38804]3206
[f40a309]3207 if (p_ba0) {
3208
3209 if (*p_ba0 EQ BPINST) {
3210
3211 *p_ba0 = p_bv0;
3212 p_ba0 = 0L;
3213 p_bv0 = BPINST;
3214 rc = TRUE;
3215
3216 } else {
3217
3218 writeln(cmdunit, "** Breakpoint word at ");
[298f0b4]3219 puthn((uint32_t)p_ba0, 8 , cmdunit);
[f40a309]3220 writeln(cmdunit, " was ");
[298f0b4]3221 puthn(0xFFFFL & (uint32_t)(*p_ba0), 4, cmdunit);
[f40a309]3222 writeln(cmdunit, " instead of ");
[298f0b4]3223 puthn((uint32_t)BPINST, 4, cmdunit);
[f40a309]3224 writeln(cmdunit, " **\r\n\n");
3225 rc = TRUE;
3226 }
3227 }
3228
3229 if (p_ba1) {
3230
3231 if (*p_ba1 EQ BPINST) {
3232
3233 *p_ba1 = p_bv1;
3234 p_ba1 = 0L;
3235 p_bv1 = BPINST;
3236 rc = TRUE;
3237
3238 } else {
3239
3240 writeln(cmdunit, "** Breakpoint word at ");
[298f0b4]3241 puthn((uint32_t)p_ba0, 8 , cmdunit);
[f40a309]3242 writeln(cmdunit, " was ");
[298f0b4]3243 puthn(0xFFFFL & (uint32_t)(*p_ba1), 4, cmdunit);
[f40a309]3244 writeln(cmdunit, " instead of ");
[298f0b4]3245 puthn((uint32_t)BPINST, 4, cmdunit);
[f40a309]3246 writeln(cmdunit, " **\r\n\n");
3247 rc = TRUE;
3248 }
3249 }
3250
3251 if (rc)
3252 return(rc);
3253
3254 writeln(cmdunit, "\r\n** Program invoked ROMP trap **\r\n");
3255 return(FALSE);
3256}
3257
3258/*
3259 ============================================================================
3260 cx_regs() -- process the regs command
3261 ============================================================================
3262*/
3263
[7258c6a]3264int16_t cx_regs(void)
[f40a309]3265{
3266 showrs(regptr);
3267 return(TRUE);
3268}
3269
3270/*
3271 ============================================================================
3272 rompbp() -- process a breakpoint for ROMP
3273 ============================================================================
3274*/
3275
[7ecfb7b]3276void rompbp(uint32_t d0, ...)
[f40a309]3277{
[7258c6a]3278 register int16_t i;
[f40a309]3279
3280 regptr = (struct regs *)&d0; /* make registers accessable */
[7ecfb7b]3281 regptr->reg_pc -= 2L; /* adjust pc */
[f40a309]3282
3283 if (-1 EQ setipl(iplev)) /* enable interrupts */
3284 writeln(cmdunit, "\r\n\n***** setipl() failed *****\r\n\n");
3285
3286 if (first1) { /* initial entry from xtrap15() */
3287
3288 for (i = 0; i < 8; i++) /* clear d0..d7 */
3289 regptr->d_reg[i] = 0L;
3290
3291 for (i = 0; i < 7; i++) /* clear a0..a6 */
[298f0b4]3292 regptr->a_reg[i] = 0L;
[f40a309]3293
3294 regptr->a_reg[7] = ISTACK; /* setup initial stack */
3295
[7ecfb7b]3296 regptr->reg_sr = INITSR; /* setup sr */
3297 regptr->reg_pc += 2L; /* adjust pc past TRAP 15 */
[f40a309]3298
3299 } else { /* breakpoint */
3300
3301 writeln(cmdunit, "\r\n\n** ROMP Breakpoint TRAP **\r\n");
3302
3303 showrs(regptr); /* show registers */
3304
[7ecfb7b]3305 if (bphit() EQ FALSE) /* fixup breakpoints */
3306 regptr->reg_pc += 2L; /* and maybe the pc */
[f40a309]3307
3308 }
3309
3310 first1 = FALSE; /* not first time any more */
3311 exflag = FALSE; /* clear exit flag */
3312
3313 do {
3314
3315 do_cmd(); /* process commands ... */
3316
3317 } while (!exflag); /* ... until exit flag is set */
3318
3319 return; /* return to xtrap15 */
3320}
3321
3322/*
3323 ============================================================================
3324 progid() -- identify the program
3325 ============================================================================
3326*/
3327
[0580615]3328void progid(void)
[f40a309]3329{
[7258c6a]3330 register int8_t *pcptr;
[f40a309]3331
3332#if TINYMSG
3333
3334#if ON_B700
3335 writeln(cmdunit, "\r\n\nB\r\n");
3336#else
3337 writeln(cmdunit, "\r\n\nN\r\n");
3338#endif
3339
3340#else
3341
3342#if ON_B700
3343 writeln(cmdunit, "\r\n\nBuchla 700 BIOS / Debug PROM\r\n");
3344#else
3345 writeln(cmdunit, "\r\n\nNASA 3D Helmet Display BIOS / Debug PROM\r\n");
3346#endif
3347
3348 writeln(cmdunit, " ROMP Version ");
3349 writeln(cmdunit, ROMPVER);
3350
3351 writeln(cmdunit, "\r\n BIOS Version ");
[7258c6a]3352 pcptr = (int8_t *)PRM_VERS;
[298f0b4]3353 putn((uint32_t)*pcptr++, 2, cmdunit);
[f40a309]3354 BIOS(B_PUTC, cmdunit, '.');
[298f0b4]3355 putn((uint32_t)*pcptr++, 2, cmdunit);
[f40a309]3356 writeln(cmdunit, promdate);
3357
3358#endif
3359}
3360
3361#if ON_B700
3362
3363
3364/*
3365 ============================================================================
3366 pclr() -- clear the panel FIFO
3367 ============================================================================
3368*/
3369
[7258c6a]3370int16_t pclr(void)
[f40a309]3371{
[7258c6a]3372 register int16_t i;
[f40a309]3373
3374 ftimer = FIFOLIM;
3375
3376 while (-1L NE (afi = XBIOS(X_ANALOG))) { /* check panel inputs */
3377
3378 asig = 0x007F & (afi >> 8); /* signal number */
3379
3380 if (0 EQ asig) {
3381
3382 /* all keys up */
3383
3384 for (i = 0; i < 128; i++) {
3385
3386 sigtab[i][0] = 0;
3387 sigtab[i][1] = 0;
3388 }
3389
3390 break;
3391 }
3392
3393 if (ftimer-- < 0)
3394 return(FAILURE);
3395 }
3396
3397 return(SUCCESS);
3398}
3399
3400/*
3401 ============================================================================
3402 pscan() -- scan the panel and maybe even load a program from diskette
3403 ============================================================================
3404*/
3405
[7258c6a]3406int16_t pscan(void)
[f40a309]3407{
[7258c6a]3408 register int16_t i, c;
[f40a309]3409
3410 if (0 EQ ledcntr--) {
3411
3412 if ((baseled + 3) > 23) /* turn on a LED */
[5117699]3413 io_leds = (uint8_t)(baseled - 21);
[f40a309]3414 else
[5117699]3415 io_leds = (uint8_t)(baseled + 3);
[f40a309]3416
[5117699]3417 io_leds = (uint8_t)(0x80 + baseled); /* turn off a LED */
[f40a309]3418
3419 if (++baseled > 23) /* update LED number */
3420 baseled = 0;
3421
3422 ledcntr = 200;
3423 }
3424
3425 aflag = FALSE;
3426
3427 if (-1L NE (afi = XBIOS(X_ANALOG))) { /* check panel inputs */
3428
3429 asig = 0x007F & (afi >> 8); /* signal number */
3430 astat = 0x0001 & (afi >> 7); /* status */
3431 aval = 0x007F & afi; /* value */
3432
3433 if (asig) { /* active signal */
3434
3435 aflag = TRUE;
3436
3437 sigtab[asig][0] = aval;
3438 sigtab[asig][1] = astat;
3439
3440 } else { /* all keys up */
3441
3442 aflag = FALSE;
3443
3444 for (i = 0; i < 128; i++)
3445 sigtab[i][1] = 0;
3446 }
3447 }
[fa38804]3448
[f40a309]3449 if (aflag) { /* anything changed ? */
3450
3451 if (astat AND (asig EQ BOOTKEY)) { /* BOOT key */
3452
3453 for (i = 0; i < 24; i++) /* turn off LEDs */
[5117699]3454 io_leds = (uint8_t)(0x80 + i);
[f40a309]3455
3456 io_leds = 0x1F; /* turn off LCD lamp */
3457
3458 /* load and run BOOTFILE */
3459
3460 B_log_s = FALSE;
3461 B_dbg_s = FALSE;
3462
3463 hdvini();
3464 _bpbin = FALSE;
3465
3466 if (booter(BOOTFILE, 0L))
3467 return(FALSE);
3468 else
[add86dd]3469 sjumpto((void *)B_buf_a, (void *)ISTACK);
[f40a309]3470
3471 } else if (astat AND (asig EQ ROMPKEY)) { /* ROMP key */
3472
3473 for (i = 0; i < 24; i++) /* turn off LEDs */
[5117699]3474 io_leds = (uint8_t)(0x80 + i);
[f40a309]3475
3476 return(TRUE);
3477 }
3478 }
3479
3480 if (BIOS(B_RDAV, CON_DEV)) {
3481
3482 c = 0x007F & BIOS(B_GETC, CON_DEV);
3483
3484 if ((c EQ 'r') OR (c EQ 'R'))
3485 return(TRUE);
3486 }
3487
3488 return(FALSE);
3489}
3490#endif
3491
3492/*
3493 ============================================================================
3494 romp main routine
3495 ============================================================================
3496*/
3497
[0580615]3498void main(void)
[f40a309]3499{
[7258c6a]3500 register int16_t i;
3501 register int8_t *pdptr, *pcptr;
[f40a309]3502
3503 /* unpack PROM date */
3504
[7258c6a]3505 pcptr = (int8_t *)PRM_DATE; /* prom date: yyyymmdd */
[f40a309]3506 pdptr = promdate; /* -- yyyy-mm-dd */
3507 *pdptr++ = ' ';
3508 *pdptr++ = '-';
3509 *pdptr++ = '-';
3510 *pdptr++ = ' ';
[5117699]3511 *pdptr++ = (int8_t)(((*pcptr >> 4) & 0x0F) + '0');
3512 *pdptr++ = (int8_t)((*pcptr++ & 0x0F) + '0');
3513 *pdptr++ = (int8_t)(((*pcptr >> 4) & 0x0F) + '0');
3514 *pdptr++ = (int8_t)((*pcptr++ & 0x0F) + '0');
[f40a309]3515 *pdptr++ = '-';
[5117699]3516 *pdptr++ = (int8_t)(((*pcptr >> 4) & 0x0F) + '0');
3517 *pdptr++ = (int8_t)((*pcptr++ & 0x0F) + '0');
[f40a309]3518 *pdptr++ = '-';
[5117699]3519 *pdptr++ = (int8_t)(((*pcptr >> 4) & 0x0F) + '0');
3520 *pdptr++ = (int8_t)((*pcptr++ & 0x0F) + '0');
[f40a309]3521 *pdptr++ = '\0';
3522
3523 /* initialize variables */
3524
3525 sprintf(hs_mtst, "[[start=$%lX],[end=$%lx]] (or $8..$%lX)",
3526 USER_RAM, RAM_TOP, (USER_RAM - 2L));
3527
3528 cmdunit = CON_DEV;
3529
3530 ilast = 0;
3531 inext = 0;
3532 iplev = DEFIPL;
3533
3534 dflag = FALSE;
3535 exflag = FALSE;
3536 redo = FALSE;
3537 goflag = FALSE;
3538 b0flag = FALSE;
3539 b1flag = FALSE;
3540
[add86dd]3541 p_goto = ROMADDR;
[f40a309]3542 p_len = 0L;
3543 p_width = 16L;
3544 p_value = 0L;
3545
3546 p_ba0 = 0L;
3547 p_bv0 = BPINST;
3548
3549 p_ba1 = 0L;
3550 p_bv1 = BPINST;
3551
3552 tba0 = 0L;
3553 tba1 = 0L;
3554
3555 inext = 0;
3556
3557 tsetup(); /* patch the timer interrupt code */
3558
3559#if ON_B700
3560 baseled = 21; /* setup LED scan */
3561 ledcntr = 0; /* ... */
3562 io_leds = 0x9F; /* turn on LCD lamp */
3563 GLCinit(); /* reset LCD display */
3564
3565 GLCtext(0, 1, "Load GoTo");
3566 GLCtext(1, 1, "Disk ROMP");
3567
3568 GLCtext(3, 15, "Buchla 700 -- BIOS/ROMP Firmware by D.N. Lynx Crowe");
3569
3570 sprintf(idbuf, "BIOS Version %02d.%02d%s",
[7258c6a]3571 *(int8_t *)PRM_VERS, *(int8_t *)(PRM_VERS+1), promdate);
[f40a309]3572 GLCtext(5, 30, idbuf);
3573
3574 sprintf(idbuf, "ROMP Version %s", ROMPVER);
3575 GLCtext(6, 30, idbuf);
3576 GLCcrc(0, 0);
3577
[7ecfb7b]3578 BIOS(B_SETV, 47, trap15); /* set ROMP trap vec */
[f40a309]3579
3580 for (i = 0; i < 128; i++) {
3581
3582 sigtab[i][0] = 0;
3583 sigtab[i][1] = 0;
3584 }
3585
3586 XBIOS(X_CLRAFI); /* clear the panel FIFO */
3587 setipl(KB_EI); /* enable interrupts */
3588 pclr(); /* empty the panel FIFO */
3589 XBIOS(X_CLRAFI); /* clear the panel FIFO */
3590
3591 while (FALSE EQ pscan()) ; /* do the panel scan */
3592#endif
3593
[fa38804]3594
[f40a309]3595 if (setjmp(&restart)) /* setup restart point */
3596 writeln(cmdunit, "\r\n***** ROMP Re-starting *****\r\n\n");
3597
3598 tsetup(); /* patch the timer interrupt code */
3599 progid(); /* identify the program */
3600
[7ecfb7b]3601 BIOS(B_SETV, 47, trap15); /* set ROMP trap vec */
[f40a309]3602 writeln(cmdunit, "\r\n\n");
3603
3604 /* process commands */
3605
3606 first1 = TRUE; /* set break init flag */
3607
3608 while (TRUE) {
3609
3610 xtrap15(); /* trap into ROMP bp processor */
3611 writeln(cmdunit, "\r\n** xtrap15() returned to ROMP **\r\n\n");
3612 }
3613}
[6262b5c]3614
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