source: buchla-68k/vlib/viint.s@ f40d52b

Last change on this file since f40d52b was 109c83b, checked in by Thomas Lopatic <thomas@…>, 7 years ago

Compiled full ROM in Hatari.
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[109c83b]1* ------------------------------------------------------------------------------
2* viint.s -- VSDD Vertical Interval interrupt handler for the Buchla 700
3* Version 17 -- 1989-12-19 -- D.N. Lynx Crowe
4*
5* VIint
6*
7* VSDD Vertical Interval interrupt handler. Enables display of
8* any object whose bit is set in vi_ctl. Bit 0 = object 0, etc.
9*
10* SetPri() uses BIOS(B_SETV, 25, VIint) to set the interrupt
11* vector and lets VIint() enable the object. If vi_dis
12* is set, SetPri() won't enable the interrupt or set the vector
13* so that several objects can be started up at once.
14*
15* This routine also sets the base address and scroll offset
16* for the score display object if vi_sadr is non-zero,
17* after a delay for VSDD FRAMESTOP synchronization.
18* ------------------------------------------------------------------------------
19 .text
20*
21 .xdef _VIint * Vertical Interval int. handler
22*
23 .xdef _vi_sadr * score object base address
24 .xdef _vi_scrl * score object scroll offset
25 .xdef lclsadr * local scroll address
26 .xdef lclscrl * local scroll offset
27 .xdef vdelay * VSDD scroll delay
28*
29 .xdef VIct1 * VSDD interrupt R11
30 .xdef VIct2 * VSDD interrupt R11
31 .xdef VIct3 * VSDD interrupt R11
32 .xdef VIct4 * VSDD interrupt R11
33*
34 .xref _v_regs * VSDD registers
35 .xref _v_odtab * VSDD object descriptor table
36*
37 .xref _vi_clk * scroll delay timer
38 .xref _vi_ctl * unblank control word
39 .xref _vi_tag * VSDD 'needs service' tag
40*
41 .page
42*
43* Miscellaneous equates:
44* ----------------------
45*
46DELAY .equ 17 * FRAMESTOP sync delay in Ms
47STACKSR .equ 32 * offset to sr on stack
48V_BLA .equ 4 * V_BLA (blank) bit number
49VSDD_R5 .equ 10 * VSDD R5 byte offset in _v_regs
50VSDD_R11 .equ 22 * VSDD R11 byte offset in _v_regs
51*
52VT_BASE .equ 128 * word offset of VSDD Access Table
53*
54VT_1 .equ VT_BASE+300 * high time
55VT_2 .equ VT_BASE+2 * low time
56* ------------------------------------------------------------------------------
57*
58* Stack picture after movem.l at entry:
59* -------------------------------------
60*
61* LONG PC +34
62* WORD SR +32 STACKSR
63* LONG A6 +28
64* LONG A2 +24
65* LONG A1 +20
66* LONG A0 +16
67* LONG D3 +12
68* LONG D2 +8
69* LONG D1 +4
70* LONG D0 +0
71*
72* ------------------------------------------------------------------------------
73*
74 .page
75*
76* _VIint -- Vertical interval interrupt handler
77* ------ -----------------------------------
78_VIint: movem.l d0-d3/a0-a2/a6,-(a7) * save registers
79 addi.w #$0100,STACKSR(a7) * raise IPL in sr on the stack
80*
81 move.w _v_regs+VSDD_R11,VIct1 * save the VSDD R11 value
82*
83 tst.w _vi_sadr * see if we should scroll
84 beq viunbl * jump if not
85*
86* ------------------------------------------------------------------------------
87* setup delayed scroll parameters
88* ------------------------------------------------------------------------------
89 move.w _v_regs+VSDD_R5,d0 * get VSDD R5
90 move.w d0,d1 * save it for later
91 andi.w #$0180,d0 * see if we're already in bank 0
92 beq dlyscrl * jump if so
93*
94 clr.w _v_regs+VSDD_R5 * set bank 0
95*
96 move.w _v_regs+VSDD_R11,VIct2 * save the VSDD R11 value
97*
98vw1a: cmp.w #VT_1,_v_regs+VSDD_R11 * wait for FRAMESTOP
99 bcc vw1a * ...
100*
101vw2a: cmp.w #VT_1,_v_regs+VSDD_R11 * ...
102 bcs vw2a * ...
103*
104vw3a: cmp.w #VT_1,_v_regs+VSDD_R11 * ...
105 bcc vw3a * ...
106*
107vw4a: cmp.w #VT_2,_v_regs+VSDD_R11 * ...
108 bcs vw4a * ...
109*
110dlyscrl: tst.w _vi_tag * wait for previous scroll
111 bne dlyscrl * ...
112*
113 move.w _vi_sadr,lclsadr * save address for timeint
114 move.w _vi_scrl,lclscrl * save offset for timeint
115 clr.w _vi_sadr * reset for next time
116 clr.w _vi_scrl * ...
117 move.w vdelay,_vi_clk * set the scroll delay timer
118 st _vi_tag * set the 'need service' tag
119* ------------------------------------------------------------------------------
120* check for unblank requests
121* ------------------------------------------------------------------------------
122 move.w _vi_ctl,d2 * get the unblank control word
123 beq viexit * exit if nothing to unblank
124*
125 bra unblnk * go unblank some objects
126*
127viunbl: move.w _vi_ctl,d2 * get the unblank control word
128 beq vidone * exit if nothing to unblank
129*
130 move.w _v_regs+VSDD_R5,d0 * get VSDD R5
131 move.w d0,d1 * save it for later
132 andi.w #$0180,d0 * see if we're already in bank 0
133 beq unblnk * jump if so
134*
135 clr.w _v_regs+VSDD_R5 * set bank 0
136*
137 move.w _v_regs+VSDD_R11,VIct3 * save the VSDD R11 value
138*
139vw1b: cmp.w #VT_1,_v_regs+VSDD_R11 * wait for FRAMESTOP
140 bcc vw1b * ...
141*
142vw2b: cmp.w #VT_1,_v_regs+VSDD_R11 * ...
143 bcs vw2b * ...
144*
145vw3b: cmp.w #VT_1,_v_regs+VSDD_R11 * ...
146 bcc vw3b * ...
147*
148vw4b: cmp.w #VT_2,_v_regs+VSDD_R11 * ...
149 bcs vw4b * ...
150*
151 .page
152*
153* ------------------------------------------------------------------------------
154* unblank objects indicated by contents of d2 (loaded earlier from _vi_ctl)
155* ------------------------------------------------------------------------------
156*
157unblnk: clr.w d3 * clear the counter
158 clr.w _vi_ctl * clear the unblank control word
159 lea _v_odtab,a1 * point at first object
160*
161vicheck: btst d3,d2 * check the object bit
162 beq vinext * go check next one if not set
163*
164 move.w (a1),d0 * get v_odtab[obj][0]
165 bclr #V_BLA,d0 * clear the blanking bit
166 move.w d0,(a1) * set v_odtab[obj][0]
167*
168vinext: cmpi.w #15,d3 * see if we're done
169 beq viexit * jump if so
170*
171 addq.l #8,a1 * point at next object
172 addq.w #1,d3 * increment object counter
173 bra vicheck * go check next object
174*
175* ------------------------------------------------------------------------------
176* switch back to the bank the interrupted code was using if we changed it
177* ------------------------------------------------------------------------------
178*
179viexit: move.w d1,d0 * see if we were in bank 0
180 andi.w #$0180,d0 * ...
181 beq vidone * jump if so
182*
183viwait: tst.w _vi_tag * wait for timer to run out
184 bne viwait * ... so timeint sees bank 0
185*
186 move.w d1,_v_regs+VSDD_R5 * restore v_regs[5] to old bank
187*
188 move.w _v_regs+VSDD_R11,VIct4 * save the VSDD R11 value
189*
190vw1c: cmp.w #VT_1,_v_regs+VSDD_R11 * wait for FRAMESTOP
191 bcc vw1c * ...
192*
193vw2c: cmp.w #VT_1,_v_regs+VSDD_R11 * ...
194 bcs vw2c * ...
195*
196vw3c: cmp.w #VT_1,_v_regs+VSDD_R11 * ...
197 bcc vw3c * ...
198*
199vw4c: cmp.w #VT_2,_v_regs+VSDD_R11 * ...
200 bcs vw4c * ...
201*
202* ------------------------------------------------------------------------------
203* restore registers and return to interrupted code
204* ------------------------------------------------------------------------------
205*
206vidone: movem.l (a7)+,d0-d3/a0-a2/a6 * restore registers
207 rte * return from interrupt
208*
209 .page
210*
211* ------------------------------------------------------------------------------
212 .data
213* ------------------------------------------------------------------------------
214*
215vdelay: .dc.w DELAY * VSDD scroll delay
216*
217* ------------------------------------------------------------------------------
218 .bss
219* ------------------------------------------------------------------------------
220*
221_vi_sadr: .ds.w 1 * score object base address
222_vi_scrl: .ds.w 1 * score object scroll offset
223*
224lclsadr: .ds.w 1 * local copy of vi_sadr
225lclscrl: .ds.w 1 * local copy of vi_scrl
226*
227VIct1: .ds.w 1 * VSDD R11 value at interrupt
228VIct2: .ds.w 1 * VSDD R11 value at interrupt
229VIct3: .ds.w 1 * VSDD R11 value at interrupt
230VIct4: .ds.w 1 * VSDD R11 value at interrupt
231*
232 .end
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