[93280c2] | 1 | /*
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| 2 | must fix:
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| 3 | callm
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| 4 | chk
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| 5 | */
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| 6 | /* ======================================================================== */
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| 7 | /* ========================= LICENSING & COPYRIGHT ======================== */
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| 8 | /* ======================================================================== */
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| 9 | /*
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| 10 | * MUSASHI
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| 11 | * Version 3.4
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| 12 | *
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| 13 | * A portable Motorola M680x0 processor emulation engine.
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| 14 | * Copyright 1998-2001 Karl Stenerud. All rights reserved.
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| 15 | *
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| 16 | * Permission is hereby granted, free of charge, to any person obtaining a copy
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| 17 | * of this software and associated documentation files (the "Software"), to deal
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| 18 | * in the Software without restriction, including without limitation the rights
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| 19 | * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
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| 20 | * copies of the Software, and to permit persons to whom the Software is
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| 21 | * furnished to do so, subject to the following conditions:
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| 22 | *
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| 23 | * The above copyright notice and this permission notice shall be included in
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| 24 | * all copies or substantial portions of the Software.
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| 25 |
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| 26 | * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
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| 27 | * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
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| 28 | * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
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| 29 | * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
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| 30 | * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
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| 31 | * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
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| 32 | * THE SOFTWARE.
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| 33 | */
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| 34 |
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| 35 | /* Special thanks to Bart Trzynadlowski for his insight into the
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| 36 | * undocumented features of this chip:
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| 37 | *
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| 38 | * http://dynarec.com/~bart/files/68knotes.txt
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| 39 | */
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| 40 |
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| 41 |
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| 42 | /* Input file for m68kmake
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| 43 | * -----------------------
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| 44 | *
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| 45 | * All sections begin with 80 X's in a row followed by an end-of-line
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| 46 | * sequence.
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| 47 | * After this, m68kmake will expect to find one of the following section
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| 48 | * identifiers:
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| 49 | * M68KMAKE_PROTOTYPE_HEADER - header for opcode handler prototypes
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| 50 | * M68KMAKE_PROTOTYPE_FOOTER - footer for opcode handler prototypes
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| 51 | * M68KMAKE_TABLE_HEADER - header for opcode handler jumptable
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| 52 | * M68KMAKE_TABLE_FOOTER - footer for opcode handler jumptable
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| 53 | * M68KMAKE_TABLE_BODY - the table itself
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| 54 | * M68KMAKE_OPCODE_HANDLER_HEADER - header for opcode handler implementation
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| 55 | * M68KMAKE_OPCODE_HANDLER_FOOTER - footer for opcode handler implementation
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| 56 | * M68KMAKE_OPCODE_HANDLER_BODY - body section for opcode handler implementation
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| 57 | *
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| 58 | * NOTE: M68KMAKE_OPCODE_HANDLER_BODY must be last in the file and
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| 59 | * M68KMAKE_TABLE_BODY must be second last in the file.
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| 60 | *
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| 61 | * The M68KMAKE_OPHANDLER_BODY section contains the opcode handler
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| 62 | * primitives themselves. Each opcode handler begins with:
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| 63 | * M68KMAKE_OP(A, B, C, D)
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| 64 | *
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| 65 | * where A is the opcode handler name, B is the size of the operation,
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| 66 | * C denotes any special processing mode, and D denotes a specific
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| 67 | * addressing mode.
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| 68 | * For C and D where nothing is specified, use "."
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| 69 | *
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| 70 | * Example:
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| 71 | * M68KMAKE_OP(abcd, 8, rr, .) abcd, size 8, register to register, default EA
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| 72 | * M68KMAKE_OP(abcd, 8, mm, ax7) abcd, size 8, memory to memory, register X is A7
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| 73 | * M68KMAKE_OP(tst, 16, ., pcix) tst, size 16, PCIX addressing
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| 74 | *
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| 75 | * All opcode handler primitives end with a closing curly brace "}" at column 1
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| 76 | *
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| 77 | * NOTE: Do not place a M68KMAKE_OP() directive inside the opcode handler,
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| 78 | * and do not put a closing curly brace at column 1 unless it is
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| 79 | * marking the end of the handler!
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| 80 | *
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| 81 | * Inside the handler, m68kmake will recognize M68KMAKE_GET_OPER_xx_xx,
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| 82 | * M68KMAKE_GET_EA_xx_xx, and M68KMAKE_CC directives, and create multiple
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| 83 | * opcode handlers to handle variations in the opcode handler.
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| 84 | * Note: M68KMAKE_CC will only be interpreted in condition code opcodes.
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| 85 | * As well, M68KMAKE_GET_EA_xx_xx and M68KMAKE_GET_OPER_xx_xx will only
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| 86 | * be interpreted on instructions where the corresponding table entry
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| 87 | * specifies multiple effective addressing modes.
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| 88 | * Example:
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| 89 | * clr 32 . . 0100001010...... A+-DXWL... U U U 12 6 4
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| 90 | *
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| 91 | * This table entry says that the clr.l opcde has 7 variations (A+-DXWL).
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| 92 | * It is run in user or supervisor mode for all CPUs, and uses 12 cycles for
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| 93 | * 68000, 6 cycles for 68010, and 4 cycles for 68020.
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| 94 | */
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| 95 |
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| 96 | XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
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| 97 | M68KMAKE_PROTOTYPE_HEADER
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| 98 |
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| 99 | #ifndef M68KOPS__HEADER
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| 100 | #define M68KOPS__HEADER
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| 101 |
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| 102 | /* ======================================================================== */
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| 103 | /* ============================ OPCODE HANDLERS =========================== */
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| 104 | /* ======================================================================== */
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| 105 |
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| 106 |
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| 107 |
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| 108 | XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
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| 109 | M68KMAKE_PROTOTYPE_FOOTER
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| 110 |
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| 111 |
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| 112 | /* Build the opcode handler table */
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| 113 | void m68ki_build_opcode_table(void);
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| 114 |
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| 115 | extern void (*m68ki_instruction_jump_table[0x10000])(void); /* opcode handler jump table */
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| 116 | extern unsigned char m68ki_cycles[][0x10000];
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| 117 |
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| 118 |
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| 119 | /* ======================================================================== */
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| 120 | /* ============================== END OF FILE ============================= */
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| 121 | /* ======================================================================== */
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| 122 |
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| 123 | #endif /* M68KOPS__HEADER */
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| 124 |
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| 125 |
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| 126 |
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| 127 | XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
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| 128 | M68KMAKE_TABLE_HEADER
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| 129 |
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| 130 | /* ======================================================================== */
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| 131 | /* ========================= OPCODE TABLE BUILDER ========================= */
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| 132 | /* ======================================================================== */
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| 133 |
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| 134 | #include "m68kops.h"
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| 135 |
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| 136 | #define NUM_CPU_TYPES 3
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| 137 |
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| 138 | void (*m68ki_instruction_jump_table[0x10000])(void); /* opcode handler jump table */
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| 139 | unsigned char m68ki_cycles[NUM_CPU_TYPES][0x10000]; /* Cycles used by CPU type */
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| 140 |
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| 141 | /* This is used to generate the opcode handler jump table */
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| 142 | typedef struct
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| 143 | {
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| 144 | void (*opcode_handler)(void); /* handler function */
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| 145 | unsigned int mask; /* mask on opcode */
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| 146 | unsigned int match; /* what to match after masking */
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| 147 | unsigned char cycles[NUM_CPU_TYPES]; /* cycles each cpu type takes */
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| 148 | } opcode_handler_struct;
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| 149 |
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| 150 |
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| 151 | /* Opcode handler table */
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| 152 | static opcode_handler_struct m68k_opcode_handler_table[] =
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| 153 | {
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| 154 | /* function mask match 000 010 020 */
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| 155 |
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| 156 |
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| 157 |
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| 158 | XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
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| 159 | M68KMAKE_TABLE_FOOTER
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| 160 |
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| 161 | {0, 0, 0, {0, 0, 0}}
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| 162 | };
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| 163 |
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| 164 |
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| 165 | /* Build the opcode handler jump table */
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| 166 | void m68ki_build_opcode_table(void)
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| 167 | {
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| 168 | opcode_handler_struct *ostruct;
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| 169 | int cycle_cost;
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| 170 | int instr;
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| 171 | int i;
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| 172 | int j;
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| 173 | int k;
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| 174 |
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| 175 | for(i = 0; i < 0x10000; i++)
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| 176 | {
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| 177 | /* default to illegal */
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| 178 | m68ki_instruction_jump_table[i] = m68k_op_illegal;
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| 179 | for(k=0;k<NUM_CPU_TYPES;k++)
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| 180 | m68ki_cycles[k][i] = 0;
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| 181 | }
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| 182 |
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| 183 | ostruct = m68k_opcode_handler_table;
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| 184 | while(ostruct->mask != 0xff00)
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| 185 | {
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| 186 | for(i = 0;i < 0x10000;i++)
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| 187 | {
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| 188 | if((i & ostruct->mask) == ostruct->match)
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| 189 | {
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| 190 | m68ki_instruction_jump_table[i] = ostruct->opcode_handler;
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| 191 | for(k=0;k<NUM_CPU_TYPES;k++)
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| 192 | m68ki_cycles[k][i] = ostruct->cycles[k];
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| 193 | }
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| 194 | }
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| 195 | ostruct++;
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| 196 | }
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| 197 | while(ostruct->mask == 0xff00)
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| 198 | {
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| 199 | for(i = 0;i <= 0xff;i++)
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| 200 | {
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| 201 | m68ki_instruction_jump_table[ostruct->match | i] = ostruct->opcode_handler;
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| 202 | for(k=0;k<NUM_CPU_TYPES;k++)
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| 203 | m68ki_cycles[k][ostruct->match | i] = ostruct->cycles[k];
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| 204 | }
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| 205 | ostruct++;
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| 206 | }
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| 207 | while(ostruct->mask == 0xf1f8)
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| 208 | {
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| 209 | for(i = 0;i < 8;i++)
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| 210 | {
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| 211 | for(j = 0;j < 8;j++)
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| 212 | {
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| 213 | instr = ostruct->match | (i << 9) | j;
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| 214 | m68ki_instruction_jump_table[instr] = ostruct->opcode_handler;
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| 215 | for(k=0;k<NUM_CPU_TYPES;k++)
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| 216 | m68ki_cycles[k][instr] = ostruct->cycles[k];
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| 217 | // For all shift operations with known shift distance (encoded in instruction word)
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| 218 | if((instr & 0xf000) == 0xe000 && (!(instr & 0x20)))
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| 219 | {
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| 220 | // On the 68000 and 68010 shift distance affect execution time.
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| 221 | // Add the cycle cost of shifting; 2 times the shift distance
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| 222 | cycle_cost = ((((i-1)&7)+1)<<1);
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| 223 | m68ki_cycles[0][instr] += cycle_cost;
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| 224 | m68ki_cycles[1][instr] += cycle_cost;
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| 225 | // On the 68020 shift distance does not affect execution time
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| 226 | m68ki_cycles[2][instr] += 0;
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| 227 | }
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| 228 | }
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| 229 | }
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| 230 | ostruct++;
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| 231 | }
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| 232 | while(ostruct->mask == 0xfff0)
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| 233 | {
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| 234 | for(i = 0;i <= 0x0f;i++)
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| 235 | {
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| 236 | m68ki_instruction_jump_table[ostruct->match | i] = ostruct->opcode_handler;
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| 237 | for(k=0;k<NUM_CPU_TYPES;k++)
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| 238 | m68ki_cycles[k][ostruct->match | i] = ostruct->cycles[k];
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| 239 | }
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| 240 | ostruct++;
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| 241 | }
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| 242 | while(ostruct->mask == 0xf1ff)
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| 243 | {
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| 244 | for(i = 0;i <= 0x07;i++)
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| 245 | {
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| 246 | m68ki_instruction_jump_table[ostruct->match | (i << 9)] = ostruct->opcode_handler;
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| 247 | for(k=0;k<NUM_CPU_TYPES;k++)
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| 248 | m68ki_cycles[k][ostruct->match | (i << 9)] = ostruct->cycles[k];
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| 249 | }
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| 250 | ostruct++;
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| 251 | }
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| 252 | while(ostruct->mask == 0xfff8)
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| 253 | {
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| 254 | for(i = 0;i <= 0x07;i++)
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| 255 | {
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| 256 | m68ki_instruction_jump_table[ostruct->match | i] = ostruct->opcode_handler;
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| 257 | for(k=0;k<NUM_CPU_TYPES;k++)
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| 258 | m68ki_cycles[k][ostruct->match | i] = ostruct->cycles[k];
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| 259 | }
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| 260 | ostruct++;
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| 261 | }
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| 262 | while(ostruct->mask == 0xffff)
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| 263 | {
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| 264 | m68ki_instruction_jump_table[ostruct->match] = ostruct->opcode_handler;
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| 265 | for(k=0;k<NUM_CPU_TYPES;k++)
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| 266 | m68ki_cycles[k][ostruct->match] = ostruct->cycles[k];
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| 267 | ostruct++;
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| 268 | }
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| 269 | }
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| 270 |
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| 271 |
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| 272 | /* ======================================================================== */
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| 273 | /* ============================== END OF FILE ============================= */
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| 274 | /* ======================================================================== */
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| 275 |
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| 276 |
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| 277 |
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| 278 | XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
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| 279 | M68KMAKE_OPCODE_HANDLER_HEADER
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| 280 |
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| 281 | #include "m68kcpu.h"
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| 282 |
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| 283 | /* ======================================================================== */
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| 284 | /* ========================= INSTRUCTION HANDLERS ========================= */
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| 285 | /* ======================================================================== */
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| 286 |
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| 287 |
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| 288 |
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| 289 | XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
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| 290 | M68KMAKE_OPCODE_HANDLER_FOOTER
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| 291 |
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| 292 | /* ======================================================================== */
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| 293 | /* ============================== END OF FILE ============================= */
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| 294 | /* ======================================================================== */
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| 295 |
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| 296 |
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| 297 |
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| 298 | XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
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| 299 | M68KMAKE_TABLE_BODY
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| 300 |
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| 301 | The following table is arranged as follows:
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| 302 |
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| 303 | name: Opcode mnemonic
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| 304 |
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| 305 | size: Operation size
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| 306 |
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| 307 | spec proc: Special processing mode:
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| 308 | .: normal
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| 309 | s: static operand
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| 310 | r: register operand
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| 311 | rr: register to register
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| 312 | mm: memory to memory
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| 313 | er: effective address to register
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| 314 | re: register to effective address
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| 315 | dd: data register to data register
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| 316 | da: data register to address register
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| 317 | aa: address register to address register
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| 318 | cr: control register to register
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| 319 | rc: register to control register
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| 320 | toc: to condition code register
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| 321 | tos: to status register
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| 322 | tou: to user stack pointer
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| 323 | frc: from condition code register
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| 324 | frs: from status register
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| 325 | fru: from user stack pointer
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| 326 | * for move.x, the special processing mode is a specific
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| 327 | destination effective addressing mode.
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| 328 |
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| 329 | spec ea: Specific effective addressing mode:
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| 330 | .: normal
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| 331 | i: immediate
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| 332 | d: data register
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| 333 | a: address register
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| 334 | ai: address register indirect
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| 335 | pi: address register indirect with postincrement
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| 336 | pd: address register indirect with predecrement
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| 337 | di: address register indirect with displacement
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| 338 | ix: address register indirect with index
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| 339 | aw: absolute word address
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| 340 | al: absolute long address
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| 341 | pcdi: program counter relative with displacement
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| 342 | pcix: program counter relative with index
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| 343 | a7: register specified in instruction is A7
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| 344 | ax7: register field X of instruction is A7
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| 345 | ay7: register field Y of instruction is A7
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| 346 | axy7: register fields X and Y of instruction are A7
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| 347 |
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| 348 | bit pattern: Pattern to recognize this opcode. "." means don't care.
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| 349 |
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| 350 | allowed ea: List of allowed addressing modes:
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| 351 | .: not present
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| 352 | A: address register indirect
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| 353 | +: ARI (address register indirect) with postincrement
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| 354 | -: ARI with predecrement
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| 355 | D: ARI with displacement
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| 356 | X: ARI with index
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| 357 | W: absolute word address
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| 358 | L: absolute long address
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| 359 | d: program counter indirect with displacement
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| 360 | x: program counter indirect with index
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| 361 | I: immediate
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| 362 | mode: CPU operating mode for each cpu type. U = user or supervisor,
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| 363 | S = supervisor only, "." = opcode not present.
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| 364 |
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| 365 | cpu cycles: Base number of cycles required to execute this opcode on the
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| 366 | specified CPU type.
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| 367 | Use "." if CPU does not have this opcode.
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| 368 |
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| 369 |
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| 370 |
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| 371 | spec spec allowed ea mode cpu cycles
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| 372 | name size proc ea bit pattern A+-DXWLdxI 0 1 2 000 010 020 comments
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| 373 | ====== ==== ==== ==== ================ ========== = = = === === === =============
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| 374 | M68KMAKE_TABLE_START
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| 375 | 1010 0 . . 1010............ .......... U U U 4 4 4
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| 376 | 1111 0 . . 1111............ .......... U U U 4 4 4
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| 377 | abcd 8 rr . 1100...100000... .......... U U U 6 6 4
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| 378 | abcd 8 mm ax7 1100111100001... .......... U U U 18 18 16
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| 379 | abcd 8 mm ay7 1100...100001111 .......... U U U 18 18 16
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| 380 | abcd 8 mm axy7 1100111100001111 .......... U U U 18 18 16
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| 381 | abcd 8 mm . 1100...100001... .......... U U U 18 18 16
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| 382 | add 8 er d 1101...000000... .......... U U U 4 4 2
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| 383 | add 8 er . 1101...000...... A+-DXWLdxI U U U 4 4 2
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| 384 | add 16 er d 1101...001000... .......... U U U 4 4 2
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| 385 | add 16 er a 1101...001001... .......... U U U 4 4 2
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| 386 | add 16 er . 1101...001...... A+-DXWLdxI U U U 4 4 2
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| 387 | add 32 er d 1101...010000... .......... U U U 6 6 2
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| 388 | add 32 er a 1101...010001... .......... U U U 6 6 2
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| 389 | add 32 er . 1101...010...... A+-DXWLdxI U U U 6 6 2
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| 390 | add 8 re . 1101...100...... A+-DXWL... U U U 8 8 4
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| 391 | add 16 re . 1101...101...... A+-DXWL... U U U 8 8 4
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| 392 | add 32 re . 1101...110...... A+-DXWL... U U U 12 12 4
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| 393 | adda 16 . d 1101...011000... .......... U U U 8 8 2
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| 394 | adda 16 . a 1101...011001... .......... U U U 8 8 2
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| 395 | adda 16 . . 1101...011...... A+-DXWLdxI U U U 8 8 2
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| 396 | adda 32 . d 1101...111000... .......... U U U 6 6 2
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| 397 | adda 32 . a 1101...111001... .......... U U U 6 6 2
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| 398 | adda 32 . . 1101...111...... A+-DXWLdxI U U U 6 6 2
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| 399 | addi 8 . d 0000011000000... .......... U U U 8 8 2
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| 400 | addi 8 . . 0000011000...... A+-DXWL... U U U 12 12 4
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| 401 | addi 16 . d 0000011001000... .......... U U U 8 8 2
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| 402 | addi 16 . . 0000011001...... A+-DXWL... U U U 12 12 4
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| 403 | addi 32 . d 0000011010000... .......... U U U 16 14 2
|
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| 404 | addi 32 . . 0000011010...... A+-DXWL... U U U 20 20 4
|
---|
| 405 | addq 8 . d 0101...000000... .......... U U U 4 4 2
|
---|
| 406 | addq 8 . . 0101...000...... A+-DXWL... U U U 8 8 4
|
---|
| 407 | addq 16 . d 0101...001000... .......... U U U 4 4 2
|
---|
| 408 | addq 16 . a 0101...001001... .......... U U U 4 4 2
|
---|
| 409 | addq 16 . . 0101...001...... A+-DXWL... U U U 8 8 4
|
---|
| 410 | addq 32 . d 0101...010000... .......... U U U 8 8 2
|
---|
| 411 | addq 32 . a 0101...010001... .......... U U U 8 8 2
|
---|
| 412 | addq 32 . . 0101...010...... A+-DXWL... U U U 12 12 4
|
---|
| 413 | addx 8 rr . 1101...100000... .......... U U U 4 4 2
|
---|
| 414 | addx 16 rr . 1101...101000... .......... U U U 4 4 2
|
---|
| 415 | addx 32 rr . 1101...110000... .......... U U U 8 6 2
|
---|
| 416 | addx 8 mm ax7 1101111100001... .......... U U U 18 18 12
|
---|
| 417 | addx 8 mm ay7 1101...100001111 .......... U U U 18 18 12
|
---|
| 418 | addx 8 mm axy7 1101111100001111 .......... U U U 18 18 12
|
---|
| 419 | addx 8 mm . 1101...100001... .......... U U U 18 18 12
|
---|
| 420 | addx 16 mm . 1101...101001... .......... U U U 18 18 12
|
---|
| 421 | addx 32 mm . 1101...110001... .......... U U U 30 30 12
|
---|
| 422 | and 8 er d 1100...000000... .......... U U U 4 4 2
|
---|
| 423 | and 8 er . 1100...000...... A+-DXWLdxI U U U 4 4 2
|
---|
| 424 | and 16 er d 1100...001000... .......... U U U 4 4 2
|
---|
| 425 | and 16 er . 1100...001...... A+-DXWLdxI U U U 4 4 2
|
---|
| 426 | and 32 er d 1100...010000... .......... U U U 6 6 2
|
---|
| 427 | and 32 er . 1100...010...... A+-DXWLdxI U U U 6 6 2
|
---|
| 428 | and 8 re . 1100...100...... A+-DXWL... U U U 8 8 4
|
---|
| 429 | and 16 re . 1100...101...... A+-DXWL... U U U 8 8 4
|
---|
| 430 | and 32 re . 1100...110...... A+-DXWL... U U U 12 12 4
|
---|
| 431 | andi 16 toc . 0000001000111100 .......... U U U 20 16 12
|
---|
| 432 | andi 16 tos . 0000001001111100 .......... S S S 20 16 12
|
---|
| 433 | andi 8 . d 0000001000000... .......... U U U 8 8 2
|
---|
| 434 | andi 8 . . 0000001000...... A+-DXWL... U U U 12 12 4
|
---|
| 435 | andi 16 . d 0000001001000... .......... U U U 8 8 2
|
---|
| 436 | andi 16 . . 0000001001...... A+-DXWL... U U U 12 12 4
|
---|
| 437 | andi 32 . d 0000001010000... .......... U U U 14 14 2
|
---|
| 438 | andi 32 . . 0000001010...... A+-DXWL... U U U 20 20 4
|
---|
| 439 | asr 8 s . 1110...000000... .......... U U U 6 6 6
|
---|
| 440 | asr 16 s . 1110...001000... .......... U U U 6 6 6
|
---|
| 441 | asr 32 s . 1110...010000... .......... U U U 8 8 6
|
---|
| 442 | asr 8 r . 1110...000100... .......... U U U 6 6 6
|
---|
| 443 | asr 16 r . 1110...001100... .......... U U U 6 6 6
|
---|
| 444 | asr 32 r . 1110...010100... .......... U U U 8 8 6
|
---|
| 445 | asr 16 . . 1110000011...... A+-DXWL... U U U 8 8 5
|
---|
| 446 | asl 8 s . 1110...100000... .......... U U U 6 6 8
|
---|
| 447 | asl 16 s . 1110...101000... .......... U U U 6 6 8
|
---|
| 448 | asl 32 s . 1110...110000... .......... U U U 8 8 8
|
---|
| 449 | asl 8 r . 1110...100100... .......... U U U 6 6 8
|
---|
| 450 | asl 16 r . 1110...101100... .......... U U U 6 6 8
|
---|
| 451 | asl 32 r . 1110...110100... .......... U U U 8 8 8
|
---|
| 452 | asl 16 . . 1110000111...... A+-DXWL... U U U 8 8 6
|
---|
| 453 | bcc 8 . . 0110............ .......... U U U 10 10 6
|
---|
| 454 | bcc 16 . . 0110....00000000 .......... U U U 10 10 6
|
---|
| 455 | bcc 32 . . 0110....11111111 .......... . . U . . 6
|
---|
| 456 | bchg 8 r . 0000...101...... A+-DXWL... U U U 8 8 4
|
---|
| 457 | bchg 32 r d 0000...101000... .......... U U U 8 8 4
|
---|
| 458 | bchg 8 s . 0000100001...... A+-DXWL... U U U 12 12 4
|
---|
| 459 | bchg 32 s d 0000100001000... .......... U U U 12 12 4
|
---|
| 460 | bclr 8 r . 0000...110...... A+-DXWL... U U U 8 10 4
|
---|
| 461 | bclr 32 r d 0000...110000... .......... U U U 10 10 4
|
---|
| 462 | bclr 8 s . 0000100010...... A+-DXWL... U U U 12 12 4
|
---|
| 463 | bclr 32 s d 0000100010000... .......... U U U 14 14 4
|
---|
| 464 | bfchg 32 . d 1110101011000... .......... . . U . . 12 timing not quite correct
|
---|
| 465 | bfchg 32 . . 1110101011...... A..DXWL... . . U . . 20
|
---|
| 466 | bfclr 32 . d 1110110011000... .......... . . U . . 12
|
---|
| 467 | bfclr 32 . . 1110110011...... A..DXWL... . . U . . 20
|
---|
| 468 | bfexts 32 . d 1110101111000... .......... . . U . . 8
|
---|
| 469 | bfexts 32 . . 1110101111...... A..DXWLdx. . . U . . 15
|
---|
| 470 | bfextu 32 . d 1110100111000... .......... . . U . . 8
|
---|
| 471 | bfextu 32 . . 1110100111...... A..DXWLdx. . . U . . 15
|
---|
| 472 | bfffo 32 . d 1110110111000... .......... . . U . . 18
|
---|
| 473 | bfffo 32 . . 1110110111...... A..DXWLdx. . . U . . 28
|
---|
| 474 | bfins 32 . d 1110111111000... .......... . . U . . 10
|
---|
| 475 | bfins 32 . . 1110111111...... A..DXWL... . . U . . 17
|
---|
| 476 | bfset 32 . d 1110111011000... .......... . . U . . 12
|
---|
| 477 | bfset 32 . . 1110111011...... A..DXWL... . . U . . 20
|
---|
| 478 | bftst 32 . d 1110100011000... .......... . . U . . 6
|
---|
| 479 | bftst 32 . . 1110100011...... A..DXWLdx. . . U . . 13
|
---|
| 480 | bkpt 0 . . 0100100001001... .......... . U U . 10 10
|
---|
| 481 | bra 8 . . 01100000........ .......... U U U 10 10 10
|
---|
| 482 | bra 16 . . 0110000000000000 .......... U U U 10 10 10
|
---|
| 483 | bra 32 . . 0110000011111111 .......... U U U . . 10
|
---|
| 484 | bset 32 r d 0000...111000... .......... U U U 8 8 4
|
---|
| 485 | bset 8 r . 0000...111...... A+-DXWL... U U U 8 8 4
|
---|
| 486 | bset 8 s . 0000100011...... A+-DXWL... U U U 12 12 4
|
---|
| 487 | bset 32 s d 0000100011000... .......... U U U 12 12 4
|
---|
| 488 | bsr 8 . . 01100001........ .......... U U U 18 18 7
|
---|
| 489 | bsr 16 . . 0110000100000000 .......... U U U 18 18 7
|
---|
| 490 | bsr 32 . . 0110000111111111 .......... . . U . . 7
|
---|
| 491 | btst 8 r . 0000...100...... A+-DXWLdxI U U U 4 4 4
|
---|
| 492 | btst 32 r d 0000...100000... .......... U U U 6 6 4
|
---|
| 493 | btst 8 s . 0000100000...... A+-DXWLdx. U U U 8 8 4
|
---|
| 494 | btst 32 s d 0000100000000... .......... U U U 10 10 4
|
---|
| 495 | callm 32 . . 0000011011...... A..DXWLdx. . . U . . 60 not properly emulated
|
---|
| 496 | cas 8 . . 0000101011...... A+-DXWL... . . U . . 12
|
---|
| 497 | cas 16 . . 0000110011...... A+-DXWL... . . U . . 12
|
---|
| 498 | cas 32 . . 0000111011...... A+-DXWL... . . U . . 12
|
---|
| 499 | cas2 16 . . 0000110011111100 .......... . . U . . 12
|
---|
| 500 | cas2 32 . . 0000111011111100 .......... . . U . . 12
|
---|
| 501 | chk 16 . d 0100...110000... .......... U U U 10 8 8
|
---|
| 502 | chk 16 . . 0100...110...... A+-DXWLdxI U U U 10 8 8
|
---|
| 503 | chk 32 . d 0100...100000... .......... . . U . . 8
|
---|
| 504 | chk 32 . . 0100...100...... A+-DXWLdxI . . U . . 8
|
---|
| 505 | chk2cmp2 8 . pcdi 0000000011111010 .......... . . U . . 23
|
---|
| 506 | chk2cmp2 8 . pcix 0000000011111011 .......... . . U . . 23
|
---|
| 507 | chk2cmp2 8 . . 0000000011...... A..DXWL... . . U . . 18
|
---|
| 508 | chk2cmp2 16 . pcdi 0000001011111010 .......... . . U . . 23
|
---|
| 509 | chk2cmp2 16 . pcix 0000001011111011 .......... . . U . . 23
|
---|
| 510 | chk2cmp2 16 . . 0000001011...... A..DXWL... . . U . . 18
|
---|
| 511 | chk2cmp2 32 . pcdi 0000010011111010 .......... . . U . . 23
|
---|
| 512 | chk2cmp2 32 . pcix 0000010011111011 .......... . . U . . 23
|
---|
| 513 | chk2cmp2 32 . . 0000010011...... A..DXWL... . . U . . 18
|
---|
| 514 | clr 8 . d 0100001000000... .......... U U U 4 4 2
|
---|
| 515 | clr 8 . . 0100001000...... A+-DXWL... U U U 8 4 4
|
---|
| 516 | clr 16 . d 0100001001000... .......... U U U 4 4 2
|
---|
| 517 | clr 16 . . 0100001001...... A+-DXWL... U U U 8 4 4
|
---|
| 518 | clr 32 . d 0100001010000... .......... U U U 6 6 2
|
---|
| 519 | clr 32 . . 0100001010...... A+-DXWL... U U U 12 6 4
|
---|
| 520 | cmp 8 . d 1011...000000... .......... U U U 4 4 2
|
---|
| 521 | cmp 8 . . 1011...000...... A+-DXWLdxI U U U 4 4 2
|
---|
| 522 | cmp 16 . d 1011...001000... .......... U U U 4 4 2
|
---|
| 523 | cmp 16 . a 1011...001001... .......... U U U 4 4 2
|
---|
| 524 | cmp 16 . . 1011...001...... A+-DXWLdxI U U U 4 4 2
|
---|
| 525 | cmp 32 . d 1011...010000... .......... U U U 6 6 2
|
---|
| 526 | cmp 32 . a 1011...010001... .......... U U U 6 6 2
|
---|
| 527 | cmp 32 . . 1011...010...... A+-DXWLdxI U U U 6 6 2
|
---|
| 528 | cmpa 16 . d 1011...011000... .......... U U U 6 6 4
|
---|
| 529 | cmpa 16 . a 1011...011001... .......... U U U 6 6 4
|
---|
| 530 | cmpa 16 . . 1011...011...... A+-DXWLdxI U U U 6 6 4
|
---|
| 531 | cmpa 32 . d 1011...111000... .......... U U U 6 6 4
|
---|
| 532 | cmpa 32 . a 1011...111001... .......... U U U 6 6 4
|
---|
| 533 | cmpa 32 . . 1011...111...... A+-DXWLdxI U U U 6 6 4
|
---|
| 534 | cmpi 8 . d 0000110000000... .......... U U U 8 8 2
|
---|
| 535 | cmpi 8 . . 0000110000...... A+-DXWL... U U U 8 8 2
|
---|
| 536 | cmpi 8 . pcdi 0000110000111010 .......... . . U . . 7
|
---|
| 537 | cmpi 8 . pcix 0000110000111011 .......... . . U . . 9
|
---|
| 538 | cmpi 16 . d 0000110001000... .......... U U U 8 8 2
|
---|
| 539 | cmpi 16 . . 0000110001...... A+-DXWL... U U U 8 8 2
|
---|
| 540 | cmpi 16 . pcdi 0000110001111010 .......... . . U . . 7
|
---|
| 541 | cmpi 16 . pcix 0000110001111011 .......... . . U . . 9
|
---|
| 542 | cmpi 32 . d 0000110010000... .......... U U U 14 12 2
|
---|
| 543 | cmpi 32 . . 0000110010...... A+-DXWL... U U U 12 12 2
|
---|
| 544 | cmpi 32 . pcdi 0000110010111010 .......... . . U . . 7
|
---|
| 545 | cmpi 32 . pcix 0000110010111011 .......... . . U . . 9
|
---|
| 546 | cmpm 8 . ax7 1011111100001... .......... U U U 12 12 9
|
---|
| 547 | cmpm 8 . ay7 1011...100001111 .......... U U U 12 12 9
|
---|
| 548 | cmpm 8 . axy7 1011111100001111 .......... U U U 12 12 9
|
---|
| 549 | cmpm 8 . . 1011...100001... .......... U U U 12 12 9
|
---|
| 550 | cmpm 16 . . 1011...101001... .......... U U U 12 12 9
|
---|
| 551 | cmpm 32 . . 1011...110001... .......... U U U 20 20 9
|
---|
| 552 | cpbcc 32 . . 1111...01....... .......... . . U . . 4 unemulated
|
---|
| 553 | cpdbcc 32 . . 1111...001001... .......... . . U . . 4 unemulated
|
---|
| 554 | cpgen 32 . . 1111...000...... .......... . . U . . 4 unemulated
|
---|
| 555 | cpscc 32 . . 1111...001...... .......... . . U . . 4 unemulated
|
---|
| 556 | cptrapcc 32 . . 1111...001111... .......... . . U . . 4 unemulated
|
---|
| 557 | dbt 16 . . 0101000011001... .......... U U U 12 12 6
|
---|
| 558 | dbf 16 . . 0101000111001... .......... U U U 12 12 6
|
---|
| 559 | dbcc 16 . . 0101....11001... .......... U U U 12 12 6
|
---|
| 560 | divs 16 . d 1000...111000... .......... U U U 158 122 56
|
---|
| 561 | divs 16 . . 1000...111...... A+-DXWLdxI U U U 158 122 56
|
---|
| 562 | divu 16 . d 1000...011000... .......... U U U 140 108 44
|
---|
| 563 | divu 16 . . 1000...011...... A+-DXWLdxI U U U 140 108 44
|
---|
| 564 | divl 32 . d 0100110001000... .......... . . U . . 84
|
---|
| 565 | divl 32 . . 0100110001...... A+-DXWLdxI . . U . . 84
|
---|
| 566 | eor 8 . d 1011...100000... .......... U U U 4 4 2
|
---|
| 567 | eor 8 . . 1011...100...... A+-DXWL... U U U 8 8 4
|
---|
| 568 | eor 16 . d 1011...101000... .......... U U U 4 4 2
|
---|
| 569 | eor 16 . . 1011...101...... A+-DXWL... U U U 8 8 4
|
---|
| 570 | eor 32 . d 1011...110000... .......... U U U 8 6 2
|
---|
| 571 | eor 32 . . 1011...110...... A+-DXWL... U U U 12 12 4
|
---|
| 572 | eori 16 toc . 0000101000111100 .......... U U U 20 16 12
|
---|
| 573 | eori 16 tos . 0000101001111100 .......... S S S 20 16 12
|
---|
| 574 | eori 8 . d 0000101000000... .......... U U U 8 8 2
|
---|
| 575 | eori 8 . . 0000101000...... A+-DXWL... U U U 12 12 4
|
---|
| 576 | eori 16 . d 0000101001000... .......... U U U 8 8 2
|
---|
| 577 | eori 16 . . 0000101001...... A+-DXWL... U U U 12 12 4
|
---|
| 578 | eori 32 . d 0000101010000... .......... U U U 16 14 2
|
---|
| 579 | eori 32 . . 0000101010...... A+-DXWL... U U U 20 20 4
|
---|
| 580 | exg 32 dd . 1100...101000... .......... U U U 6 6 2
|
---|
| 581 | exg 32 aa . 1100...101001... .......... U U U 6 6 2
|
---|
| 582 | exg 32 da . 1100...110001... .......... U U U 6 6 2
|
---|
| 583 | ext 16 . . 0100100010000... .......... U U U 4 4 4
|
---|
| 584 | ext 32 . . 0100100011000... .......... U U U 4 4 4
|
---|
| 585 | extb 32 . . 0100100111000... .......... . . U . . 4
|
---|
| 586 | illegal 0 . . 0100101011111100 .......... U U U 4 4 4
|
---|
| 587 | jmp 32 . . 0100111011...... A..DXWLdx. U U U 4 4 0
|
---|
| 588 | jsr 32 . . 0100111010...... A..DXWLdx. U U U 12 12 0
|
---|
| 589 | lea 32 . . 0100...111...... A..DXWLdx. U U U 0 0 2
|
---|
| 590 | link 16 . a7 0100111001010111 .......... U U U 16 16 5
|
---|
| 591 | link 16 . . 0100111001010... .......... U U U 16 16 5
|
---|
| 592 | link 32 . a7 0100100000001111 .......... . . U . . 6
|
---|
| 593 | link 32 . . 0100100000001... .......... . . U . . 6
|
---|
| 594 | lsr 8 s . 1110...000001... .......... U U U 6 6 4
|
---|
| 595 | lsr 16 s . 1110...001001... .......... U U U 6 6 4
|
---|
| 596 | lsr 32 s . 1110...010001... .......... U U U 8 8 4
|
---|
| 597 | lsr 8 r . 1110...000101... .......... U U U 6 6 6
|
---|
| 598 | lsr 16 r . 1110...001101... .......... U U U 6 6 6
|
---|
| 599 | lsr 32 r . 1110...010101... .......... U U U 8 8 6
|
---|
| 600 | lsr 16 . . 1110001011...... A+-DXWL... U U U 8 8 5
|
---|
| 601 | lsl 8 s . 1110...100001... .......... U U U 6 6 4
|
---|
| 602 | lsl 16 s . 1110...101001... .......... U U U 6 6 4
|
---|
| 603 | lsl 32 s . 1110...110001... .......... U U U 8 8 4
|
---|
| 604 | lsl 8 r . 1110...100101... .......... U U U 6 6 6
|
---|
| 605 | lsl 16 r . 1110...101101... .......... U U U 6 6 6
|
---|
| 606 | lsl 32 r . 1110...110101... .......... U U U 8 8 6
|
---|
| 607 | lsl 16 . . 1110001111...... A+-DXWL... U U U 8 8 5
|
---|
| 608 | move 8 d d 0001...000000... .......... U U U 4 4 2
|
---|
| 609 | move 8 d . 0001...000...... A+-DXWLdxI U U U 4 4 2
|
---|
| 610 | move 8 ai d 0001...010000... .......... U U U 8 8 4
|
---|
| 611 | move 8 ai . 0001...010...... A+-DXWLdxI U U U 8 8 4
|
---|
| 612 | move 8 pi d 0001...011000... .......... U U U 8 8 4
|
---|
| 613 | move 8 pi . 0001...011...... A+-DXWLdxI U U U 8 8 4
|
---|
| 614 | move 8 pi7 d 0001111011000... .......... U U U 8 8 4
|
---|
| 615 | move 8 pi7 . 0001111011...... A+-DXWLdxI U U U 8 8 4
|
---|
| 616 | move 8 pd d 0001...100000... .......... U U U 8 8 5
|
---|
| 617 | move 8 pd . 0001...100...... A+-DXWLdxI U U U 8 8 5
|
---|
| 618 | move 8 pd7 d 0001111100000... .......... U U U 8 8 5
|
---|
| 619 | move 8 pd7 . 0001111100...... A+-DXWLdxI U U U 8 8 5
|
---|
| 620 | move 8 di d 0001...101000... .......... U U U 12 12 5
|
---|
| 621 | move 8 di . 0001...101...... A+-DXWLdxI U U U 12 12 5
|
---|
| 622 | move 8 ix d 0001...110000... .......... U U U 14 14 7
|
---|
| 623 | move 8 ix . 0001...110...... A+-DXWLdxI U U U 14 14 7
|
---|
| 624 | move 8 aw d 0001000111000... .......... U U U 12 12 4
|
---|
| 625 | move 8 aw . 0001000111...... A+-DXWLdxI U U U 12 12 4
|
---|
| 626 | move 8 al d 0001001111000... .......... U U U 16 16 6
|
---|
| 627 | move 8 al . 0001001111...... A+-DXWLdxI U U U 16 16 6
|
---|
| 628 | move 16 d d 0011...000000... .......... U U U 4 4 2
|
---|
| 629 | move 16 d a 0011...000001... .......... U U U 4 4 2
|
---|
| 630 | move 16 d . 0011...000...... A+-DXWLdxI U U U 4 4 2
|
---|
| 631 | move 16 ai d 0011...010000... .......... U U U 8 8 4
|
---|
| 632 | move 16 ai a 0011...010001... .......... U U U 8 8 4
|
---|
| 633 | move 16 ai . 0011...010...... A+-DXWLdxI U U U 8 8 4
|
---|
| 634 | move 16 pi d 0011...011000... .......... U U U 8 8 4
|
---|
| 635 | move 16 pi a 0011...011001... .......... U U U 8 8 4
|
---|
| 636 | move 16 pi . 0011...011...... A+-DXWLdxI U U U 8 8 4
|
---|
| 637 | move 16 pd d 0011...100000... .......... U U U 8 8 5
|
---|
| 638 | move 16 pd a 0011...100001... .......... U U U 8 8 5
|
---|
| 639 | move 16 pd . 0011...100...... A+-DXWLdxI U U U 8 8 5
|
---|
| 640 | move 16 di d 0011...101000... .......... U U U 12 12 5
|
---|
| 641 | move 16 di a 0011...101001... .......... U U U 12 12 5
|
---|
| 642 | move 16 di . 0011...101...... A+-DXWLdxI U U U 12 12 5
|
---|
| 643 | move 16 ix d 0011...110000... .......... U U U 14 14 7
|
---|
| 644 | move 16 ix a 0011...110001... .......... U U U 14 14 7
|
---|
| 645 | move 16 ix . 0011...110...... A+-DXWLdxI U U U 14 14 7
|
---|
| 646 | move 16 aw d 0011000111000... .......... U U U 12 12 4
|
---|
| 647 | move 16 aw a 0011000111001... .......... U U U 12 12 4
|
---|
| 648 | move 16 aw . 0011000111...... A+-DXWLdxI U U U 12 12 4
|
---|
| 649 | move 16 al d 0011001111000... .......... U U U 16 16 6
|
---|
| 650 | move 16 al a 0011001111001... .......... U U U 16 16 6
|
---|
| 651 | move 16 al . 0011001111...... A+-DXWLdxI U U U 16 16 6
|
---|
| 652 | move 32 d d 0010...000000... .......... U U U 4 4 2
|
---|
| 653 | move 32 d a 0010...000001... .......... U U U 4 4 2
|
---|
| 654 | move 32 d . 0010...000...... A+-DXWLdxI U U U 4 4 2
|
---|
| 655 | move 32 ai d 0010...010000... .......... U U U 12 12 4
|
---|
| 656 | move 32 ai a 0010...010001... .......... U U U 12 12 4
|
---|
| 657 | move 32 ai . 0010...010...... A+-DXWLdxI U U U 12 12 4
|
---|
| 658 | move 32 pi d 0010...011000... .......... U U U 12 12 4
|
---|
| 659 | move 32 pi a 0010...011001... .......... U U U 12 12 4
|
---|
| 660 | move 32 pi . 0010...011...... A+-DXWLdxI U U U 12 12 4
|
---|
| 661 | move 32 pd d 0010...100000... .......... U U U 12 14 5
|
---|
| 662 | move 32 pd a 0010...100001... .......... U U U 12 14 5
|
---|
| 663 | move 32 pd . 0010...100...... A+-DXWLdxI U U U 12 14 5
|
---|
| 664 | move 32 di d 0010...101000... .......... U U U 16 16 5
|
---|
| 665 | move 32 di a 0010...101001... .......... U U U 16 16 5
|
---|
| 666 | move 32 di . 0010...101...... A+-DXWLdxI U U U 16 16 5
|
---|
| 667 | move 32 ix d 0010...110000... .......... U U U 18 18 7
|
---|
| 668 | move 32 ix a 0010...110001... .......... U U U 18 18 7
|
---|
| 669 | move 32 ix . 0010...110...... A+-DXWLdxI U U U 18 18 7
|
---|
| 670 | move 32 aw d 0010000111000... .......... U U U 16 16 4
|
---|
| 671 | move 32 aw a 0010000111001... .......... U U U 16 16 4
|
---|
| 672 | move 32 aw . 0010000111...... A+-DXWLdxI U U U 16 16 4
|
---|
| 673 | move 32 al d 0010001111000... .......... U U U 20 20 6
|
---|
| 674 | move 32 al a 0010001111001... .......... U U U 20 20 6
|
---|
| 675 | move 32 al . 0010001111...... A+-DXWLdxI U U U 20 20 6
|
---|
| 676 | movea 16 . d 0011...001000... .......... U U U 4 4 2
|
---|
| 677 | movea 16 . a 0011...001001... .......... U U U 4 4 2
|
---|
| 678 | movea 16 . . 0011...001...... A+-DXWLdxI U U U 4 4 2
|
---|
| 679 | movea 32 . d 0010...001000... .......... U U U 4 4 2
|
---|
| 680 | movea 32 . a 0010...001001... .......... U U U 4 4 2
|
---|
| 681 | movea 32 . . 0010...001...... A+-DXWLdxI U U U 4 4 2
|
---|
| 682 | move 16 frc d 0100001011000... .......... . U U . 4 4
|
---|
| 683 | move 16 frc . 0100001011...... A+-DXWL... . U U . 8 4
|
---|
| 684 | move 16 toc d 0100010011000... .......... U U U 12 12 4
|
---|
| 685 | move 16 toc . 0100010011...... A+-DXWLdxI U U U 12 12 4
|
---|
| 686 | move 16 frs d 0100000011000... .......... U S S 6 4 8 U only for 000
|
---|
| 687 | move 16 frs . 0100000011...... A+-DXWL... U S S 8 8 8 U only for 000
|
---|
| 688 | move 16 tos d 0100011011000... .......... S S S 12 12 8
|
---|
| 689 | move 16 tos . 0100011011...... A+-DXWLdxI S S S 12 12 8
|
---|
| 690 | move 32 fru . 0100111001101... .......... S S S 4 6 2
|
---|
| 691 | move 32 tou . 0100111001100... .......... S S S 4 6 2
|
---|
| 692 | movec 32 cr . 0100111001111010 .......... . S S . 12 6
|
---|
| 693 | movec 32 rc . 0100111001111011 .......... . S S . 10 12
|
---|
| 694 | movem 16 re pd 0100100010100... .......... U U U 8 8 4
|
---|
| 695 | movem 16 re . 0100100010...... A..DXWL... U U U 4 4 4 cycles for hypothetical d addressing mode (020 unverified)
|
---|
| 696 | movem 32 re pd 0100100011100... .......... U U U 8 8 4
|
---|
| 697 | movem 32 re . 0100100011...... A..DXWL... U U U 0 0 4 cycles for hypothetical d addressing mode (020 unverified)
|
---|
| 698 | movem 16 er pi 0100110010011... .......... U U U 12 12 8
|
---|
| 699 | movem 16 er pcdi 0100110010111010 .......... U U U 16 16 9
|
---|
| 700 | movem 16 er pcix 0100110010111011 .......... U U U 18 18 11
|
---|
| 701 | movem 16 er . 0100110010...... A..DXWL... U U U 8 8 8 cycles for hypothetical d addressing mode (020 unverified)
|
---|
| 702 | movem 32 er pi 0100110011011... .......... U U U 12 12 8
|
---|
| 703 | movem 32 er pcdi 0100110011111010 .......... U U U 16 16 9
|
---|
| 704 | movem 32 er pcix 0100110011111011 .......... U U U 18 18 11
|
---|
| 705 | movem 32 er . 0100110011...... A..DXWL... U U U 4 4 8 cycles for hypothetical d addressing mode (020 unverified)
|
---|
| 706 | movep 16 er . 0000...100001... .......... U U U 16 16 12
|
---|
| 707 | movep 32 er . 0000...101001... .......... U U U 24 24 18
|
---|
| 708 | movep 16 re . 0000...110001... .......... U U U 16 16 11
|
---|
| 709 | movep 32 re . 0000...111001... .......... U U U 24 24 17
|
---|
| 710 | moveq 32 . . 0111...0........ .......... U U U 4 4 2
|
---|
| 711 | moves 8 . . 0000111000...... A+-DXWL... . S S . 14 5
|
---|
| 712 | moves 16 . . 0000111001...... A+-DXWL... . S S . 14 5
|
---|
| 713 | moves 32 . . 0000111010...... A+-DXWL... . S S . 16 5
|
---|
| 714 | muls 16 . d 1100...111000... .......... U U U 54 32 27
|
---|
| 715 | muls 16 . . 1100...111...... A+-DXWLdxI U U U 54 32 27
|
---|
| 716 | mulu 16 . d 1100...011000... .......... U U U 54 30 27
|
---|
| 717 | mulu 16 . . 1100...011...... A+-DXWLdxI U U U 54 30 27
|
---|
| 718 | mull 32 . d 0100110000000... .......... . . U . . 43
|
---|
| 719 | mull 32 . . 0100110000...... A+-DXWLdxI . . U . . 43
|
---|
| 720 | nbcd 8 . d 0100100000000... .......... U U U 6 6 6
|
---|
| 721 | nbcd 8 . . 0100100000...... A+-DXWL... U U U 8 8 6
|
---|
| 722 | neg 8 . d 0100010000000... .......... U U U 4 4 2
|
---|
| 723 | neg 8 . . 0100010000...... A+-DXWL... U U U 8 8 4
|
---|
| 724 | neg 16 . d 0100010001000... .......... U U U 4 4 2
|
---|
| 725 | neg 16 . . 0100010001...... A+-DXWL... U U U 8 8 4
|
---|
| 726 | neg 32 . d 0100010010000... .......... U U U 6 6 2
|
---|
| 727 | neg 32 . . 0100010010...... A+-DXWL... U U U 12 12 4
|
---|
| 728 | negx 8 . d 0100000000000... .......... U U U 4 4 2
|
---|
| 729 | negx 8 . . 0100000000...... A+-DXWL... U U U 8 8 4
|
---|
| 730 | negx 16 . d 0100000001000... .......... U U U 4 4 2
|
---|
| 731 | negx 16 . . 0100000001...... A+-DXWL... U U U 8 8 4
|
---|
| 732 | negx 32 . d 0100000010000... .......... U U U 6 6 2
|
---|
| 733 | negx 32 . . 0100000010...... A+-DXWL... U U U 12 12 4
|
---|
| 734 | nop 0 . . 0100111001110001 .......... U U U 4 4 2
|
---|
| 735 | not 8 . d 0100011000000... .......... U U U 4 4 2
|
---|
| 736 | not 8 . . 0100011000...... A+-DXWL... U U U 8 8 4
|
---|
| 737 | not 16 . d 0100011001000... .......... U U U 4 4 2
|
---|
| 738 | not 16 . . 0100011001...... A+-DXWL... U U U 8 8 4
|
---|
| 739 | not 32 . d 0100011010000... .......... U U U 6 6 2
|
---|
| 740 | not 32 . . 0100011010...... A+-DXWL... U U U 12 12 4
|
---|
| 741 | or 8 er d 1000...000000... .......... U U U 4 4 2
|
---|
| 742 | or 8 er . 1000...000...... A+-DXWLdxI U U U 4 4 2
|
---|
| 743 | or 16 er d 1000...001000... .......... U U U 4 4 2
|
---|
| 744 | or 16 er . 1000...001...... A+-DXWLdxI U U U 4 4 2
|
---|
| 745 | or 32 er d 1000...010000... .......... U U U 6 6 2
|
---|
| 746 | or 32 er . 1000...010...... A+-DXWLdxI U U U 6 6 2
|
---|
| 747 | or 8 re . 1000...100...... A+-DXWL... U U U 8 8 4
|
---|
| 748 | or 16 re . 1000...101...... A+-DXWL... U U U 8 8 4
|
---|
| 749 | or 32 re . 1000...110...... A+-DXWL... U U U 12 12 4
|
---|
| 750 | ori 16 toc . 0000000000111100 .......... U U U 20 16 12
|
---|
| 751 | ori 16 tos . 0000000001111100 .......... S S S 20 16 12
|
---|
| 752 | ori 8 . d 0000000000000... .......... U U U 8 8 2
|
---|
| 753 | ori 8 . . 0000000000...... A+-DXWL... U U U 12 12 4
|
---|
| 754 | ori 16 . d 0000000001000... .......... U U U 8 8 2
|
---|
| 755 | ori 16 . . 0000000001...... A+-DXWL... U U U 12 12 4
|
---|
| 756 | ori 32 . d 0000000010000... .......... U U U 16 14 2
|
---|
| 757 | ori 32 . . 0000000010...... A+-DXWL... U U U 20 20 4
|
---|
| 758 | pack 16 rr . 1000...101000... .......... . . U . . 6
|
---|
| 759 | pack 16 mm ax7 1000111101001... .......... . . U . . 13
|
---|
| 760 | pack 16 mm ay7 1000...101001111 .......... . . U . . 13
|
---|
| 761 | pack 16 mm axy7 1000111101001111 .......... . . U . . 13
|
---|
| 762 | pack 16 mm . 1000...101001... .......... . . U . . 13
|
---|
| 763 | pea 32 . . 0100100001...... A..DXWLdx. U U U 6 6 5
|
---|
| 764 | reset 0 . . 0100111001110000 .......... S S S 0 0 0
|
---|
| 765 | ror 8 s . 1110...000011... .......... U U U 6 6 8
|
---|
| 766 | ror 16 s . 1110...001011... .......... U U U 6 6 8
|
---|
| 767 | ror 32 s . 1110...010011... .......... U U U 8 8 8
|
---|
| 768 | ror 8 r . 1110...000111... .......... U U U 6 6 8
|
---|
| 769 | ror 16 r . 1110...001111... .......... U U U 6 6 8
|
---|
| 770 | ror 32 r . 1110...010111... .......... U U U 8 8 8
|
---|
| 771 | ror 16 . . 1110011011...... A+-DXWL... U U U 8 8 7
|
---|
| 772 | rol 8 s . 1110...100011... .......... U U U 6 6 8
|
---|
| 773 | rol 16 s . 1110...101011... .......... U U U 6 6 8
|
---|
| 774 | rol 32 s . 1110...110011... .......... U U U 8 8 8
|
---|
| 775 | rol 8 r . 1110...100111... .......... U U U 6 6 8
|
---|
| 776 | rol 16 r . 1110...101111... .......... U U U 6 6 8
|
---|
| 777 | rol 32 r . 1110...110111... .......... U U U 8 8 8
|
---|
| 778 | rol 16 . . 1110011111...... A+-DXWL... U U U 8 8 7
|
---|
| 779 | roxr 8 s . 1110...000010... .......... U U U 6 6 12
|
---|
| 780 | roxr 16 s . 1110...001010... .......... U U U 6 6 12
|
---|
| 781 | roxr 32 s . 1110...010010... .......... U U U 8 8 12
|
---|
| 782 | roxr 8 r . 1110...000110... .......... U U U 6 6 12
|
---|
| 783 | roxr 16 r . 1110...001110... .......... U U U 6 6 12
|
---|
| 784 | roxr 32 r . 1110...010110... .......... U U U 8 8 12
|
---|
| 785 | roxr 16 . . 1110010011...... A+-DXWL... U U U 8 8 5
|
---|
| 786 | roxl 8 s . 1110...100010... .......... U U U 6 6 12
|
---|
| 787 | roxl 16 s . 1110...101010... .......... U U U 6 6 12
|
---|
| 788 | roxl 32 s . 1110...110010... .......... U U U 8 8 12
|
---|
| 789 | roxl 8 r . 1110...100110... .......... U U U 6 6 12
|
---|
| 790 | roxl 16 r . 1110...101110... .......... U U U 6 6 12
|
---|
| 791 | roxl 32 r . 1110...110110... .......... U U U 8 8 12
|
---|
| 792 | roxl 16 . . 1110010111...... A+-DXWL... U U U 8 8 5
|
---|
| 793 | rtd 32 . . 0100111001110100 .......... . U U . 16 10
|
---|
| 794 | rte 32 . . 0100111001110011 .......... S S S 20 24 20 bus fault not emulated
|
---|
| 795 | rtm 32 . . 000001101100.... .......... . . U . . 19 not properly emulated
|
---|
| 796 | rtr 32 . . 0100111001110111 .......... U U U 20 20 14
|
---|
| 797 | rts 32 . . 0100111001110101 .......... U U U 16 16 10
|
---|
| 798 | sbcd 8 rr . 1000...100000... .......... U U U 6 6 4
|
---|
| 799 | sbcd 8 mm ax7 1000111100001... .......... U U U 18 18 16
|
---|
| 800 | sbcd 8 mm ay7 1000...100001111 .......... U U U 18 18 16
|
---|
| 801 | sbcd 8 mm axy7 1000111100001111 .......... U U U 18 18 16
|
---|
| 802 | sbcd 8 mm . 1000...100001... .......... U U U 18 18 16
|
---|
| 803 | st 8 . d 0101000011000... .......... U U U 6 4 4
|
---|
| 804 | st 8 . . 0101000011...... A+-DXWL... U U U 8 8 6
|
---|
| 805 | sf 8 . d 0101000111000... .......... U U U 4 4 4
|
---|
| 806 | sf 8 . . 0101000111...... A+-DXWL... U U U 8 8 6
|
---|
| 807 | scc 8 . d 0101....11000... .......... U U U 4 4 4
|
---|
| 808 | scc 8 . . 0101....11...... A+-DXWL... U U U 8 8 6
|
---|
| 809 | stop 0 . . 0100111001110010 .......... S S S 4 4 8
|
---|
| 810 | sub 8 er d 1001...000000... .......... U U U 4 4 2
|
---|
| 811 | sub 8 er . 1001...000...... A+-DXWLdxI U U U 4 4 2
|
---|
| 812 | sub 16 er d 1001...001000... .......... U U U 4 4 2
|
---|
| 813 | sub 16 er a 1001...001001... .......... U U U 4 4 2
|
---|
| 814 | sub 16 er . 1001...001...... A+-DXWLdxI U U U 4 4 2
|
---|
| 815 | sub 32 er d 1001...010000... .......... U U U 6 6 2
|
---|
| 816 | sub 32 er a 1001...010001... .......... U U U 6 6 2
|
---|
| 817 | sub 32 er . 1001...010...... A+-DXWLdxI U U U 6 6 2
|
---|
| 818 | sub 8 re . 1001...100...... A+-DXWL... U U U 8 8 4
|
---|
| 819 | sub 16 re . 1001...101...... A+-DXWL... U U U 8 8 4
|
---|
| 820 | sub 32 re . 1001...110...... A+-DXWL... U U U 12 12 4
|
---|
| 821 | suba 16 . d 1001...011000... .......... U U U 8 8 2
|
---|
| 822 | suba 16 . a 1001...011001... .......... U U U 8 8 2
|
---|
| 823 | suba 16 . . 1001...011...... A+-DXWLdxI U U U 8 8 2
|
---|
| 824 | suba 32 . d 1001...111000... .......... U U U 6 6 2
|
---|
| 825 | suba 32 . a 1001...111001... .......... U U U 6 6 2
|
---|
| 826 | suba 32 . . 1001...111...... A+-DXWLdxI U U U 6 6 2
|
---|
| 827 | subi 8 . d 0000010000000... .......... U U U 8 8 2
|
---|
| 828 | subi 8 . . 0000010000...... A+-DXWL... U U U 12 12 4
|
---|
| 829 | subi 16 . d 0000010001000... .......... U U U 8 8 2
|
---|
| 830 | subi 16 . . 0000010001...... A+-DXWL... U U U 12 12 4
|
---|
| 831 | subi 32 . d 0000010010000... .......... U U U 16 14 2
|
---|
| 832 | subi 32 . . 0000010010...... A+-DXWL... U U U 20 20 4
|
---|
| 833 | subq 8 . d 0101...100000... .......... U U U 4 4 2
|
---|
| 834 | subq 8 . . 0101...100...... A+-DXWL... U U U 8 8 4
|
---|
| 835 | subq 16 . d 0101...101000... .......... U U U 4 4 2
|
---|
| 836 | subq 16 . a 0101...101001... .......... U U U 8 4 2
|
---|
| 837 | subq 16 . . 0101...101...... A+-DXWL... U U U 8 8 4
|
---|
| 838 | subq 32 . d 0101...110000... .......... U U U 8 8 2
|
---|
| 839 | subq 32 . a 0101...110001... .......... U U U 8 8 2
|
---|
| 840 | subq 32 . . 0101...110...... A+-DXWL... U U U 12 12 4
|
---|
| 841 | subx 8 rr . 1001...100000... .......... U U U 4 4 2
|
---|
| 842 | subx 16 rr . 1001...101000... .......... U U U 4 4 2
|
---|
| 843 | subx 32 rr . 1001...110000... .......... U U U 8 6 2
|
---|
| 844 | subx 8 mm ax7 1001111100001... .......... U U U 18 18 12
|
---|
| 845 | subx 8 mm ay7 1001...100001111 .......... U U U 18 18 12
|
---|
| 846 | subx 8 mm axy7 1001111100001111 .......... U U U 18 18 12
|
---|
| 847 | subx 8 mm . 1001...100001... .......... U U U 18 18 12
|
---|
| 848 | subx 16 mm . 1001...101001... .......... U U U 18 18 12
|
---|
| 849 | subx 32 mm . 1001...110001... .......... U U U 30 30 12
|
---|
| 850 | swap 32 . . 0100100001000... .......... U U U 4 4 4
|
---|
| 851 | tas 8 . d 0100101011000... .......... U U U 4 4 4
|
---|
| 852 | tas 8 . . 0100101011...... A+-DXWL... U U U 14 14 12
|
---|
| 853 | trap 0 . . 010011100100.... .......... U U U 4 4 4
|
---|
| 854 | trapt 0 . . 0101000011111100 .......... . . U . . 4
|
---|
| 855 | trapt 16 . . 0101000011111010 .......... . . U . . 6
|
---|
| 856 | trapt 32 . . 0101000011111011 .......... . . U . . 8
|
---|
| 857 | trapf 0 . . 0101000111111100 .......... . . U . . 4
|
---|
| 858 | trapf 16 . . 0101000111111010 .......... . . U . . 6
|
---|
| 859 | trapf 32 . . 0101000111111011 .......... . . U . . 8
|
---|
| 860 | trapcc 0 . . 0101....11111100 .......... . . U . . 4
|
---|
| 861 | trapcc 16 . . 0101....11111010 .......... . . U . . 6
|
---|
| 862 | trapcc 32 . . 0101....11111011 .......... . . U . . 8
|
---|
| 863 | trapv 0 . . 0100111001110110 .......... U U U 4 4 4
|
---|
| 864 | tst 8 . d 0100101000000... .......... U U U 4 4 2
|
---|
| 865 | tst 8 . . 0100101000...... A+-DXWL... U U U 4 4 2
|
---|
| 866 | tst 8 . pcdi 0100101000111010 .......... . . U . . 7
|
---|
| 867 | tst 8 . pcix 0100101000111011 .......... . . U . . 9
|
---|
| 868 | tst 8 . i 0100101000111100 .......... . . U . . 6
|
---|
| 869 | tst 16 . d 0100101001000... .......... U U U 4 4 2
|
---|
| 870 | tst 16 . a 0100101001001... .......... . . U . . 2
|
---|
| 871 | tst 16 . . 0100101001...... A+-DXWL... U U U 4 4 2
|
---|
| 872 | tst 16 . pcdi 0100101001111010 .......... . . U . . 7
|
---|
| 873 | tst 16 . pcix 0100101001111011 .......... . . U . . 9
|
---|
| 874 | tst 16 . i 0100101001111100 .......... . . U . . 6
|
---|
| 875 | tst 32 . d 0100101010000... .......... U U U 4 4 2
|
---|
| 876 | tst 32 . a 0100101010001... .......... . . U . . 2
|
---|
| 877 | tst 32 . . 0100101010...... A+-DXWL... U U U 4 4 2
|
---|
| 878 | tst 32 . pcdi 0100101010111010 .......... . . U . . 7
|
---|
| 879 | tst 32 . pcix 0100101010111011 .......... . . U . . 9
|
---|
| 880 | tst 32 . i 0100101010111100 .......... . . U . . 6
|
---|
| 881 | unlk 32 . a7 0100111001011111 .......... U U U 12 12 6
|
---|
| 882 | unlk 32 . . 0100111001011... .......... U U U 12 12 6
|
---|
| 883 | unpk 16 rr . 1000...110000... .......... . . U . . 8
|
---|
| 884 | unpk 16 mm ax7 1000111110001... .......... . . U . . 13
|
---|
| 885 | unpk 16 mm ay7 1000...110001111 .......... . . U . . 13
|
---|
| 886 | unpk 16 mm axy7 1000111110001111 .......... . . U . . 13
|
---|
| 887 | unpk 16 mm . 1000...110001... .......... . . U . . 13
|
---|
| 888 |
|
---|
| 889 |
|
---|
| 890 |
|
---|
| 891 | XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
|
---|
| 892 | M68KMAKE_OPCODE_HANDLER_BODY
|
---|
| 893 |
|
---|
| 894 | M68KMAKE_OP(1010, 0, ., .)
|
---|
| 895 | {
|
---|
| 896 | m68ki_exception_1010();
|
---|
| 897 | }
|
---|
| 898 |
|
---|
| 899 |
|
---|
| 900 | M68KMAKE_OP(1111, 0, ., .)
|
---|
| 901 | {
|
---|
| 902 | m68ki_exception_1111();
|
---|
| 903 | }
|
---|
| 904 |
|
---|
| 905 |
|
---|
| 906 | M68KMAKE_OP(abcd, 8, rr, .)
|
---|
| 907 | {
|
---|
| 908 | uint* r_dst = &DX;
|
---|
| 909 | uint src = DY;
|
---|
| 910 | uint dst = *r_dst;
|
---|
| 911 | uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
|
---|
| 912 |
|
---|
| 913 | FLAG_V = ~res; /* Undefined V behavior */
|
---|
| 914 |
|
---|
| 915 | if(res > 9)
|
---|
| 916 | res += 6;
|
---|
| 917 | res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
|
---|
| 918 | FLAG_X = FLAG_C = (res > 0x99) << 8;
|
---|
| 919 | if(FLAG_C)
|
---|
| 920 | res -= 0xa0;
|
---|
| 921 |
|
---|
| 922 | FLAG_V &= res; /* Undefined V behavior part II */
|
---|
| 923 | FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
---|
| 924 |
|
---|
| 925 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 926 | FLAG_Z |= res;
|
---|
| 927 |
|
---|
| 928 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
|
---|
| 929 | }
|
---|
| 930 |
|
---|
| 931 |
|
---|
| 932 | M68KMAKE_OP(abcd, 8, mm, ax7)
|
---|
| 933 | {
|
---|
| 934 | uint src = OPER_AY_PD_8();
|
---|
| 935 | uint ea = EA_A7_PD_8();
|
---|
| 936 | uint dst = m68ki_read_8(ea);
|
---|
| 937 | uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
|
---|
| 938 |
|
---|
| 939 | FLAG_V = ~res; /* Undefined V behavior */
|
---|
| 940 |
|
---|
| 941 | if(res > 9)
|
---|
| 942 | res += 6;
|
---|
| 943 | res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
|
---|
| 944 | FLAG_X = FLAG_C = (res > 0x99) << 8;
|
---|
| 945 | if(FLAG_C)
|
---|
| 946 | res -= 0xa0;
|
---|
| 947 |
|
---|
| 948 | FLAG_V &= res; /* Undefined V behavior part II */
|
---|
| 949 | FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
---|
| 950 |
|
---|
| 951 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 952 | FLAG_Z |= res;
|
---|
| 953 |
|
---|
| 954 | m68ki_write_8(ea, res);
|
---|
| 955 | }
|
---|
| 956 |
|
---|
| 957 |
|
---|
| 958 | M68KMAKE_OP(abcd, 8, mm, ay7)
|
---|
| 959 | {
|
---|
| 960 | uint src = OPER_A7_PD_8();
|
---|
| 961 | uint ea = EA_AX_PD_8();
|
---|
| 962 | uint dst = m68ki_read_8(ea);
|
---|
| 963 | uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
|
---|
| 964 |
|
---|
| 965 | FLAG_V = ~res; /* Undefined V behavior */
|
---|
| 966 |
|
---|
| 967 | if(res > 9)
|
---|
| 968 | res += 6;
|
---|
| 969 | res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
|
---|
| 970 | FLAG_X = FLAG_C = (res > 0x99) << 8;
|
---|
| 971 | if(FLAG_C)
|
---|
| 972 | res -= 0xa0;
|
---|
| 973 |
|
---|
| 974 | FLAG_V &= res; /* Undefined V behavior part II */
|
---|
| 975 | FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
---|
| 976 |
|
---|
| 977 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 978 | FLAG_Z |= res;
|
---|
| 979 |
|
---|
| 980 | m68ki_write_8(ea, res);
|
---|
| 981 | }
|
---|
| 982 |
|
---|
| 983 |
|
---|
| 984 | M68KMAKE_OP(abcd, 8, mm, axy7)
|
---|
| 985 | {
|
---|
| 986 | uint src = OPER_A7_PD_8();
|
---|
| 987 | uint ea = EA_A7_PD_8();
|
---|
| 988 | uint dst = m68ki_read_8(ea);
|
---|
| 989 | uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
|
---|
| 990 |
|
---|
| 991 | FLAG_V = ~res; /* Undefined V behavior */
|
---|
| 992 |
|
---|
| 993 | if(res > 9)
|
---|
| 994 | res += 6;
|
---|
| 995 | res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
|
---|
| 996 | FLAG_X = FLAG_C = (res > 0x99) << 8;
|
---|
| 997 | if(FLAG_C)
|
---|
| 998 | res -= 0xa0;
|
---|
| 999 |
|
---|
| 1000 | FLAG_V &= res; /* Undefined V behavior part II */
|
---|
| 1001 | FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
---|
| 1002 |
|
---|
| 1003 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 1004 | FLAG_Z |= res;
|
---|
| 1005 |
|
---|
| 1006 | m68ki_write_8(ea, res);
|
---|
| 1007 | }
|
---|
| 1008 |
|
---|
| 1009 |
|
---|
| 1010 | M68KMAKE_OP(abcd, 8, mm, .)
|
---|
| 1011 | {
|
---|
| 1012 | uint src = OPER_AY_PD_8();
|
---|
| 1013 | uint ea = EA_AX_PD_8();
|
---|
| 1014 | uint dst = m68ki_read_8(ea);
|
---|
| 1015 | uint res = LOW_NIBBLE(src) + LOW_NIBBLE(dst) + XFLAG_AS_1();
|
---|
| 1016 |
|
---|
| 1017 | FLAG_V = ~res; /* Undefined V behavior */
|
---|
| 1018 |
|
---|
| 1019 | if(res > 9)
|
---|
| 1020 | res += 6;
|
---|
| 1021 | res += HIGH_NIBBLE(src) + HIGH_NIBBLE(dst);
|
---|
| 1022 | FLAG_X = FLAG_C = (res > 0x99) << 8;
|
---|
| 1023 | if(FLAG_C)
|
---|
| 1024 | res -= 0xa0;
|
---|
| 1025 |
|
---|
| 1026 | FLAG_V &= res; /* Undefined V behavior part II */
|
---|
| 1027 | FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
---|
| 1028 |
|
---|
| 1029 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 1030 | FLAG_Z |= res;
|
---|
| 1031 |
|
---|
| 1032 | m68ki_write_8(ea, res);
|
---|
| 1033 | }
|
---|
| 1034 |
|
---|
| 1035 |
|
---|
| 1036 | M68KMAKE_OP(add, 8, er, d)
|
---|
| 1037 | {
|
---|
| 1038 | uint* r_dst = &DX;
|
---|
| 1039 | uint src = MASK_OUT_ABOVE_8(DY);
|
---|
| 1040 | uint dst = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 1041 | uint res = src + dst;
|
---|
| 1042 |
|
---|
| 1043 | FLAG_N = NFLAG_8(res);
|
---|
| 1044 | FLAG_V = VFLAG_ADD_8(src, dst, res);
|
---|
| 1045 | FLAG_X = FLAG_C = CFLAG_8(res);
|
---|
| 1046 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 1047 |
|
---|
| 1048 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
|
---|
| 1049 | }
|
---|
| 1050 |
|
---|
| 1051 |
|
---|
| 1052 | M68KMAKE_OP(add, 8, er, .)
|
---|
| 1053 | {
|
---|
| 1054 | uint* r_dst = &DX;
|
---|
| 1055 | uint src = M68KMAKE_GET_OPER_AY_8;
|
---|
| 1056 | uint dst = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 1057 | uint res = src + dst;
|
---|
| 1058 |
|
---|
| 1059 | FLAG_N = NFLAG_8(res);
|
---|
| 1060 | FLAG_V = VFLAG_ADD_8(src, dst, res);
|
---|
| 1061 | FLAG_X = FLAG_C = CFLAG_8(res);
|
---|
| 1062 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 1063 |
|
---|
| 1064 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
|
---|
| 1065 | }
|
---|
| 1066 |
|
---|
| 1067 |
|
---|
| 1068 | M68KMAKE_OP(add, 16, er, d)
|
---|
| 1069 | {
|
---|
| 1070 | uint* r_dst = &DX;
|
---|
| 1071 | uint src = MASK_OUT_ABOVE_16(DY);
|
---|
| 1072 | uint dst = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 1073 | uint res = src + dst;
|
---|
| 1074 |
|
---|
| 1075 | FLAG_N = NFLAG_16(res);
|
---|
| 1076 | FLAG_V = VFLAG_ADD_16(src, dst, res);
|
---|
| 1077 | FLAG_X = FLAG_C = CFLAG_16(res);
|
---|
| 1078 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 1079 |
|
---|
| 1080 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
|
---|
| 1081 | }
|
---|
| 1082 |
|
---|
| 1083 |
|
---|
| 1084 | M68KMAKE_OP(add, 16, er, a)
|
---|
| 1085 | {
|
---|
| 1086 | uint* r_dst = &DX;
|
---|
| 1087 | uint src = MASK_OUT_ABOVE_16(AY);
|
---|
| 1088 | uint dst = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 1089 | uint res = src + dst;
|
---|
| 1090 |
|
---|
| 1091 | FLAG_N = NFLAG_16(res);
|
---|
| 1092 | FLAG_V = VFLAG_ADD_16(src, dst, res);
|
---|
| 1093 | FLAG_X = FLAG_C = CFLAG_16(res);
|
---|
| 1094 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 1095 |
|
---|
| 1096 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
|
---|
| 1097 | }
|
---|
| 1098 |
|
---|
| 1099 |
|
---|
| 1100 | M68KMAKE_OP(add, 16, er, .)
|
---|
| 1101 | {
|
---|
| 1102 | uint* r_dst = &DX;
|
---|
| 1103 | uint src = M68KMAKE_GET_OPER_AY_16;
|
---|
| 1104 | uint dst = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 1105 | uint res = src + dst;
|
---|
| 1106 |
|
---|
| 1107 | FLAG_N = NFLAG_16(res);
|
---|
| 1108 | FLAG_V = VFLAG_ADD_16(src, dst, res);
|
---|
| 1109 | FLAG_X = FLAG_C = CFLAG_16(res);
|
---|
| 1110 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 1111 |
|
---|
| 1112 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
|
---|
| 1113 | }
|
---|
| 1114 |
|
---|
| 1115 |
|
---|
| 1116 | M68KMAKE_OP(add, 32, er, d)
|
---|
| 1117 | {
|
---|
| 1118 | uint* r_dst = &DX;
|
---|
| 1119 | uint src = DY;
|
---|
| 1120 | uint dst = *r_dst;
|
---|
| 1121 | uint res = src + dst;
|
---|
| 1122 |
|
---|
| 1123 | FLAG_N = NFLAG_32(res);
|
---|
| 1124 | FLAG_V = VFLAG_ADD_32(src, dst, res);
|
---|
| 1125 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
|
---|
| 1126 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 1127 |
|
---|
| 1128 | *r_dst = FLAG_Z;
|
---|
| 1129 | }
|
---|
| 1130 |
|
---|
| 1131 |
|
---|
| 1132 | M68KMAKE_OP(add, 32, er, a)
|
---|
| 1133 | {
|
---|
| 1134 | uint* r_dst = &DX;
|
---|
| 1135 | uint src = AY;
|
---|
| 1136 | uint dst = *r_dst;
|
---|
| 1137 | uint res = src + dst;
|
---|
| 1138 |
|
---|
| 1139 | FLAG_N = NFLAG_32(res);
|
---|
| 1140 | FLAG_V = VFLAG_ADD_32(src, dst, res);
|
---|
| 1141 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
|
---|
| 1142 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 1143 |
|
---|
| 1144 | *r_dst = FLAG_Z;
|
---|
| 1145 | }
|
---|
| 1146 |
|
---|
| 1147 |
|
---|
| 1148 | M68KMAKE_OP(add, 32, er, .)
|
---|
| 1149 | {
|
---|
| 1150 | uint* r_dst = &DX;
|
---|
| 1151 | uint src = M68KMAKE_GET_OPER_AY_32;
|
---|
| 1152 | uint dst = *r_dst;
|
---|
| 1153 | uint res = src + dst;
|
---|
| 1154 |
|
---|
| 1155 | FLAG_N = NFLAG_32(res);
|
---|
| 1156 | FLAG_V = VFLAG_ADD_32(src, dst, res);
|
---|
| 1157 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
|
---|
| 1158 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 1159 |
|
---|
| 1160 | *r_dst = FLAG_Z;
|
---|
| 1161 | }
|
---|
| 1162 |
|
---|
| 1163 |
|
---|
| 1164 | M68KMAKE_OP(add, 8, re, .)
|
---|
| 1165 | {
|
---|
| 1166 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 1167 | uint src = MASK_OUT_ABOVE_8(DX);
|
---|
| 1168 | uint dst = m68ki_read_8(ea);
|
---|
| 1169 | uint res = src + dst;
|
---|
| 1170 |
|
---|
| 1171 | FLAG_N = NFLAG_8(res);
|
---|
| 1172 | FLAG_V = VFLAG_ADD_8(src, dst, res);
|
---|
| 1173 | FLAG_X = FLAG_C = CFLAG_8(res);
|
---|
| 1174 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 1175 |
|
---|
| 1176 | m68ki_write_8(ea, FLAG_Z);
|
---|
| 1177 | }
|
---|
| 1178 |
|
---|
| 1179 |
|
---|
| 1180 | M68KMAKE_OP(add, 16, re, .)
|
---|
| 1181 | {
|
---|
| 1182 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 1183 | uint src = MASK_OUT_ABOVE_16(DX);
|
---|
| 1184 | uint dst = m68ki_read_16(ea);
|
---|
| 1185 | uint res = src + dst;
|
---|
| 1186 |
|
---|
| 1187 | FLAG_N = NFLAG_16(res);
|
---|
| 1188 | FLAG_V = VFLAG_ADD_16(src, dst, res);
|
---|
| 1189 | FLAG_X = FLAG_C = CFLAG_16(res);
|
---|
| 1190 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 1191 |
|
---|
| 1192 | m68ki_write_16(ea, FLAG_Z);
|
---|
| 1193 | }
|
---|
| 1194 |
|
---|
| 1195 |
|
---|
| 1196 | M68KMAKE_OP(add, 32, re, .)
|
---|
| 1197 | {
|
---|
| 1198 | uint ea = M68KMAKE_GET_EA_AY_32;
|
---|
| 1199 | uint src = DX;
|
---|
| 1200 | uint dst = m68ki_read_32(ea);
|
---|
| 1201 | uint res = src + dst;
|
---|
| 1202 |
|
---|
| 1203 | FLAG_N = NFLAG_32(res);
|
---|
| 1204 | FLAG_V = VFLAG_ADD_32(src, dst, res);
|
---|
| 1205 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
|
---|
| 1206 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 1207 |
|
---|
| 1208 | m68ki_write_32(ea, FLAG_Z);
|
---|
| 1209 | }
|
---|
| 1210 |
|
---|
| 1211 |
|
---|
| 1212 | M68KMAKE_OP(adda, 16, ., d)
|
---|
| 1213 | {
|
---|
| 1214 | uint* r_dst = &AX;
|
---|
| 1215 |
|
---|
| 1216 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(DY));
|
---|
| 1217 | }
|
---|
| 1218 |
|
---|
| 1219 |
|
---|
| 1220 | M68KMAKE_OP(adda, 16, ., a)
|
---|
| 1221 | {
|
---|
| 1222 | uint* r_dst = &AX;
|
---|
| 1223 |
|
---|
| 1224 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + MAKE_INT_16(AY));
|
---|
| 1225 | }
|
---|
| 1226 |
|
---|
| 1227 |
|
---|
| 1228 | M68KMAKE_OP(adda, 16, ., .)
|
---|
| 1229 | {
|
---|
| 1230 | signed short src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
|
---|
| 1231 | uint* r_dst = &AX;
|
---|
| 1232 |
|
---|
| 1233 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + src);
|
---|
| 1234 | }
|
---|
| 1235 |
|
---|
| 1236 |
|
---|
| 1237 | M68KMAKE_OP(adda, 32, ., d)
|
---|
| 1238 | {
|
---|
| 1239 | uint* r_dst = &AX;
|
---|
| 1240 |
|
---|
| 1241 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + DY);
|
---|
| 1242 | }
|
---|
| 1243 |
|
---|
| 1244 |
|
---|
| 1245 | M68KMAKE_OP(adda, 32, ., a)
|
---|
| 1246 | {
|
---|
| 1247 | uint* r_dst = &AX;
|
---|
| 1248 |
|
---|
| 1249 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + AY);
|
---|
| 1250 | }
|
---|
| 1251 |
|
---|
| 1252 |
|
---|
| 1253 | M68KMAKE_OP(adda, 32, ., .)
|
---|
| 1254 | {
|
---|
| 1255 | uint src = M68KMAKE_GET_OPER_AY_32;
|
---|
| 1256 | uint* r_dst = &AX;
|
---|
| 1257 |
|
---|
| 1258 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + src);
|
---|
| 1259 | }
|
---|
| 1260 |
|
---|
| 1261 |
|
---|
| 1262 | M68KMAKE_OP(addi, 8, ., d)
|
---|
| 1263 | {
|
---|
| 1264 | uint* r_dst = &DY;
|
---|
| 1265 | uint src = OPER_I_8();
|
---|
| 1266 | uint dst = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 1267 | uint res = src + dst;
|
---|
| 1268 |
|
---|
| 1269 | FLAG_N = NFLAG_8(res);
|
---|
| 1270 | FLAG_V = VFLAG_ADD_8(src, dst, res);
|
---|
| 1271 | FLAG_X = FLAG_C = CFLAG_8(res);
|
---|
| 1272 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 1273 |
|
---|
| 1274 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
|
---|
| 1275 | }
|
---|
| 1276 |
|
---|
| 1277 |
|
---|
| 1278 | M68KMAKE_OP(addi, 8, ., .)
|
---|
| 1279 | {
|
---|
| 1280 | uint src = OPER_I_8();
|
---|
| 1281 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 1282 | uint dst = m68ki_read_8(ea);
|
---|
| 1283 | uint res = src + dst;
|
---|
| 1284 |
|
---|
| 1285 | FLAG_N = NFLAG_8(res);
|
---|
| 1286 | FLAG_V = VFLAG_ADD_8(src, dst, res);
|
---|
| 1287 | FLAG_X = FLAG_C = CFLAG_8(res);
|
---|
| 1288 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 1289 |
|
---|
| 1290 | m68ki_write_8(ea, FLAG_Z);
|
---|
| 1291 | }
|
---|
| 1292 |
|
---|
| 1293 |
|
---|
| 1294 | M68KMAKE_OP(addi, 16, ., d)
|
---|
| 1295 | {
|
---|
| 1296 | uint* r_dst = &DY;
|
---|
| 1297 | uint src = OPER_I_16();
|
---|
| 1298 | uint dst = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 1299 | uint res = src + dst;
|
---|
| 1300 |
|
---|
| 1301 | FLAG_N = NFLAG_16(res);
|
---|
| 1302 | FLAG_V = VFLAG_ADD_16(src, dst, res);
|
---|
| 1303 | FLAG_X = FLAG_C = CFLAG_16(res);
|
---|
| 1304 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 1305 |
|
---|
| 1306 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
|
---|
| 1307 | }
|
---|
| 1308 |
|
---|
| 1309 |
|
---|
| 1310 | M68KMAKE_OP(addi, 16, ., .)
|
---|
| 1311 | {
|
---|
| 1312 | uint src = OPER_I_16();
|
---|
| 1313 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 1314 | uint dst = m68ki_read_16(ea);
|
---|
| 1315 | uint res = src + dst;
|
---|
| 1316 |
|
---|
| 1317 | FLAG_N = NFLAG_16(res);
|
---|
| 1318 | FLAG_V = VFLAG_ADD_16(src, dst, res);
|
---|
| 1319 | FLAG_X = FLAG_C = CFLAG_16(res);
|
---|
| 1320 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 1321 |
|
---|
| 1322 | m68ki_write_16(ea, FLAG_Z);
|
---|
| 1323 | }
|
---|
| 1324 |
|
---|
| 1325 |
|
---|
| 1326 | M68KMAKE_OP(addi, 32, ., d)
|
---|
| 1327 | {
|
---|
| 1328 | uint* r_dst = &DY;
|
---|
| 1329 | uint src = OPER_I_32();
|
---|
| 1330 | uint dst = *r_dst;
|
---|
| 1331 | uint res = src + dst;
|
---|
| 1332 |
|
---|
| 1333 | FLAG_N = NFLAG_32(res);
|
---|
| 1334 | FLAG_V = VFLAG_ADD_32(src, dst, res);
|
---|
| 1335 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
|
---|
| 1336 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 1337 |
|
---|
| 1338 | *r_dst = FLAG_Z;
|
---|
| 1339 | }
|
---|
| 1340 |
|
---|
| 1341 |
|
---|
| 1342 | M68KMAKE_OP(addi, 32, ., .)
|
---|
| 1343 | {
|
---|
| 1344 | uint src = OPER_I_32();
|
---|
| 1345 | uint ea = M68KMAKE_GET_EA_AY_32;
|
---|
| 1346 | uint dst = m68ki_read_32(ea);
|
---|
| 1347 | uint res = src + dst;
|
---|
| 1348 |
|
---|
| 1349 | FLAG_N = NFLAG_32(res);
|
---|
| 1350 | FLAG_V = VFLAG_ADD_32(src, dst, res);
|
---|
| 1351 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
|
---|
| 1352 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 1353 |
|
---|
| 1354 | m68ki_write_32(ea, FLAG_Z);
|
---|
| 1355 | }
|
---|
| 1356 |
|
---|
| 1357 |
|
---|
| 1358 | M68KMAKE_OP(addq, 8, ., d)
|
---|
| 1359 | {
|
---|
| 1360 | uint* r_dst = &DY;
|
---|
| 1361 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 1362 | uint dst = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 1363 | uint res = src + dst;
|
---|
| 1364 |
|
---|
| 1365 | FLAG_N = NFLAG_8(res);
|
---|
| 1366 | FLAG_V = VFLAG_ADD_8(src, dst, res);
|
---|
| 1367 | FLAG_X = FLAG_C = CFLAG_8(res);
|
---|
| 1368 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 1369 |
|
---|
| 1370 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
|
---|
| 1371 | }
|
---|
| 1372 |
|
---|
| 1373 |
|
---|
| 1374 | M68KMAKE_OP(addq, 8, ., .)
|
---|
| 1375 | {
|
---|
| 1376 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 1377 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 1378 | uint dst = m68ki_read_8(ea);
|
---|
| 1379 | uint res = src + dst;
|
---|
| 1380 |
|
---|
| 1381 | FLAG_N = NFLAG_8(res);
|
---|
| 1382 | FLAG_V = VFLAG_ADD_8(src, dst, res);
|
---|
| 1383 | FLAG_X = FLAG_C = CFLAG_8(res);
|
---|
| 1384 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 1385 |
|
---|
| 1386 | m68ki_write_8(ea, FLAG_Z);
|
---|
| 1387 | }
|
---|
| 1388 |
|
---|
| 1389 |
|
---|
| 1390 | M68KMAKE_OP(addq, 16, ., d)
|
---|
| 1391 | {
|
---|
| 1392 | uint* r_dst = &DY;
|
---|
| 1393 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 1394 | uint dst = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 1395 | uint res = src + dst;
|
---|
| 1396 |
|
---|
| 1397 | FLAG_N = NFLAG_16(res);
|
---|
| 1398 | FLAG_V = VFLAG_ADD_16(src, dst, res);
|
---|
| 1399 | FLAG_X = FLAG_C = CFLAG_16(res);
|
---|
| 1400 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 1401 |
|
---|
| 1402 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
|
---|
| 1403 | }
|
---|
| 1404 |
|
---|
| 1405 |
|
---|
| 1406 | M68KMAKE_OP(addq, 16, ., a)
|
---|
| 1407 | {
|
---|
| 1408 | uint* r_dst = &AY;
|
---|
| 1409 |
|
---|
| 1410 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + (((REG_IR >> 9) - 1) & 7) + 1);
|
---|
| 1411 | }
|
---|
| 1412 |
|
---|
| 1413 |
|
---|
| 1414 | M68KMAKE_OP(addq, 16, ., .)
|
---|
| 1415 | {
|
---|
| 1416 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 1417 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 1418 | uint dst = m68ki_read_16(ea);
|
---|
| 1419 | uint res = src + dst;
|
---|
| 1420 |
|
---|
| 1421 | FLAG_N = NFLAG_16(res);
|
---|
| 1422 | FLAG_V = VFLAG_ADD_16(src, dst, res);
|
---|
| 1423 | FLAG_X = FLAG_C = CFLAG_16(res);
|
---|
| 1424 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 1425 |
|
---|
| 1426 | m68ki_write_16(ea, FLAG_Z);
|
---|
| 1427 | }
|
---|
| 1428 |
|
---|
| 1429 |
|
---|
| 1430 | M68KMAKE_OP(addq, 32, ., d)
|
---|
| 1431 | {
|
---|
| 1432 | uint* r_dst = &DY;
|
---|
| 1433 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 1434 | uint dst = *r_dst;
|
---|
| 1435 | uint res = src + dst;
|
---|
| 1436 |
|
---|
| 1437 | FLAG_N = NFLAG_32(res);
|
---|
| 1438 | FLAG_V = VFLAG_ADD_32(src, dst, res);
|
---|
| 1439 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
|
---|
| 1440 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 1441 |
|
---|
| 1442 | *r_dst = FLAG_Z;
|
---|
| 1443 | }
|
---|
| 1444 |
|
---|
| 1445 |
|
---|
| 1446 | M68KMAKE_OP(addq, 32, ., a)
|
---|
| 1447 | {
|
---|
| 1448 | uint* r_dst = &AY;
|
---|
| 1449 |
|
---|
| 1450 | *r_dst = MASK_OUT_ABOVE_32(*r_dst + (((REG_IR >> 9) - 1) & 7) + 1);
|
---|
| 1451 | }
|
---|
| 1452 |
|
---|
| 1453 |
|
---|
| 1454 | M68KMAKE_OP(addq, 32, ., .)
|
---|
| 1455 | {
|
---|
| 1456 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 1457 | uint ea = M68KMAKE_GET_EA_AY_32;
|
---|
| 1458 | uint dst = m68ki_read_32(ea);
|
---|
| 1459 | uint res = src + dst;
|
---|
| 1460 |
|
---|
| 1461 |
|
---|
| 1462 | FLAG_N = NFLAG_32(res);
|
---|
| 1463 | FLAG_V = VFLAG_ADD_32(src, dst, res);
|
---|
| 1464 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
|
---|
| 1465 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 1466 |
|
---|
| 1467 | m68ki_write_32(ea, FLAG_Z);
|
---|
| 1468 | }
|
---|
| 1469 |
|
---|
| 1470 |
|
---|
| 1471 | M68KMAKE_OP(addx, 8, rr, .)
|
---|
| 1472 | {
|
---|
| 1473 | uint* r_dst = &DX;
|
---|
| 1474 | uint src = MASK_OUT_ABOVE_8(DY);
|
---|
| 1475 | uint dst = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 1476 | uint res = src + dst + XFLAG_AS_1();
|
---|
| 1477 |
|
---|
| 1478 | FLAG_N = NFLAG_8(res);
|
---|
| 1479 | FLAG_V = VFLAG_ADD_8(src, dst, res);
|
---|
| 1480 | FLAG_X = FLAG_C = CFLAG_8(res);
|
---|
| 1481 |
|
---|
| 1482 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 1483 | FLAG_Z |= res;
|
---|
| 1484 |
|
---|
| 1485 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
|
---|
| 1486 | }
|
---|
| 1487 |
|
---|
| 1488 |
|
---|
| 1489 | M68KMAKE_OP(addx, 16, rr, .)
|
---|
| 1490 | {
|
---|
| 1491 | uint* r_dst = &DX;
|
---|
| 1492 | uint src = MASK_OUT_ABOVE_16(DY);
|
---|
| 1493 | uint dst = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 1494 | uint res = src + dst + XFLAG_AS_1();
|
---|
| 1495 |
|
---|
| 1496 | FLAG_N = NFLAG_16(res);
|
---|
| 1497 | FLAG_V = VFLAG_ADD_16(src, dst, res);
|
---|
| 1498 | FLAG_X = FLAG_C = CFLAG_16(res);
|
---|
| 1499 |
|
---|
| 1500 | res = MASK_OUT_ABOVE_16(res);
|
---|
| 1501 | FLAG_Z |= res;
|
---|
| 1502 |
|
---|
| 1503 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
|
---|
| 1504 | }
|
---|
| 1505 |
|
---|
| 1506 |
|
---|
| 1507 | M68KMAKE_OP(addx, 32, rr, .)
|
---|
| 1508 | {
|
---|
| 1509 | uint* r_dst = &DX;
|
---|
| 1510 | uint src = DY;
|
---|
| 1511 | uint dst = *r_dst;
|
---|
| 1512 | uint res = src + dst + XFLAG_AS_1();
|
---|
| 1513 |
|
---|
| 1514 | FLAG_N = NFLAG_32(res);
|
---|
| 1515 | FLAG_V = VFLAG_ADD_32(src, dst, res);
|
---|
| 1516 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
|
---|
| 1517 |
|
---|
| 1518 | res = MASK_OUT_ABOVE_32(res);
|
---|
| 1519 | FLAG_Z |= res;
|
---|
| 1520 |
|
---|
| 1521 | *r_dst = res;
|
---|
| 1522 | }
|
---|
| 1523 |
|
---|
| 1524 |
|
---|
| 1525 | M68KMAKE_OP(addx, 8, mm, ax7)
|
---|
| 1526 | {
|
---|
| 1527 | uint src = OPER_AY_PD_8();
|
---|
| 1528 | uint ea = EA_A7_PD_8();
|
---|
| 1529 | uint dst = m68ki_read_8(ea);
|
---|
| 1530 | uint res = src + dst + XFLAG_AS_1();
|
---|
| 1531 |
|
---|
| 1532 | FLAG_N = NFLAG_8(res);
|
---|
| 1533 | FLAG_V = VFLAG_ADD_8(src, dst, res);
|
---|
| 1534 | FLAG_X = FLAG_C = CFLAG_8(res);
|
---|
| 1535 |
|
---|
| 1536 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 1537 | FLAG_Z |= res;
|
---|
| 1538 |
|
---|
| 1539 | m68ki_write_8(ea, res);
|
---|
| 1540 | }
|
---|
| 1541 |
|
---|
| 1542 |
|
---|
| 1543 | M68KMAKE_OP(addx, 8, mm, ay7)
|
---|
| 1544 | {
|
---|
| 1545 | uint src = OPER_A7_PD_8();
|
---|
| 1546 | uint ea = EA_AX_PD_8();
|
---|
| 1547 | uint dst = m68ki_read_8(ea);
|
---|
| 1548 | uint res = src + dst + XFLAG_AS_1();
|
---|
| 1549 |
|
---|
| 1550 | FLAG_N = NFLAG_8(res);
|
---|
| 1551 | FLAG_V = VFLAG_ADD_8(src, dst, res);
|
---|
| 1552 | FLAG_X = FLAG_C = CFLAG_8(res);
|
---|
| 1553 |
|
---|
| 1554 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 1555 | FLAG_Z |= res;
|
---|
| 1556 |
|
---|
| 1557 | m68ki_write_8(ea, res);
|
---|
| 1558 | }
|
---|
| 1559 |
|
---|
| 1560 |
|
---|
| 1561 | M68KMAKE_OP(addx, 8, mm, axy7)
|
---|
| 1562 | {
|
---|
| 1563 | uint src = OPER_A7_PD_8();
|
---|
| 1564 | uint ea = EA_A7_PD_8();
|
---|
| 1565 | uint dst = m68ki_read_8(ea);
|
---|
| 1566 | uint res = src + dst + XFLAG_AS_1();
|
---|
| 1567 |
|
---|
| 1568 | FLAG_N = NFLAG_8(res);
|
---|
| 1569 | FLAG_V = VFLAG_ADD_8(src, dst, res);
|
---|
| 1570 | FLAG_X = FLAG_C = CFLAG_8(res);
|
---|
| 1571 |
|
---|
| 1572 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 1573 | FLAG_Z |= res;
|
---|
| 1574 |
|
---|
| 1575 | m68ki_write_8(ea, res);
|
---|
| 1576 | }
|
---|
| 1577 |
|
---|
| 1578 |
|
---|
| 1579 | M68KMAKE_OP(addx, 8, mm, .)
|
---|
| 1580 | {
|
---|
| 1581 | uint src = OPER_AY_PD_8();
|
---|
| 1582 | uint ea = EA_AX_PD_8();
|
---|
| 1583 | uint dst = m68ki_read_8(ea);
|
---|
| 1584 | uint res = src + dst + XFLAG_AS_1();
|
---|
| 1585 |
|
---|
| 1586 | FLAG_N = NFLAG_8(res);
|
---|
| 1587 | FLAG_V = VFLAG_ADD_8(src, dst, res);
|
---|
| 1588 | FLAG_X = FLAG_C = CFLAG_8(res);
|
---|
| 1589 |
|
---|
| 1590 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 1591 | FLAG_Z |= res;
|
---|
| 1592 |
|
---|
| 1593 | m68ki_write_8(ea, res);
|
---|
| 1594 | }
|
---|
| 1595 |
|
---|
| 1596 |
|
---|
| 1597 | M68KMAKE_OP(addx, 16, mm, .)
|
---|
| 1598 | {
|
---|
| 1599 | uint src = OPER_AY_PD_16();
|
---|
| 1600 | uint ea = EA_AX_PD_16();
|
---|
| 1601 | uint dst = m68ki_read_16(ea);
|
---|
| 1602 | uint res = src + dst + XFLAG_AS_1();
|
---|
| 1603 |
|
---|
| 1604 | FLAG_N = NFLAG_16(res);
|
---|
| 1605 | FLAG_V = VFLAG_ADD_16(src, dst, res);
|
---|
| 1606 | FLAG_X = FLAG_C = CFLAG_16(res);
|
---|
| 1607 |
|
---|
| 1608 | res = MASK_OUT_ABOVE_16(res);
|
---|
| 1609 | FLAG_Z |= res;
|
---|
| 1610 |
|
---|
| 1611 | m68ki_write_16(ea, res);
|
---|
| 1612 | }
|
---|
| 1613 |
|
---|
| 1614 |
|
---|
| 1615 | M68KMAKE_OP(addx, 32, mm, .)
|
---|
| 1616 | {
|
---|
| 1617 | uint src = OPER_AY_PD_32();
|
---|
| 1618 | uint ea = EA_AX_PD_32();
|
---|
| 1619 | uint dst = m68ki_read_32(ea);
|
---|
| 1620 | uint res = src + dst + XFLAG_AS_1();
|
---|
| 1621 |
|
---|
| 1622 | FLAG_N = NFLAG_32(res);
|
---|
| 1623 | FLAG_V = VFLAG_ADD_32(src, dst, res);
|
---|
| 1624 | FLAG_X = FLAG_C = CFLAG_ADD_32(src, dst, res);
|
---|
| 1625 |
|
---|
| 1626 | res = MASK_OUT_ABOVE_32(res);
|
---|
| 1627 | FLAG_Z |= res;
|
---|
| 1628 |
|
---|
| 1629 | m68ki_write_32(ea, res);
|
---|
| 1630 | }
|
---|
| 1631 |
|
---|
| 1632 |
|
---|
| 1633 | M68KMAKE_OP(and, 8, er, d)
|
---|
| 1634 | {
|
---|
| 1635 | FLAG_Z = MASK_OUT_ABOVE_8(DX &= (DY | 0xffffff00));
|
---|
| 1636 |
|
---|
| 1637 | FLAG_N = NFLAG_8(FLAG_Z);
|
---|
| 1638 | FLAG_C = CFLAG_CLEAR;
|
---|
| 1639 | FLAG_V = VFLAG_CLEAR;
|
---|
| 1640 | }
|
---|
| 1641 |
|
---|
| 1642 |
|
---|
| 1643 | M68KMAKE_OP(and, 8, er, .)
|
---|
| 1644 | {
|
---|
| 1645 | FLAG_Z = MASK_OUT_ABOVE_8(DX &= (M68KMAKE_GET_OPER_AY_8 | 0xffffff00));
|
---|
| 1646 |
|
---|
| 1647 | FLAG_N = NFLAG_8(FLAG_Z);
|
---|
| 1648 | FLAG_C = CFLAG_CLEAR;
|
---|
| 1649 | FLAG_V = VFLAG_CLEAR;
|
---|
| 1650 | }
|
---|
| 1651 |
|
---|
| 1652 |
|
---|
| 1653 | M68KMAKE_OP(and, 16, er, d)
|
---|
| 1654 | {
|
---|
| 1655 | FLAG_Z = MASK_OUT_ABOVE_16(DX &= (DY | 0xffff0000));
|
---|
| 1656 |
|
---|
| 1657 | FLAG_N = NFLAG_16(FLAG_Z);
|
---|
| 1658 | FLAG_C = CFLAG_CLEAR;
|
---|
| 1659 | FLAG_V = VFLAG_CLEAR;
|
---|
| 1660 | }
|
---|
| 1661 |
|
---|
| 1662 |
|
---|
| 1663 | M68KMAKE_OP(and, 16, er, .)
|
---|
| 1664 | {
|
---|
| 1665 | FLAG_Z = MASK_OUT_ABOVE_16(DX &= (M68KMAKE_GET_OPER_AY_16 | 0xffff0000));
|
---|
| 1666 |
|
---|
| 1667 | FLAG_N = NFLAG_16(FLAG_Z);
|
---|
| 1668 | FLAG_C = CFLAG_CLEAR;
|
---|
| 1669 | FLAG_V = VFLAG_CLEAR;
|
---|
| 1670 | }
|
---|
| 1671 |
|
---|
| 1672 |
|
---|
| 1673 | M68KMAKE_OP(and, 32, er, d)
|
---|
| 1674 | {
|
---|
| 1675 | FLAG_Z = DX &= DY;
|
---|
| 1676 |
|
---|
| 1677 | FLAG_N = NFLAG_32(FLAG_Z);
|
---|
| 1678 | FLAG_C = CFLAG_CLEAR;
|
---|
| 1679 | FLAG_V = VFLAG_CLEAR;
|
---|
| 1680 | }
|
---|
| 1681 |
|
---|
| 1682 |
|
---|
| 1683 | M68KMAKE_OP(and, 32, er, .)
|
---|
| 1684 | {
|
---|
| 1685 | FLAG_Z = DX &= M68KMAKE_GET_OPER_AY_32;
|
---|
| 1686 |
|
---|
| 1687 | FLAG_N = NFLAG_32(FLAG_Z);
|
---|
| 1688 | FLAG_C = CFLAG_CLEAR;
|
---|
| 1689 | FLAG_V = VFLAG_CLEAR;
|
---|
| 1690 | }
|
---|
| 1691 |
|
---|
| 1692 |
|
---|
| 1693 | M68KMAKE_OP(and, 8, re, .)
|
---|
| 1694 | {
|
---|
| 1695 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 1696 | uint res = DX & m68ki_read_8(ea);
|
---|
| 1697 |
|
---|
| 1698 | FLAG_N = NFLAG_8(res);
|
---|
| 1699 | FLAG_C = CFLAG_CLEAR;
|
---|
| 1700 | FLAG_V = VFLAG_CLEAR;
|
---|
| 1701 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 1702 |
|
---|
| 1703 | m68ki_write_8(ea, FLAG_Z);
|
---|
| 1704 | }
|
---|
| 1705 |
|
---|
| 1706 |
|
---|
| 1707 | M68KMAKE_OP(and, 16, re, .)
|
---|
| 1708 | {
|
---|
| 1709 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 1710 | uint res = DX & m68ki_read_16(ea);
|
---|
| 1711 |
|
---|
| 1712 | FLAG_N = NFLAG_16(res);
|
---|
| 1713 | FLAG_C = CFLAG_CLEAR;
|
---|
| 1714 | FLAG_V = VFLAG_CLEAR;
|
---|
| 1715 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 1716 |
|
---|
| 1717 | m68ki_write_16(ea, FLAG_Z);
|
---|
| 1718 | }
|
---|
| 1719 |
|
---|
| 1720 |
|
---|
| 1721 | M68KMAKE_OP(and, 32, re, .)
|
---|
| 1722 | {
|
---|
| 1723 | uint ea = M68KMAKE_GET_EA_AY_32;
|
---|
| 1724 | uint res = DX & m68ki_read_32(ea);
|
---|
| 1725 |
|
---|
| 1726 | FLAG_N = NFLAG_32(res);
|
---|
| 1727 | FLAG_Z = res;
|
---|
| 1728 | FLAG_C = CFLAG_CLEAR;
|
---|
| 1729 | FLAG_V = VFLAG_CLEAR;
|
---|
| 1730 |
|
---|
| 1731 | m68ki_write_32(ea, res);
|
---|
| 1732 | }
|
---|
| 1733 |
|
---|
| 1734 |
|
---|
| 1735 | M68KMAKE_OP(andi, 8, ., d)
|
---|
| 1736 | {
|
---|
| 1737 | FLAG_Z = MASK_OUT_ABOVE_8(DY &= (OPER_I_8() | 0xffffff00));
|
---|
| 1738 |
|
---|
| 1739 | FLAG_N = NFLAG_8(FLAG_Z);
|
---|
| 1740 | FLAG_C = CFLAG_CLEAR;
|
---|
| 1741 | FLAG_V = VFLAG_CLEAR;
|
---|
| 1742 | }
|
---|
| 1743 |
|
---|
| 1744 |
|
---|
| 1745 | M68KMAKE_OP(andi, 8, ., .)
|
---|
| 1746 | {
|
---|
| 1747 | uint src = OPER_I_8();
|
---|
| 1748 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 1749 | uint res = src & m68ki_read_8(ea);
|
---|
| 1750 |
|
---|
| 1751 | FLAG_N = NFLAG_8(res);
|
---|
| 1752 | FLAG_Z = res;
|
---|
| 1753 | FLAG_C = CFLAG_CLEAR;
|
---|
| 1754 | FLAG_V = VFLAG_CLEAR;
|
---|
| 1755 |
|
---|
| 1756 | m68ki_write_8(ea, res);
|
---|
| 1757 | }
|
---|
| 1758 |
|
---|
| 1759 |
|
---|
| 1760 | M68KMAKE_OP(andi, 16, ., d)
|
---|
| 1761 | {
|
---|
| 1762 | FLAG_Z = MASK_OUT_ABOVE_16(DY &= (OPER_I_16() | 0xffff0000));
|
---|
| 1763 |
|
---|
| 1764 | FLAG_N = NFLAG_16(FLAG_Z);
|
---|
| 1765 | FLAG_C = CFLAG_CLEAR;
|
---|
| 1766 | FLAG_V = VFLAG_CLEAR;
|
---|
| 1767 | }
|
---|
| 1768 |
|
---|
| 1769 |
|
---|
| 1770 | M68KMAKE_OP(andi, 16, ., .)
|
---|
| 1771 | {
|
---|
| 1772 | uint src = OPER_I_16();
|
---|
| 1773 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 1774 | uint res = src & m68ki_read_16(ea);
|
---|
| 1775 |
|
---|
| 1776 | FLAG_N = NFLAG_16(res);
|
---|
| 1777 | FLAG_Z = res;
|
---|
| 1778 | FLAG_C = CFLAG_CLEAR;
|
---|
| 1779 | FLAG_V = VFLAG_CLEAR;
|
---|
| 1780 |
|
---|
| 1781 | m68ki_write_16(ea, res);
|
---|
| 1782 | }
|
---|
| 1783 |
|
---|
| 1784 |
|
---|
| 1785 | M68KMAKE_OP(andi, 32, ., d)
|
---|
| 1786 | {
|
---|
| 1787 | FLAG_Z = DY &= (OPER_I_32());
|
---|
| 1788 |
|
---|
| 1789 | FLAG_N = NFLAG_32(FLAG_Z);
|
---|
| 1790 | FLAG_C = CFLAG_CLEAR;
|
---|
| 1791 | FLAG_V = VFLAG_CLEAR;
|
---|
| 1792 | }
|
---|
| 1793 |
|
---|
| 1794 |
|
---|
| 1795 | M68KMAKE_OP(andi, 32, ., .)
|
---|
| 1796 | {
|
---|
| 1797 | uint src = OPER_I_32();
|
---|
| 1798 | uint ea = M68KMAKE_GET_EA_AY_32;
|
---|
| 1799 | uint res = src & m68ki_read_32(ea);
|
---|
| 1800 |
|
---|
| 1801 | FLAG_N = NFLAG_32(res);
|
---|
| 1802 | FLAG_Z = res;
|
---|
| 1803 | FLAG_C = CFLAG_CLEAR;
|
---|
| 1804 | FLAG_V = VFLAG_CLEAR;
|
---|
| 1805 |
|
---|
| 1806 | m68ki_write_32(ea, res);
|
---|
| 1807 | }
|
---|
| 1808 |
|
---|
| 1809 |
|
---|
| 1810 | M68KMAKE_OP(andi, 16, toc, .)
|
---|
| 1811 | {
|
---|
| 1812 | m68ki_set_ccr(m68ki_get_ccr() & OPER_I_16());
|
---|
| 1813 | }
|
---|
| 1814 |
|
---|
| 1815 |
|
---|
| 1816 | M68KMAKE_OP(andi, 16, tos, .)
|
---|
| 1817 | {
|
---|
| 1818 | if(FLAG_S)
|
---|
| 1819 | {
|
---|
| 1820 | uint src = OPER_I_16();
|
---|
| 1821 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 1822 | m68ki_set_sr(m68ki_get_sr() & src);
|
---|
| 1823 | return;
|
---|
| 1824 | }
|
---|
| 1825 | m68ki_exception_privilege_violation();
|
---|
| 1826 | }
|
---|
| 1827 |
|
---|
| 1828 |
|
---|
| 1829 | M68KMAKE_OP(asr, 8, s, .)
|
---|
| 1830 | {
|
---|
| 1831 | uint* r_dst = &DY;
|
---|
| 1832 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 1833 | uint src = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 1834 | uint res = src >> shift;
|
---|
| 1835 |
|
---|
| 1836 | if(GET_MSB_8(src))
|
---|
| 1837 | res |= m68ki_shift_8_table[shift];
|
---|
| 1838 |
|
---|
| 1839 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
|
---|
| 1840 |
|
---|
| 1841 | FLAG_N = NFLAG_8(res);
|
---|
| 1842 | FLAG_Z = res;
|
---|
| 1843 | FLAG_V = VFLAG_CLEAR;
|
---|
| 1844 | FLAG_X = FLAG_C = src << (9-shift);
|
---|
| 1845 | }
|
---|
| 1846 |
|
---|
| 1847 |
|
---|
| 1848 | M68KMAKE_OP(asr, 16, s, .)
|
---|
| 1849 | {
|
---|
| 1850 | uint* r_dst = &DY;
|
---|
| 1851 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 1852 | uint src = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 1853 | uint res = src >> shift;
|
---|
| 1854 |
|
---|
| 1855 | if(GET_MSB_16(src))
|
---|
| 1856 | res |= m68ki_shift_16_table[shift];
|
---|
| 1857 |
|
---|
| 1858 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
|
---|
| 1859 |
|
---|
| 1860 | FLAG_N = NFLAG_16(res);
|
---|
| 1861 | FLAG_Z = res;
|
---|
| 1862 | FLAG_V = VFLAG_CLEAR;
|
---|
| 1863 | FLAG_X = FLAG_C = src << (9-shift);
|
---|
| 1864 | }
|
---|
| 1865 |
|
---|
| 1866 |
|
---|
| 1867 | M68KMAKE_OP(asr, 32, s, .)
|
---|
| 1868 | {
|
---|
| 1869 | uint* r_dst = &DY;
|
---|
| 1870 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 1871 | uint src = *r_dst;
|
---|
| 1872 | uint res = src >> shift;
|
---|
| 1873 |
|
---|
| 1874 | if(GET_MSB_32(src))
|
---|
| 1875 | res |= m68ki_shift_32_table[shift];
|
---|
| 1876 |
|
---|
| 1877 | *r_dst = res;
|
---|
| 1878 |
|
---|
| 1879 | FLAG_N = NFLAG_32(res);
|
---|
| 1880 | FLAG_Z = res;
|
---|
| 1881 | FLAG_V = VFLAG_CLEAR;
|
---|
| 1882 | FLAG_X = FLAG_C = src << (9-shift);
|
---|
| 1883 | }
|
---|
| 1884 |
|
---|
| 1885 |
|
---|
| 1886 | M68KMAKE_OP(asr, 8, r, .)
|
---|
| 1887 | {
|
---|
| 1888 | uint* r_dst = &DY;
|
---|
| 1889 | uint shift = DX & 0x3f;
|
---|
| 1890 | uint src = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 1891 | uint res = src >> shift;
|
---|
| 1892 |
|
---|
| 1893 | if(shift != 0)
|
---|
| 1894 | {
|
---|
| 1895 | USE_CYCLES(shift<<CYC_SHIFT);
|
---|
| 1896 |
|
---|
| 1897 | if(shift < 8)
|
---|
| 1898 | {
|
---|
| 1899 | if(GET_MSB_8(src))
|
---|
| 1900 | res |= m68ki_shift_8_table[shift];
|
---|
| 1901 |
|
---|
| 1902 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
|
---|
| 1903 |
|
---|
| 1904 | FLAG_X = FLAG_C = src << (9-shift);
|
---|
| 1905 | FLAG_N = NFLAG_8(res);
|
---|
| 1906 | FLAG_Z = res;
|
---|
| 1907 | FLAG_V = VFLAG_CLEAR;
|
---|
| 1908 | return;
|
---|
| 1909 | }
|
---|
| 1910 |
|
---|
| 1911 | if(GET_MSB_8(src))
|
---|
| 1912 | {
|
---|
| 1913 | *r_dst |= 0xff;
|
---|
| 1914 | FLAG_C = CFLAG_SET;
|
---|
| 1915 | FLAG_X = XFLAG_SET;
|
---|
| 1916 | FLAG_N = NFLAG_SET;
|
---|
| 1917 | FLAG_Z = ZFLAG_CLEAR;
|
---|
| 1918 | FLAG_V = VFLAG_CLEAR;
|
---|
| 1919 | return;
|
---|
| 1920 | }
|
---|
| 1921 |
|
---|
| 1922 | *r_dst &= 0xffffff00;
|
---|
| 1923 | FLAG_C = CFLAG_CLEAR;
|
---|
| 1924 | FLAG_X = XFLAG_CLEAR;
|
---|
| 1925 | FLAG_N = NFLAG_CLEAR;
|
---|
| 1926 | FLAG_Z = ZFLAG_SET;
|
---|
| 1927 | FLAG_V = VFLAG_CLEAR;
|
---|
| 1928 | return;
|
---|
| 1929 | }
|
---|
| 1930 |
|
---|
| 1931 | FLAG_C = CFLAG_CLEAR;
|
---|
| 1932 | FLAG_N = NFLAG_8(src);
|
---|
| 1933 | FLAG_Z = src;
|
---|
| 1934 | FLAG_V = VFLAG_CLEAR;
|
---|
| 1935 | }
|
---|
| 1936 |
|
---|
| 1937 |
|
---|
| 1938 | M68KMAKE_OP(asr, 16, r, .)
|
---|
| 1939 | {
|
---|
| 1940 | uint* r_dst = &DY;
|
---|
| 1941 | uint shift = DX & 0x3f;
|
---|
| 1942 | uint src = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 1943 | uint res = src >> shift;
|
---|
| 1944 |
|
---|
| 1945 | if(shift != 0)
|
---|
| 1946 | {
|
---|
| 1947 | USE_CYCLES(shift<<CYC_SHIFT);
|
---|
| 1948 |
|
---|
| 1949 | if(shift < 16)
|
---|
| 1950 | {
|
---|
| 1951 | if(GET_MSB_16(src))
|
---|
| 1952 | res |= m68ki_shift_16_table[shift];
|
---|
| 1953 |
|
---|
| 1954 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
|
---|
| 1955 |
|
---|
| 1956 | FLAG_C = FLAG_X = (src >> (shift - 1))<<8;
|
---|
| 1957 | FLAG_N = NFLAG_16(res);
|
---|
| 1958 | FLAG_Z = res;
|
---|
| 1959 | FLAG_V = VFLAG_CLEAR;
|
---|
| 1960 | return;
|
---|
| 1961 | }
|
---|
| 1962 |
|
---|
| 1963 | if(GET_MSB_16(src))
|
---|
| 1964 | {
|
---|
| 1965 | *r_dst |= 0xffff;
|
---|
| 1966 | FLAG_C = CFLAG_SET;
|
---|
| 1967 | FLAG_X = XFLAG_SET;
|
---|
| 1968 | FLAG_N = NFLAG_SET;
|
---|
| 1969 | FLAG_Z = ZFLAG_CLEAR;
|
---|
| 1970 | FLAG_V = VFLAG_CLEAR;
|
---|
| 1971 | return;
|
---|
| 1972 | }
|
---|
| 1973 |
|
---|
| 1974 | *r_dst &= 0xffff0000;
|
---|
| 1975 | FLAG_C = CFLAG_CLEAR;
|
---|
| 1976 | FLAG_X = XFLAG_CLEAR;
|
---|
| 1977 | FLAG_N = NFLAG_CLEAR;
|
---|
| 1978 | FLAG_Z = ZFLAG_SET;
|
---|
| 1979 | FLAG_V = VFLAG_CLEAR;
|
---|
| 1980 | return;
|
---|
| 1981 | }
|
---|
| 1982 |
|
---|
| 1983 | FLAG_C = CFLAG_CLEAR;
|
---|
| 1984 | FLAG_N = NFLAG_16(src);
|
---|
| 1985 | FLAG_Z = src;
|
---|
| 1986 | FLAG_V = VFLAG_CLEAR;
|
---|
| 1987 | }
|
---|
| 1988 |
|
---|
| 1989 |
|
---|
| 1990 | M68KMAKE_OP(asr, 32, r, .)
|
---|
| 1991 | {
|
---|
| 1992 | uint* r_dst = &DY;
|
---|
| 1993 | uint shift = DX & 0x3f;
|
---|
| 1994 | uint src = *r_dst;
|
---|
| 1995 | uint res = src >> shift;
|
---|
| 1996 |
|
---|
| 1997 | if(shift != 0)
|
---|
| 1998 | {
|
---|
| 1999 | USE_CYCLES(shift<<CYC_SHIFT);
|
---|
| 2000 |
|
---|
| 2001 | if(shift < 32)
|
---|
| 2002 | {
|
---|
| 2003 | if(GET_MSB_32(src))
|
---|
| 2004 | res |= m68ki_shift_32_table[shift];
|
---|
| 2005 |
|
---|
| 2006 | *r_dst = res;
|
---|
| 2007 |
|
---|
| 2008 | FLAG_C = FLAG_X = (src >> (shift - 1))<<8;
|
---|
| 2009 | FLAG_N = NFLAG_32(res);
|
---|
| 2010 | FLAG_Z = res;
|
---|
| 2011 | FLAG_V = VFLAG_CLEAR;
|
---|
| 2012 | return;
|
---|
| 2013 | }
|
---|
| 2014 |
|
---|
| 2015 | if(GET_MSB_32(src))
|
---|
| 2016 | {
|
---|
| 2017 | *r_dst = 0xffffffff;
|
---|
| 2018 | FLAG_C = CFLAG_SET;
|
---|
| 2019 | FLAG_X = XFLAG_SET;
|
---|
| 2020 | FLAG_N = NFLAG_SET;
|
---|
| 2021 | FLAG_Z = ZFLAG_CLEAR;
|
---|
| 2022 | FLAG_V = VFLAG_CLEAR;
|
---|
| 2023 | return;
|
---|
| 2024 | }
|
---|
| 2025 |
|
---|
| 2026 | *r_dst = 0;
|
---|
| 2027 | FLAG_C = CFLAG_CLEAR;
|
---|
| 2028 | FLAG_X = XFLAG_CLEAR;
|
---|
| 2029 | FLAG_N = NFLAG_CLEAR;
|
---|
| 2030 | FLAG_Z = ZFLAG_SET;
|
---|
| 2031 | FLAG_V = VFLAG_CLEAR;
|
---|
| 2032 | return;
|
---|
| 2033 | }
|
---|
| 2034 |
|
---|
| 2035 | FLAG_C = CFLAG_CLEAR;
|
---|
| 2036 | FLAG_N = NFLAG_32(src);
|
---|
| 2037 | FLAG_Z = src;
|
---|
| 2038 | FLAG_V = VFLAG_CLEAR;
|
---|
| 2039 | }
|
---|
| 2040 |
|
---|
| 2041 |
|
---|
| 2042 | M68KMAKE_OP(asr, 16, ., .)
|
---|
| 2043 | {
|
---|
| 2044 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 2045 | uint src = m68ki_read_16(ea);
|
---|
| 2046 | uint res = src >> 1;
|
---|
| 2047 |
|
---|
| 2048 | if(GET_MSB_16(src))
|
---|
| 2049 | res |= 0x8000;
|
---|
| 2050 |
|
---|
| 2051 | m68ki_write_16(ea, res);
|
---|
| 2052 |
|
---|
| 2053 | FLAG_N = NFLAG_16(res);
|
---|
| 2054 | FLAG_Z = res;
|
---|
| 2055 | FLAG_V = VFLAG_CLEAR;
|
---|
| 2056 | FLAG_C = FLAG_X = src << 8;
|
---|
| 2057 | }
|
---|
| 2058 |
|
---|
| 2059 |
|
---|
| 2060 | M68KMAKE_OP(asl, 8, s, .)
|
---|
| 2061 | {
|
---|
| 2062 | uint* r_dst = &DY;
|
---|
| 2063 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 2064 | uint src = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 2065 | uint res = MASK_OUT_ABOVE_8(src << shift);
|
---|
| 2066 |
|
---|
| 2067 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
|
---|
| 2068 |
|
---|
| 2069 | FLAG_X = FLAG_C = src << shift;
|
---|
| 2070 | FLAG_N = NFLAG_8(res);
|
---|
| 2071 | FLAG_Z = res;
|
---|
| 2072 | src &= m68ki_shift_8_table[shift + 1];
|
---|
| 2073 | FLAG_V = (!(src == 0 || (src == m68ki_shift_8_table[shift + 1] && shift < 8)))<<7;
|
---|
| 2074 | }
|
---|
| 2075 |
|
---|
| 2076 |
|
---|
| 2077 | M68KMAKE_OP(asl, 16, s, .)
|
---|
| 2078 | {
|
---|
| 2079 | uint* r_dst = &DY;
|
---|
| 2080 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 2081 | uint src = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 2082 | uint res = MASK_OUT_ABOVE_16(src << shift);
|
---|
| 2083 |
|
---|
| 2084 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
|
---|
| 2085 |
|
---|
| 2086 | FLAG_N = NFLAG_16(res);
|
---|
| 2087 | FLAG_Z = res;
|
---|
| 2088 | FLAG_X = FLAG_C = src >> (8-shift);
|
---|
| 2089 | src &= m68ki_shift_16_table[shift + 1];
|
---|
| 2090 | FLAG_V = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7;
|
---|
| 2091 | }
|
---|
| 2092 |
|
---|
| 2093 |
|
---|
| 2094 | M68KMAKE_OP(asl, 32, s, .)
|
---|
| 2095 | {
|
---|
| 2096 | uint* r_dst = &DY;
|
---|
| 2097 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 2098 | uint src = *r_dst;
|
---|
| 2099 | uint res = MASK_OUT_ABOVE_32(src << shift);
|
---|
| 2100 |
|
---|
| 2101 | *r_dst = res;
|
---|
| 2102 |
|
---|
| 2103 | FLAG_N = NFLAG_32(res);
|
---|
| 2104 | FLAG_Z = res;
|
---|
| 2105 | FLAG_X = FLAG_C = src >> (24-shift);
|
---|
| 2106 | src &= m68ki_shift_32_table[shift + 1];
|
---|
| 2107 | FLAG_V = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7;
|
---|
| 2108 | }
|
---|
| 2109 |
|
---|
| 2110 |
|
---|
| 2111 | M68KMAKE_OP(asl, 8, r, .)
|
---|
| 2112 | {
|
---|
| 2113 | uint* r_dst = &DY;
|
---|
| 2114 | uint shift = DX & 0x3f;
|
---|
| 2115 | uint src = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 2116 | uint res = MASK_OUT_ABOVE_8(src << shift);
|
---|
| 2117 |
|
---|
| 2118 | if(shift != 0)
|
---|
| 2119 | {
|
---|
| 2120 | USE_CYCLES(shift<<CYC_SHIFT);
|
---|
| 2121 |
|
---|
| 2122 | if(shift < 8)
|
---|
| 2123 | {
|
---|
| 2124 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
|
---|
| 2125 | FLAG_X = FLAG_C = src << shift;
|
---|
| 2126 | FLAG_N = NFLAG_8(res);
|
---|
| 2127 | FLAG_Z = res;
|
---|
| 2128 | src &= m68ki_shift_8_table[shift + 1];
|
---|
| 2129 | FLAG_V = (!(src == 0 || src == m68ki_shift_8_table[shift + 1]))<<7;
|
---|
| 2130 | return;
|
---|
| 2131 | }
|
---|
| 2132 |
|
---|
| 2133 | *r_dst &= 0xffffff00;
|
---|
| 2134 | FLAG_X = FLAG_C = ((shift == 8 ? src & 1 : 0))<<8;
|
---|
| 2135 | FLAG_N = NFLAG_CLEAR;
|
---|
| 2136 | FLAG_Z = ZFLAG_SET;
|
---|
| 2137 | FLAG_V = (!(src == 0))<<7;
|
---|
| 2138 | return;
|
---|
| 2139 | }
|
---|
| 2140 |
|
---|
| 2141 | FLAG_C = CFLAG_CLEAR;
|
---|
| 2142 | FLAG_N = NFLAG_8(src);
|
---|
| 2143 | FLAG_Z = src;
|
---|
| 2144 | FLAG_V = VFLAG_CLEAR;
|
---|
| 2145 | }
|
---|
| 2146 |
|
---|
| 2147 |
|
---|
| 2148 | M68KMAKE_OP(asl, 16, r, .)
|
---|
| 2149 | {
|
---|
| 2150 | uint* r_dst = &DY;
|
---|
| 2151 | uint shift = DX & 0x3f;
|
---|
| 2152 | uint src = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 2153 | uint res = MASK_OUT_ABOVE_16(src << shift);
|
---|
| 2154 |
|
---|
| 2155 | if(shift != 0)
|
---|
| 2156 | {
|
---|
| 2157 | USE_CYCLES(shift<<CYC_SHIFT);
|
---|
| 2158 |
|
---|
| 2159 | if(shift < 16)
|
---|
| 2160 | {
|
---|
| 2161 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
|
---|
| 2162 | FLAG_X = FLAG_C = (src << shift) >> 8;
|
---|
| 2163 | FLAG_N = NFLAG_16(res);
|
---|
| 2164 | FLAG_Z = res;
|
---|
| 2165 | src &= m68ki_shift_16_table[shift + 1];
|
---|
| 2166 | FLAG_V = (!(src == 0 || src == m68ki_shift_16_table[shift + 1]))<<7;
|
---|
| 2167 | return;
|
---|
| 2168 | }
|
---|
| 2169 |
|
---|
| 2170 | *r_dst &= 0xffff0000;
|
---|
| 2171 | FLAG_X = FLAG_C = ((shift == 16 ? src & 1 : 0))<<8;
|
---|
| 2172 | FLAG_N = NFLAG_CLEAR;
|
---|
| 2173 | FLAG_Z = ZFLAG_SET;
|
---|
| 2174 | FLAG_V = (!(src == 0))<<7;
|
---|
| 2175 | return;
|
---|
| 2176 | }
|
---|
| 2177 |
|
---|
| 2178 | FLAG_C = CFLAG_CLEAR;
|
---|
| 2179 | FLAG_N = NFLAG_16(src);
|
---|
| 2180 | FLAG_Z = src;
|
---|
| 2181 | FLAG_V = VFLAG_CLEAR;
|
---|
| 2182 | }
|
---|
| 2183 |
|
---|
| 2184 |
|
---|
| 2185 | M68KMAKE_OP(asl, 32, r, .)
|
---|
| 2186 | {
|
---|
| 2187 | uint* r_dst = &DY;
|
---|
| 2188 | uint shift = DX & 0x3f;
|
---|
| 2189 | uint src = *r_dst;
|
---|
| 2190 | uint res = MASK_OUT_ABOVE_32(src << shift);
|
---|
| 2191 |
|
---|
| 2192 | if(shift != 0)
|
---|
| 2193 | {
|
---|
| 2194 | USE_CYCLES(shift<<CYC_SHIFT);
|
---|
| 2195 |
|
---|
| 2196 | if(shift < 32)
|
---|
| 2197 | {
|
---|
| 2198 | *r_dst = res;
|
---|
| 2199 | FLAG_X = FLAG_C = (src >> (32 - shift)) << 8;
|
---|
| 2200 | FLAG_N = NFLAG_32(res);
|
---|
| 2201 | FLAG_Z = res;
|
---|
| 2202 | src &= m68ki_shift_32_table[shift + 1];
|
---|
| 2203 | FLAG_V = (!(src == 0 || src == m68ki_shift_32_table[shift + 1]))<<7;
|
---|
| 2204 | return;
|
---|
| 2205 | }
|
---|
| 2206 |
|
---|
| 2207 | *r_dst = 0;
|
---|
| 2208 | FLAG_X = FLAG_C = ((shift == 32 ? src & 1 : 0))<<8;
|
---|
| 2209 | FLAG_N = NFLAG_CLEAR;
|
---|
| 2210 | FLAG_Z = ZFLAG_SET;
|
---|
| 2211 | FLAG_V = (!(src == 0))<<7;
|
---|
| 2212 | return;
|
---|
| 2213 | }
|
---|
| 2214 |
|
---|
| 2215 | FLAG_C = CFLAG_CLEAR;
|
---|
| 2216 | FLAG_N = NFLAG_32(src);
|
---|
| 2217 | FLAG_Z = src;
|
---|
| 2218 | FLAG_V = VFLAG_CLEAR;
|
---|
| 2219 | }
|
---|
| 2220 |
|
---|
| 2221 |
|
---|
| 2222 | M68KMAKE_OP(asl, 16, ., .)
|
---|
| 2223 | {
|
---|
| 2224 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 2225 | uint src = m68ki_read_16(ea);
|
---|
| 2226 | uint res = MASK_OUT_ABOVE_16(src << 1);
|
---|
| 2227 |
|
---|
| 2228 | m68ki_write_16(ea, res);
|
---|
| 2229 |
|
---|
| 2230 | FLAG_N = NFLAG_16(res);
|
---|
| 2231 | FLAG_Z = res;
|
---|
| 2232 | FLAG_X = FLAG_C = src >> 7;
|
---|
| 2233 | src &= 0xc000;
|
---|
| 2234 | FLAG_V = (!(src == 0 || src == 0xc000))<<7;
|
---|
| 2235 | }
|
---|
| 2236 |
|
---|
| 2237 |
|
---|
| 2238 | M68KMAKE_OP(bcc, 8, ., .)
|
---|
| 2239 | {
|
---|
| 2240 | if(M68KMAKE_CC)
|
---|
| 2241 | {
|
---|
| 2242 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 2243 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
|
---|
| 2244 | return;
|
---|
| 2245 | }
|
---|
| 2246 | USE_CYCLES(CYC_BCC_NOTAKE_B);
|
---|
| 2247 | }
|
---|
| 2248 |
|
---|
| 2249 |
|
---|
| 2250 | M68KMAKE_OP(bcc, 16, ., .)
|
---|
| 2251 | {
|
---|
| 2252 | if(M68KMAKE_CC)
|
---|
| 2253 | {
|
---|
| 2254 | uint offset = OPER_I_16();
|
---|
| 2255 | REG_PC -= 2;
|
---|
| 2256 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 2257 | m68ki_branch_16(offset);
|
---|
| 2258 | return;
|
---|
| 2259 | }
|
---|
| 2260 | REG_PC += 2;
|
---|
| 2261 | USE_CYCLES(CYC_BCC_NOTAKE_W);
|
---|
| 2262 | }
|
---|
| 2263 |
|
---|
| 2264 |
|
---|
| 2265 | M68KMAKE_OP(bcc, 32, ., .)
|
---|
| 2266 | {
|
---|
| 2267 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 2268 | {
|
---|
| 2269 | if(M68KMAKE_CC)
|
---|
| 2270 | {
|
---|
| 2271 | uint offset = OPER_I_32();
|
---|
| 2272 | REG_PC -= 4;
|
---|
| 2273 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 2274 | m68ki_branch_32(offset);
|
---|
| 2275 | return;
|
---|
| 2276 | }
|
---|
| 2277 | REG_PC += 4;
|
---|
| 2278 | return;
|
---|
| 2279 | }
|
---|
| 2280 | m68ki_exception_illegal();
|
---|
| 2281 | }
|
---|
| 2282 |
|
---|
| 2283 |
|
---|
| 2284 | M68KMAKE_OP(bchg, 32, r, d)
|
---|
| 2285 | {
|
---|
| 2286 | uint* r_dst = &DY;
|
---|
| 2287 | uint mask = 1 << (DX & 0x1f);
|
---|
| 2288 |
|
---|
| 2289 | FLAG_Z = *r_dst & mask;
|
---|
| 2290 | *r_dst ^= mask;
|
---|
| 2291 | }
|
---|
| 2292 |
|
---|
| 2293 |
|
---|
| 2294 | M68KMAKE_OP(bchg, 8, r, .)
|
---|
| 2295 | {
|
---|
| 2296 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 2297 | uint src = m68ki_read_8(ea);
|
---|
| 2298 | uint mask = 1 << (DX & 7);
|
---|
| 2299 |
|
---|
| 2300 | FLAG_Z = src & mask;
|
---|
| 2301 | m68ki_write_8(ea, src ^ mask);
|
---|
| 2302 | }
|
---|
| 2303 |
|
---|
| 2304 |
|
---|
| 2305 | M68KMAKE_OP(bchg, 32, s, d)
|
---|
| 2306 | {
|
---|
| 2307 | uint* r_dst = &DY;
|
---|
| 2308 | uint mask = 1 << (OPER_I_8() & 0x1f);
|
---|
| 2309 |
|
---|
| 2310 | FLAG_Z = *r_dst & mask;
|
---|
| 2311 | *r_dst ^= mask;
|
---|
| 2312 | }
|
---|
| 2313 |
|
---|
| 2314 |
|
---|
| 2315 | M68KMAKE_OP(bchg, 8, s, .)
|
---|
| 2316 | {
|
---|
| 2317 | uint mask = 1 << (OPER_I_8() & 7);
|
---|
| 2318 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 2319 | uint src = m68ki_read_8(ea);
|
---|
| 2320 |
|
---|
| 2321 | FLAG_Z = src & mask;
|
---|
| 2322 | m68ki_write_8(ea, src ^ mask);
|
---|
| 2323 | }
|
---|
| 2324 |
|
---|
| 2325 |
|
---|
| 2326 | M68KMAKE_OP(bclr, 32, r, d)
|
---|
| 2327 | {
|
---|
| 2328 | uint* r_dst = &DY;
|
---|
| 2329 | uint mask = 1 << (DX & 0x1f);
|
---|
| 2330 |
|
---|
| 2331 | FLAG_Z = *r_dst & mask;
|
---|
| 2332 | *r_dst &= ~mask;
|
---|
| 2333 | }
|
---|
| 2334 |
|
---|
| 2335 |
|
---|
| 2336 | M68KMAKE_OP(bclr, 8, r, .)
|
---|
| 2337 | {
|
---|
| 2338 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 2339 | uint src = m68ki_read_8(ea);
|
---|
| 2340 | uint mask = 1 << (DX & 7);
|
---|
| 2341 |
|
---|
| 2342 | FLAG_Z = src & mask;
|
---|
| 2343 | m68ki_write_8(ea, src & ~mask);
|
---|
| 2344 | }
|
---|
| 2345 |
|
---|
| 2346 |
|
---|
| 2347 | M68KMAKE_OP(bclr, 32, s, d)
|
---|
| 2348 | {
|
---|
| 2349 | uint* r_dst = &DY;
|
---|
| 2350 | uint mask = 1 << (OPER_I_8() & 0x1f);
|
---|
| 2351 |
|
---|
| 2352 | FLAG_Z = *r_dst & mask;
|
---|
| 2353 | *r_dst &= ~mask;
|
---|
| 2354 | }
|
---|
| 2355 |
|
---|
| 2356 |
|
---|
| 2357 | M68KMAKE_OP(bclr, 8, s, .)
|
---|
| 2358 | {
|
---|
| 2359 | uint mask = 1 << (OPER_I_8() & 7);
|
---|
| 2360 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 2361 | uint src = m68ki_read_8(ea);
|
---|
| 2362 |
|
---|
| 2363 | FLAG_Z = src & mask;
|
---|
| 2364 | m68ki_write_8(ea, src & ~mask);
|
---|
| 2365 | }
|
---|
| 2366 |
|
---|
| 2367 |
|
---|
| 2368 | M68KMAKE_OP(bfchg, 32, ., d)
|
---|
| 2369 | {
|
---|
| 2370 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 2371 | {
|
---|
| 2372 | uint word2 = OPER_I_16();
|
---|
| 2373 | uint offset = (word2>>6)&31;
|
---|
| 2374 | uint width = word2;
|
---|
| 2375 | uint* data = &DY;
|
---|
| 2376 | uint64 mask;
|
---|
| 2377 |
|
---|
| 2378 |
|
---|
| 2379 | if(BIT_B(word2))
|
---|
| 2380 | offset = REG_D[offset&7];
|
---|
| 2381 | if(BIT_5(word2))
|
---|
| 2382 | width = REG_D[width&7];
|
---|
| 2383 |
|
---|
| 2384 | offset &= 31;
|
---|
| 2385 | width = ((width-1) & 31) + 1;
|
---|
| 2386 |
|
---|
| 2387 | mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
|
---|
| 2388 | mask = ROR_32(mask, offset);
|
---|
| 2389 |
|
---|
| 2390 | FLAG_N = NFLAG_32(*data<<offset);
|
---|
| 2391 | FLAG_Z = *data & mask;
|
---|
| 2392 | FLAG_V = VFLAG_CLEAR;
|
---|
| 2393 | FLAG_C = CFLAG_CLEAR;
|
---|
| 2394 |
|
---|
| 2395 | *data ^= mask;
|
---|
| 2396 |
|
---|
| 2397 | return;
|
---|
| 2398 | }
|
---|
| 2399 | m68ki_exception_illegal();
|
---|
| 2400 | }
|
---|
| 2401 |
|
---|
| 2402 |
|
---|
| 2403 | M68KMAKE_OP(bfchg, 32, ., .)
|
---|
| 2404 | {
|
---|
| 2405 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 2406 | {
|
---|
| 2407 | uint word2 = OPER_I_16();
|
---|
| 2408 | sint offset = (word2>>6)&31;
|
---|
| 2409 | uint width = word2;
|
---|
| 2410 | uint mask_base;
|
---|
| 2411 | uint data_long;
|
---|
| 2412 | uint mask_long;
|
---|
| 2413 | uint data_byte = 0;
|
---|
| 2414 | uint mask_byte = 0;
|
---|
| 2415 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 2416 |
|
---|
| 2417 |
|
---|
| 2418 | if(BIT_B(word2))
|
---|
| 2419 | offset = MAKE_INT_32(REG_D[offset&7]);
|
---|
| 2420 | if(BIT_5(word2))
|
---|
| 2421 | width = REG_D[width&7];
|
---|
| 2422 |
|
---|
| 2423 | /* Offset is signed so we have to use ugly math =( */
|
---|
| 2424 | ea += offset / 8;
|
---|
| 2425 | offset %= 8;
|
---|
| 2426 | if(offset < 0)
|
---|
| 2427 | {
|
---|
| 2428 | offset += 8;
|
---|
| 2429 | ea--;
|
---|
| 2430 | }
|
---|
| 2431 | width = ((width-1) & 31) + 1;
|
---|
| 2432 |
|
---|
| 2433 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
|
---|
| 2434 | mask_long = mask_base >> offset;
|
---|
| 2435 |
|
---|
| 2436 | data_long = m68ki_read_32(ea);
|
---|
| 2437 | FLAG_N = NFLAG_32(data_long << offset);
|
---|
| 2438 | FLAG_Z = data_long & mask_long;
|
---|
| 2439 | FLAG_V = VFLAG_CLEAR;
|
---|
| 2440 | FLAG_C = CFLAG_CLEAR;
|
---|
| 2441 |
|
---|
| 2442 | m68ki_write_32(ea, data_long ^ mask_long);
|
---|
| 2443 |
|
---|
| 2444 | if((width + offset) > 32)
|
---|
| 2445 | {
|
---|
| 2446 | mask_byte = MASK_OUT_ABOVE_8(mask_base);
|
---|
| 2447 | data_byte = m68ki_read_8(ea+4);
|
---|
| 2448 | FLAG_Z |= (data_byte & mask_byte);
|
---|
| 2449 | m68ki_write_8(ea+4, data_byte ^ mask_byte);
|
---|
| 2450 | }
|
---|
| 2451 | return;
|
---|
| 2452 | }
|
---|
| 2453 | m68ki_exception_illegal();
|
---|
| 2454 | }
|
---|
| 2455 |
|
---|
| 2456 |
|
---|
| 2457 | M68KMAKE_OP(bfclr, 32, ., d)
|
---|
| 2458 | {
|
---|
| 2459 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 2460 | {
|
---|
| 2461 | uint word2 = OPER_I_16();
|
---|
| 2462 | uint offset = (word2>>6)&31;
|
---|
| 2463 | uint width = word2;
|
---|
| 2464 | uint* data = &DY;
|
---|
| 2465 | uint64 mask;
|
---|
| 2466 |
|
---|
| 2467 |
|
---|
| 2468 | if(BIT_B(word2))
|
---|
| 2469 | offset = REG_D[offset&7];
|
---|
| 2470 | if(BIT_5(word2))
|
---|
| 2471 | width = REG_D[width&7];
|
---|
| 2472 |
|
---|
| 2473 |
|
---|
| 2474 | offset &= 31;
|
---|
| 2475 | width = ((width-1) & 31) + 1;
|
---|
| 2476 |
|
---|
| 2477 |
|
---|
| 2478 | mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
|
---|
| 2479 | mask = ROR_32(mask, offset);
|
---|
| 2480 |
|
---|
| 2481 | FLAG_N = NFLAG_32(*data<<offset);
|
---|
| 2482 | FLAG_Z = *data & mask;
|
---|
| 2483 | FLAG_V = VFLAG_CLEAR;
|
---|
| 2484 | FLAG_C = CFLAG_CLEAR;
|
---|
| 2485 |
|
---|
| 2486 | *data &= ~mask;
|
---|
| 2487 |
|
---|
| 2488 | return;
|
---|
| 2489 | }
|
---|
| 2490 | m68ki_exception_illegal();
|
---|
| 2491 | }
|
---|
| 2492 |
|
---|
| 2493 |
|
---|
| 2494 | M68KMAKE_OP(bfclr, 32, ., .)
|
---|
| 2495 | {
|
---|
| 2496 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 2497 | {
|
---|
| 2498 | uint word2 = OPER_I_16();
|
---|
| 2499 | sint offset = (word2>>6)&31;
|
---|
| 2500 | uint width = word2;
|
---|
| 2501 | uint mask_base;
|
---|
| 2502 | uint data_long;
|
---|
| 2503 | uint mask_long;
|
---|
| 2504 | uint data_byte = 0;
|
---|
| 2505 | uint mask_byte = 0;
|
---|
| 2506 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 2507 |
|
---|
| 2508 |
|
---|
| 2509 | if(BIT_B(word2))
|
---|
| 2510 | offset = MAKE_INT_32(REG_D[offset&7]);
|
---|
| 2511 | if(BIT_5(word2))
|
---|
| 2512 | width = REG_D[width&7];
|
---|
| 2513 |
|
---|
| 2514 | /* Offset is signed so we have to use ugly math =( */
|
---|
| 2515 | ea += offset / 8;
|
---|
| 2516 | offset %= 8;
|
---|
| 2517 | if(offset < 0)
|
---|
| 2518 | {
|
---|
| 2519 | offset += 8;
|
---|
| 2520 | ea--;
|
---|
| 2521 | }
|
---|
| 2522 | width = ((width-1) & 31) + 1;
|
---|
| 2523 |
|
---|
| 2524 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
|
---|
| 2525 | mask_long = mask_base >> offset;
|
---|
| 2526 |
|
---|
| 2527 | data_long = m68ki_read_32(ea);
|
---|
| 2528 | FLAG_N = NFLAG_32(data_long << offset);
|
---|
| 2529 | FLAG_Z = data_long & mask_long;
|
---|
| 2530 | FLAG_V = VFLAG_CLEAR;
|
---|
| 2531 | FLAG_C = CFLAG_CLEAR;
|
---|
| 2532 |
|
---|
| 2533 | m68ki_write_32(ea, data_long & ~mask_long);
|
---|
| 2534 |
|
---|
| 2535 | if((width + offset) > 32)
|
---|
| 2536 | {
|
---|
| 2537 | mask_byte = MASK_OUT_ABOVE_8(mask_base);
|
---|
| 2538 | data_byte = m68ki_read_8(ea+4);
|
---|
| 2539 | FLAG_Z |= (data_byte & mask_byte);
|
---|
| 2540 | m68ki_write_8(ea+4, data_byte & ~mask_byte);
|
---|
| 2541 | }
|
---|
| 2542 | return;
|
---|
| 2543 | }
|
---|
| 2544 | m68ki_exception_illegal();
|
---|
| 2545 | }
|
---|
| 2546 |
|
---|
| 2547 |
|
---|
| 2548 | M68KMAKE_OP(bfexts, 32, ., d)
|
---|
| 2549 | {
|
---|
| 2550 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 2551 | {
|
---|
| 2552 | uint word2 = OPER_I_16();
|
---|
| 2553 | uint offset = (word2>>6)&31;
|
---|
| 2554 | uint width = word2;
|
---|
| 2555 | uint64 data = DY;
|
---|
| 2556 |
|
---|
| 2557 |
|
---|
| 2558 | if(BIT_B(word2))
|
---|
| 2559 | offset = REG_D[offset&7];
|
---|
| 2560 | if(BIT_5(word2))
|
---|
| 2561 | width = REG_D[width&7];
|
---|
| 2562 |
|
---|
| 2563 | offset &= 31;
|
---|
| 2564 | width = ((width-1) & 31) + 1;
|
---|
| 2565 |
|
---|
| 2566 | data = ROL_32(data, offset);
|
---|
| 2567 | FLAG_N = NFLAG_32(data);
|
---|
| 2568 | data = MAKE_INT_32(data) >> (32 - width);
|
---|
| 2569 |
|
---|
| 2570 | FLAG_Z = data;
|
---|
| 2571 | FLAG_V = VFLAG_CLEAR;
|
---|
| 2572 | FLAG_C = CFLAG_CLEAR;
|
---|
| 2573 |
|
---|
| 2574 | REG_D[(word2>>12)&7] = data;
|
---|
| 2575 |
|
---|
| 2576 | return;
|
---|
| 2577 | }
|
---|
| 2578 | m68ki_exception_illegal();
|
---|
| 2579 | }
|
---|
| 2580 |
|
---|
| 2581 |
|
---|
| 2582 | M68KMAKE_OP(bfexts, 32, ., .)
|
---|
| 2583 | {
|
---|
| 2584 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 2585 | {
|
---|
| 2586 | uint word2 = OPER_I_16();
|
---|
| 2587 | sint offset = (word2>>6)&31;
|
---|
| 2588 | uint width = word2;
|
---|
| 2589 | uint data;
|
---|
| 2590 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 2591 |
|
---|
| 2592 |
|
---|
| 2593 | if(BIT_B(word2))
|
---|
| 2594 | offset = MAKE_INT_32(REG_D[offset&7]);
|
---|
| 2595 | if(BIT_5(word2))
|
---|
| 2596 | width = REG_D[width&7];
|
---|
| 2597 |
|
---|
| 2598 | /* Offset is signed so we have to use ugly math =( */
|
---|
| 2599 | ea += offset / 8;
|
---|
| 2600 | offset %= 8;
|
---|
| 2601 | if(offset < 0)
|
---|
| 2602 | {
|
---|
| 2603 | offset += 8;
|
---|
| 2604 | ea--;
|
---|
| 2605 | }
|
---|
| 2606 | width = ((width-1) & 31) + 1;
|
---|
| 2607 |
|
---|
| 2608 | data = m68ki_read_32(ea);
|
---|
| 2609 |
|
---|
| 2610 | data = MASK_OUT_ABOVE_32(data<<offset);
|
---|
| 2611 |
|
---|
| 2612 | if((offset+width) > 32)
|
---|
| 2613 | data |= (m68ki_read_8(ea+4) << offset) >> 8;
|
---|
| 2614 |
|
---|
| 2615 | FLAG_N = NFLAG_32(data);
|
---|
| 2616 | data = MAKE_INT_32(data) >> (32 - width);
|
---|
| 2617 |
|
---|
| 2618 | FLAG_Z = data;
|
---|
| 2619 | FLAG_V = VFLAG_CLEAR;
|
---|
| 2620 | FLAG_C = CFLAG_CLEAR;
|
---|
| 2621 |
|
---|
| 2622 | REG_D[(word2 >> 12) & 7] = data;
|
---|
| 2623 |
|
---|
| 2624 | return;
|
---|
| 2625 | }
|
---|
| 2626 | m68ki_exception_illegal();
|
---|
| 2627 | }
|
---|
| 2628 |
|
---|
| 2629 |
|
---|
| 2630 | M68KMAKE_OP(bfextu, 32, ., d)
|
---|
| 2631 | {
|
---|
| 2632 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 2633 | {
|
---|
| 2634 | uint word2 = OPER_I_16();
|
---|
| 2635 | uint offset = (word2>>6)&31;
|
---|
| 2636 | uint width = word2;
|
---|
| 2637 | uint64 data = DY;
|
---|
| 2638 |
|
---|
| 2639 |
|
---|
| 2640 | if(BIT_B(word2))
|
---|
| 2641 | offset = REG_D[offset&7];
|
---|
| 2642 | if(BIT_5(word2))
|
---|
| 2643 | width = REG_D[width&7];
|
---|
| 2644 |
|
---|
| 2645 | offset &= 31;
|
---|
| 2646 | width = ((width-1) & 31) + 1;
|
---|
| 2647 |
|
---|
| 2648 | data = ROL_32(data, offset);
|
---|
| 2649 | FLAG_N = NFLAG_32(data);
|
---|
| 2650 | data >>= 32 - width;
|
---|
| 2651 |
|
---|
| 2652 | FLAG_Z = data;
|
---|
| 2653 | FLAG_V = VFLAG_CLEAR;
|
---|
| 2654 | FLAG_C = CFLAG_CLEAR;
|
---|
| 2655 |
|
---|
| 2656 | REG_D[(word2>>12)&7] = data;
|
---|
| 2657 |
|
---|
| 2658 | return;
|
---|
| 2659 | }
|
---|
| 2660 | m68ki_exception_illegal();
|
---|
| 2661 | }
|
---|
| 2662 |
|
---|
| 2663 |
|
---|
| 2664 | M68KMAKE_OP(bfextu, 32, ., .)
|
---|
| 2665 | {
|
---|
| 2666 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 2667 | {
|
---|
| 2668 | uint word2 = OPER_I_16();
|
---|
| 2669 | sint offset = (word2>>6)&31;
|
---|
| 2670 | uint width = word2;
|
---|
| 2671 | uint data;
|
---|
| 2672 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 2673 |
|
---|
| 2674 |
|
---|
| 2675 | if(BIT_B(word2))
|
---|
| 2676 | offset = MAKE_INT_32(REG_D[offset&7]);
|
---|
| 2677 | if(BIT_5(word2))
|
---|
| 2678 | width = REG_D[width&7];
|
---|
| 2679 |
|
---|
| 2680 | /* Offset is signed so we have to use ugly math =( */
|
---|
| 2681 | ea += offset / 8;
|
---|
| 2682 | offset %= 8;
|
---|
| 2683 | if(offset < 0)
|
---|
| 2684 | {
|
---|
| 2685 | offset += 8;
|
---|
| 2686 | ea--;
|
---|
| 2687 | }
|
---|
| 2688 | width = ((width-1) & 31) + 1;
|
---|
| 2689 |
|
---|
| 2690 | data = m68ki_read_32(ea);
|
---|
| 2691 | data = MASK_OUT_ABOVE_32(data<<offset);
|
---|
| 2692 |
|
---|
| 2693 | if((offset+width) > 32)
|
---|
| 2694 | data |= (m68ki_read_8(ea+4) << offset) >> 8;
|
---|
| 2695 |
|
---|
| 2696 | FLAG_N = NFLAG_32(data);
|
---|
| 2697 | data >>= (32 - width);
|
---|
| 2698 |
|
---|
| 2699 | FLAG_Z = data;
|
---|
| 2700 | FLAG_V = VFLAG_CLEAR;
|
---|
| 2701 | FLAG_C = CFLAG_CLEAR;
|
---|
| 2702 |
|
---|
| 2703 | REG_D[(word2 >> 12) & 7] = data;
|
---|
| 2704 |
|
---|
| 2705 | return;
|
---|
| 2706 | }
|
---|
| 2707 | m68ki_exception_illegal();
|
---|
| 2708 | }
|
---|
| 2709 |
|
---|
| 2710 |
|
---|
| 2711 | M68KMAKE_OP(bfffo, 32, ., d)
|
---|
| 2712 | {
|
---|
| 2713 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 2714 | {
|
---|
| 2715 | uint word2 = OPER_I_16();
|
---|
| 2716 | uint offset = (word2>>6)&31;
|
---|
| 2717 | uint width = word2;
|
---|
| 2718 | uint64 data = DY;
|
---|
| 2719 | uint bit;
|
---|
| 2720 |
|
---|
| 2721 |
|
---|
| 2722 | if(BIT_B(word2))
|
---|
| 2723 | offset = REG_D[offset&7];
|
---|
| 2724 | if(BIT_5(word2))
|
---|
| 2725 | width = REG_D[width&7];
|
---|
| 2726 |
|
---|
| 2727 | offset &= 31;
|
---|
| 2728 | width = ((width-1) & 31) + 1;
|
---|
| 2729 |
|
---|
| 2730 | data = ROL_32(data, offset);
|
---|
| 2731 | FLAG_N = NFLAG_32(data);
|
---|
| 2732 | data >>= 32 - width;
|
---|
| 2733 |
|
---|
| 2734 | FLAG_Z = data;
|
---|
| 2735 | FLAG_V = VFLAG_CLEAR;
|
---|
| 2736 | FLAG_C = CFLAG_CLEAR;
|
---|
| 2737 |
|
---|
| 2738 | for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1)
|
---|
| 2739 | offset++;
|
---|
| 2740 |
|
---|
| 2741 | REG_D[(word2>>12)&7] = offset;
|
---|
| 2742 |
|
---|
| 2743 | return;
|
---|
| 2744 | }
|
---|
| 2745 | m68ki_exception_illegal();
|
---|
| 2746 | }
|
---|
| 2747 |
|
---|
| 2748 |
|
---|
| 2749 | M68KMAKE_OP(bfffo, 32, ., .)
|
---|
| 2750 | {
|
---|
| 2751 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 2752 | {
|
---|
| 2753 | uint word2 = OPER_I_16();
|
---|
| 2754 | sint offset = (word2>>6)&31;
|
---|
| 2755 | sint local_offset;
|
---|
| 2756 | uint width = word2;
|
---|
| 2757 | uint data;
|
---|
| 2758 | uint bit;
|
---|
| 2759 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 2760 |
|
---|
| 2761 |
|
---|
| 2762 | if(BIT_B(word2))
|
---|
| 2763 | offset = MAKE_INT_32(REG_D[offset&7]);
|
---|
| 2764 | if(BIT_5(word2))
|
---|
| 2765 | width = REG_D[width&7];
|
---|
| 2766 |
|
---|
| 2767 | /* Offset is signed so we have to use ugly math =( */
|
---|
| 2768 | ea += offset / 8;
|
---|
| 2769 | local_offset = offset % 8;
|
---|
| 2770 | if(local_offset < 0)
|
---|
| 2771 | {
|
---|
| 2772 | local_offset += 8;
|
---|
| 2773 | ea--;
|
---|
| 2774 | }
|
---|
| 2775 | width = ((width-1) & 31) + 1;
|
---|
| 2776 |
|
---|
| 2777 | data = m68ki_read_32(ea);
|
---|
| 2778 | data = MASK_OUT_ABOVE_32(data<<local_offset);
|
---|
| 2779 |
|
---|
| 2780 | if((local_offset+width) > 32)
|
---|
| 2781 | data |= (m68ki_read_8(ea+4) << local_offset) >> 8;
|
---|
| 2782 |
|
---|
| 2783 | FLAG_N = NFLAG_32(data);
|
---|
| 2784 | data >>= (32 - width);
|
---|
| 2785 |
|
---|
| 2786 | FLAG_Z = data;
|
---|
| 2787 | FLAG_V = VFLAG_CLEAR;
|
---|
| 2788 | FLAG_C = CFLAG_CLEAR;
|
---|
| 2789 |
|
---|
| 2790 | for(bit = 1<<(width-1);bit && !(data & bit);bit>>= 1)
|
---|
| 2791 | offset++;
|
---|
| 2792 |
|
---|
| 2793 | REG_D[(word2>>12)&7] = offset;
|
---|
| 2794 |
|
---|
| 2795 | return;
|
---|
| 2796 | }
|
---|
| 2797 | m68ki_exception_illegal();
|
---|
| 2798 | }
|
---|
| 2799 |
|
---|
| 2800 |
|
---|
| 2801 | M68KMAKE_OP(bfins, 32, ., d)
|
---|
| 2802 | {
|
---|
| 2803 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 2804 | {
|
---|
| 2805 | uint word2 = OPER_I_16();
|
---|
| 2806 | uint offset = (word2>>6)&31;
|
---|
| 2807 | uint width = word2;
|
---|
| 2808 | uint* data = &DY;
|
---|
| 2809 | uint64 mask;
|
---|
| 2810 | uint64 insert = REG_D[(word2>>12)&7];
|
---|
| 2811 |
|
---|
| 2812 |
|
---|
| 2813 | if(BIT_B(word2))
|
---|
| 2814 | offset = REG_D[offset&7];
|
---|
| 2815 | if(BIT_5(word2))
|
---|
| 2816 | width = REG_D[width&7];
|
---|
| 2817 |
|
---|
| 2818 |
|
---|
| 2819 | offset &= 31;
|
---|
| 2820 | width = ((width-1) & 31) + 1;
|
---|
| 2821 |
|
---|
| 2822 |
|
---|
| 2823 | mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
|
---|
| 2824 | mask = ROR_32(mask, offset);
|
---|
| 2825 |
|
---|
| 2826 | insert = MASK_OUT_ABOVE_32(insert << (32 - width));
|
---|
| 2827 | FLAG_N = NFLAG_32(insert);
|
---|
| 2828 | FLAG_Z = insert;
|
---|
| 2829 | insert = ROR_32(insert, offset);
|
---|
| 2830 |
|
---|
| 2831 | FLAG_V = VFLAG_CLEAR;
|
---|
| 2832 | FLAG_C = CFLAG_CLEAR;
|
---|
| 2833 |
|
---|
| 2834 | *data &= ~mask;
|
---|
| 2835 | *data |= insert;
|
---|
| 2836 |
|
---|
| 2837 | return;
|
---|
| 2838 | }
|
---|
| 2839 | m68ki_exception_illegal();
|
---|
| 2840 | }
|
---|
| 2841 |
|
---|
| 2842 |
|
---|
| 2843 | M68KMAKE_OP(bfins, 32, ., .)
|
---|
| 2844 | {
|
---|
| 2845 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 2846 | {
|
---|
| 2847 | uint word2 = OPER_I_16();
|
---|
| 2848 | sint offset = (word2>>6)&31;
|
---|
| 2849 | uint width = word2;
|
---|
| 2850 | uint insert_base = REG_D[(word2>>12)&7];
|
---|
| 2851 | uint insert_long;
|
---|
| 2852 | uint insert_byte;
|
---|
| 2853 | uint mask_base;
|
---|
| 2854 | uint data_long;
|
---|
| 2855 | uint mask_long;
|
---|
| 2856 | uint data_byte = 0;
|
---|
| 2857 | uint mask_byte = 0;
|
---|
| 2858 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 2859 |
|
---|
| 2860 |
|
---|
| 2861 | if(BIT_B(word2))
|
---|
| 2862 | offset = MAKE_INT_32(REG_D[offset&7]);
|
---|
| 2863 | if(BIT_5(word2))
|
---|
| 2864 | width = REG_D[width&7];
|
---|
| 2865 |
|
---|
| 2866 | /* Offset is signed so we have to use ugly math =( */
|
---|
| 2867 | ea += offset / 8;
|
---|
| 2868 | offset %= 8;
|
---|
| 2869 | if(offset < 0)
|
---|
| 2870 | {
|
---|
| 2871 | offset += 8;
|
---|
| 2872 | ea--;
|
---|
| 2873 | }
|
---|
| 2874 | width = ((width-1) & 31) + 1;
|
---|
| 2875 |
|
---|
| 2876 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
|
---|
| 2877 | mask_long = mask_base >> offset;
|
---|
| 2878 |
|
---|
| 2879 | insert_base = MASK_OUT_ABOVE_32(insert_base << (32 - width));
|
---|
| 2880 | FLAG_N = NFLAG_32(insert_base);
|
---|
| 2881 | FLAG_Z = insert_base;
|
---|
| 2882 | insert_long = insert_base >> offset;
|
---|
| 2883 |
|
---|
| 2884 | data_long = m68ki_read_32(ea);
|
---|
| 2885 | FLAG_V = VFLAG_CLEAR;
|
---|
| 2886 | FLAG_C = CFLAG_CLEAR;
|
---|
| 2887 |
|
---|
| 2888 | m68ki_write_32(ea, (data_long & ~mask_long) | insert_long);
|
---|
| 2889 |
|
---|
| 2890 | if((width + offset) > 32)
|
---|
| 2891 | {
|
---|
| 2892 | mask_byte = MASK_OUT_ABOVE_8(mask_base);
|
---|
| 2893 | insert_byte = MASK_OUT_ABOVE_8(insert_base);
|
---|
| 2894 | data_byte = m68ki_read_8(ea+4);
|
---|
| 2895 | FLAG_Z |= (data_byte & mask_byte);
|
---|
| 2896 | m68ki_write_8(ea+4, (data_byte & ~mask_byte) | insert_byte);
|
---|
| 2897 | }
|
---|
| 2898 | return;
|
---|
| 2899 | }
|
---|
| 2900 | m68ki_exception_illegal();
|
---|
| 2901 | }
|
---|
| 2902 |
|
---|
| 2903 |
|
---|
| 2904 | M68KMAKE_OP(bfset, 32, ., d)
|
---|
| 2905 | {
|
---|
| 2906 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 2907 | {
|
---|
| 2908 | uint word2 = OPER_I_16();
|
---|
| 2909 | uint offset = (word2>>6)&31;
|
---|
| 2910 | uint width = word2;
|
---|
| 2911 | uint* data = &DY;
|
---|
| 2912 | uint64 mask;
|
---|
| 2913 |
|
---|
| 2914 |
|
---|
| 2915 | if(BIT_B(word2))
|
---|
| 2916 | offset = REG_D[offset&7];
|
---|
| 2917 | if(BIT_5(word2))
|
---|
| 2918 | width = REG_D[width&7];
|
---|
| 2919 |
|
---|
| 2920 |
|
---|
| 2921 | offset &= 31;
|
---|
| 2922 | width = ((width-1) & 31) + 1;
|
---|
| 2923 |
|
---|
| 2924 |
|
---|
| 2925 | mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
|
---|
| 2926 | mask = ROR_32(mask, offset);
|
---|
| 2927 |
|
---|
| 2928 | FLAG_N = NFLAG_32(*data<<offset);
|
---|
| 2929 | FLAG_Z = *data & mask;
|
---|
| 2930 | FLAG_V = VFLAG_CLEAR;
|
---|
| 2931 | FLAG_C = CFLAG_CLEAR;
|
---|
| 2932 |
|
---|
| 2933 | *data |= mask;
|
---|
| 2934 |
|
---|
| 2935 | return;
|
---|
| 2936 | }
|
---|
| 2937 | m68ki_exception_illegal();
|
---|
| 2938 | }
|
---|
| 2939 |
|
---|
| 2940 |
|
---|
| 2941 | M68KMAKE_OP(bfset, 32, ., .)
|
---|
| 2942 | {
|
---|
| 2943 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 2944 | {
|
---|
| 2945 | uint word2 = OPER_I_16();
|
---|
| 2946 | sint offset = (word2>>6)&31;
|
---|
| 2947 | uint width = word2;
|
---|
| 2948 | uint mask_base;
|
---|
| 2949 | uint data_long;
|
---|
| 2950 | uint mask_long;
|
---|
| 2951 | uint data_byte = 0;
|
---|
| 2952 | uint mask_byte = 0;
|
---|
| 2953 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 2954 |
|
---|
| 2955 |
|
---|
| 2956 | if(BIT_B(word2))
|
---|
| 2957 | offset = MAKE_INT_32(REG_D[offset&7]);
|
---|
| 2958 | if(BIT_5(word2))
|
---|
| 2959 | width = REG_D[width&7];
|
---|
| 2960 |
|
---|
| 2961 | /* Offset is signed so we have to use ugly math =( */
|
---|
| 2962 | ea += offset / 8;
|
---|
| 2963 | offset %= 8;
|
---|
| 2964 | if(offset < 0)
|
---|
| 2965 | {
|
---|
| 2966 | offset += 8;
|
---|
| 2967 | ea--;
|
---|
| 2968 | }
|
---|
| 2969 | width = ((width-1) & 31) + 1;
|
---|
| 2970 |
|
---|
| 2971 |
|
---|
| 2972 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
|
---|
| 2973 | mask_long = mask_base >> offset;
|
---|
| 2974 |
|
---|
| 2975 | data_long = m68ki_read_32(ea);
|
---|
| 2976 | FLAG_N = NFLAG_32(data_long << offset);
|
---|
| 2977 | FLAG_Z = data_long & mask_long;
|
---|
| 2978 | FLAG_V = VFLAG_CLEAR;
|
---|
| 2979 | FLAG_C = CFLAG_CLEAR;
|
---|
| 2980 |
|
---|
| 2981 | m68ki_write_32(ea, data_long | mask_long);
|
---|
| 2982 |
|
---|
| 2983 | if((width + offset) > 32)
|
---|
| 2984 | {
|
---|
| 2985 | mask_byte = MASK_OUT_ABOVE_8(mask_base);
|
---|
| 2986 | data_byte = m68ki_read_8(ea+4);
|
---|
| 2987 | FLAG_Z |= (data_byte & mask_byte);
|
---|
| 2988 | m68ki_write_8(ea+4, data_byte | mask_byte);
|
---|
| 2989 | }
|
---|
| 2990 | return;
|
---|
| 2991 | }
|
---|
| 2992 | m68ki_exception_illegal();
|
---|
| 2993 | }
|
---|
| 2994 |
|
---|
| 2995 |
|
---|
| 2996 | M68KMAKE_OP(bftst, 32, ., d)
|
---|
| 2997 | {
|
---|
| 2998 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 2999 | {
|
---|
| 3000 | uint word2 = OPER_I_16();
|
---|
| 3001 | uint offset = (word2>>6)&31;
|
---|
| 3002 | uint width = word2;
|
---|
| 3003 | uint* data = &DY;
|
---|
| 3004 | uint64 mask;
|
---|
| 3005 |
|
---|
| 3006 |
|
---|
| 3007 | if(BIT_B(word2))
|
---|
| 3008 | offset = REG_D[offset&7];
|
---|
| 3009 | if(BIT_5(word2))
|
---|
| 3010 | width = REG_D[width&7];
|
---|
| 3011 |
|
---|
| 3012 |
|
---|
| 3013 | offset &= 31;
|
---|
| 3014 | width = ((width-1) & 31) + 1;
|
---|
| 3015 |
|
---|
| 3016 |
|
---|
| 3017 | mask = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
|
---|
| 3018 | mask = ROR_32(mask, offset);
|
---|
| 3019 |
|
---|
| 3020 | FLAG_N = NFLAG_32(*data<<offset);
|
---|
| 3021 | FLAG_Z = *data & mask;
|
---|
| 3022 | FLAG_V = VFLAG_CLEAR;
|
---|
| 3023 | FLAG_C = CFLAG_CLEAR;
|
---|
| 3024 |
|
---|
| 3025 | return;
|
---|
| 3026 | }
|
---|
| 3027 | m68ki_exception_illegal();
|
---|
| 3028 | }
|
---|
| 3029 |
|
---|
| 3030 |
|
---|
| 3031 | M68KMAKE_OP(bftst, 32, ., .)
|
---|
| 3032 | {
|
---|
| 3033 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 3034 | {
|
---|
| 3035 | uint word2 = OPER_I_16();
|
---|
| 3036 | sint offset = (word2>>6)&31;
|
---|
| 3037 | uint width = word2;
|
---|
| 3038 | uint mask_base;
|
---|
| 3039 | uint data_long;
|
---|
| 3040 | uint mask_long;
|
---|
| 3041 | uint data_byte = 0;
|
---|
| 3042 | uint mask_byte = 0;
|
---|
| 3043 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 3044 |
|
---|
| 3045 | if(BIT_B(word2))
|
---|
| 3046 | offset = MAKE_INT_32(REG_D[offset&7]);
|
---|
| 3047 | if(BIT_5(word2))
|
---|
| 3048 | width = REG_D[width&7];
|
---|
| 3049 |
|
---|
| 3050 | /* Offset is signed so we have to use ugly math =( */
|
---|
| 3051 | ea += offset / 8;
|
---|
| 3052 | offset %= 8;
|
---|
| 3053 | if(offset < 0)
|
---|
| 3054 | {
|
---|
| 3055 | offset += 8;
|
---|
| 3056 | ea--;
|
---|
| 3057 | }
|
---|
| 3058 | width = ((width-1) & 31) + 1;
|
---|
| 3059 |
|
---|
| 3060 |
|
---|
| 3061 | mask_base = MASK_OUT_ABOVE_32(0xffffffff << (32 - width));
|
---|
| 3062 | mask_long = mask_base >> offset;
|
---|
| 3063 |
|
---|
| 3064 | data_long = m68ki_read_32(ea);
|
---|
| 3065 | FLAG_N = ((data_long & (0x80000000 >> offset))<<offset)>>24;
|
---|
| 3066 | FLAG_Z = data_long & mask_long;
|
---|
| 3067 | FLAG_V = VFLAG_CLEAR;
|
---|
| 3068 | FLAG_C = CFLAG_CLEAR;
|
---|
| 3069 |
|
---|
| 3070 | if((width + offset) > 32)
|
---|
| 3071 | {
|
---|
| 3072 | mask_byte = MASK_OUT_ABOVE_8(mask_base);
|
---|
| 3073 | data_byte = m68ki_read_8(ea+4);
|
---|
| 3074 | FLAG_Z |= (data_byte & mask_byte);
|
---|
| 3075 | }
|
---|
| 3076 | return;
|
---|
| 3077 | }
|
---|
| 3078 | m68ki_exception_illegal();
|
---|
| 3079 | }
|
---|
| 3080 |
|
---|
| 3081 |
|
---|
| 3082 | M68KMAKE_OP(bkpt, 0, ., .)
|
---|
| 3083 | {
|
---|
| 3084 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
|
---|
| 3085 | {
|
---|
| 3086 | m68ki_bkpt_ack(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE) ? REG_IR & 7 : 0); /* auto-disable (see m68kcpu.h) */
|
---|
| 3087 | }
|
---|
| 3088 | m68ki_exception_illegal();
|
---|
| 3089 | }
|
---|
| 3090 |
|
---|
| 3091 |
|
---|
| 3092 | M68KMAKE_OP(bra, 8, ., .)
|
---|
| 3093 | {
|
---|
| 3094 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 3095 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
|
---|
| 3096 | if(REG_PC == REG_PPC)
|
---|
| 3097 | USE_ALL_CYCLES();
|
---|
| 3098 | }
|
---|
| 3099 |
|
---|
| 3100 |
|
---|
| 3101 | M68KMAKE_OP(bra, 16, ., .)
|
---|
| 3102 | {
|
---|
| 3103 | uint offset = OPER_I_16();
|
---|
| 3104 | REG_PC -= 2;
|
---|
| 3105 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 3106 | m68ki_branch_16(offset);
|
---|
| 3107 | if(REG_PC == REG_PPC)
|
---|
| 3108 | USE_ALL_CYCLES();
|
---|
| 3109 | }
|
---|
| 3110 |
|
---|
| 3111 |
|
---|
| 3112 | M68KMAKE_OP(bra, 32, ., .)
|
---|
| 3113 | {
|
---|
| 3114 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 3115 | {
|
---|
| 3116 | uint offset = OPER_I_32();
|
---|
| 3117 | REG_PC -= 4;
|
---|
| 3118 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 3119 | m68ki_branch_32(offset);
|
---|
| 3120 | if(REG_PC == REG_PPC)
|
---|
| 3121 | USE_ALL_CYCLES();
|
---|
| 3122 | return;
|
---|
| 3123 | }
|
---|
| 3124 | m68ki_exception_illegal();
|
---|
| 3125 | }
|
---|
| 3126 |
|
---|
| 3127 |
|
---|
| 3128 | M68KMAKE_OP(bset, 32, r, d)
|
---|
| 3129 | {
|
---|
| 3130 | uint* r_dst = &DY;
|
---|
| 3131 | uint mask = 1 << (DX & 0x1f);
|
---|
| 3132 |
|
---|
| 3133 | FLAG_Z = *r_dst & mask;
|
---|
| 3134 | *r_dst |= mask;
|
---|
| 3135 | }
|
---|
| 3136 |
|
---|
| 3137 |
|
---|
| 3138 | M68KMAKE_OP(bset, 8, r, .)
|
---|
| 3139 | {
|
---|
| 3140 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 3141 | uint src = m68ki_read_8(ea);
|
---|
| 3142 | uint mask = 1 << (DX & 7);
|
---|
| 3143 |
|
---|
| 3144 | FLAG_Z = src & mask;
|
---|
| 3145 | m68ki_write_8(ea, src | mask);
|
---|
| 3146 | }
|
---|
| 3147 |
|
---|
| 3148 |
|
---|
| 3149 | M68KMAKE_OP(bset, 32, s, d)
|
---|
| 3150 | {
|
---|
| 3151 | uint* r_dst = &DY;
|
---|
| 3152 | uint mask = 1 << (OPER_I_8() & 0x1f);
|
---|
| 3153 |
|
---|
| 3154 | FLAG_Z = *r_dst & mask;
|
---|
| 3155 | *r_dst |= mask;
|
---|
| 3156 | }
|
---|
| 3157 |
|
---|
| 3158 |
|
---|
| 3159 | M68KMAKE_OP(bset, 8, s, .)
|
---|
| 3160 | {
|
---|
| 3161 | uint mask = 1 << (OPER_I_8() & 7);
|
---|
| 3162 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 3163 | uint src = m68ki_read_8(ea);
|
---|
| 3164 |
|
---|
| 3165 | FLAG_Z = src & mask;
|
---|
| 3166 | m68ki_write_8(ea, src | mask);
|
---|
| 3167 | }
|
---|
| 3168 |
|
---|
| 3169 |
|
---|
| 3170 | M68KMAKE_OP(bsr, 8, ., .)
|
---|
| 3171 | {
|
---|
| 3172 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 3173 | m68ki_push_32(REG_PC);
|
---|
| 3174 | m68ki_branch_8(MASK_OUT_ABOVE_8(REG_IR));
|
---|
| 3175 | }
|
---|
| 3176 |
|
---|
| 3177 |
|
---|
| 3178 | M68KMAKE_OP(bsr, 16, ., .)
|
---|
| 3179 | {
|
---|
| 3180 | uint offset = OPER_I_16();
|
---|
| 3181 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 3182 | m68ki_push_32(REG_PC);
|
---|
| 3183 | REG_PC -= 2;
|
---|
| 3184 | m68ki_branch_16(offset);
|
---|
| 3185 | }
|
---|
| 3186 |
|
---|
| 3187 |
|
---|
| 3188 | M68KMAKE_OP(bsr, 32, ., .)
|
---|
| 3189 | {
|
---|
| 3190 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 3191 | {
|
---|
| 3192 | uint offset = OPER_I_32();
|
---|
| 3193 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 3194 | m68ki_push_32(REG_PC);
|
---|
| 3195 | REG_PC -= 4;
|
---|
| 3196 | m68ki_branch_32(offset);
|
---|
| 3197 | return;
|
---|
| 3198 | }
|
---|
| 3199 | m68ki_exception_illegal();
|
---|
| 3200 | }
|
---|
| 3201 |
|
---|
| 3202 |
|
---|
| 3203 | M68KMAKE_OP(btst, 32, r, d)
|
---|
| 3204 | {
|
---|
| 3205 | FLAG_Z = DY & (1 << (DX & 0x1f));
|
---|
| 3206 | }
|
---|
| 3207 |
|
---|
| 3208 |
|
---|
| 3209 | M68KMAKE_OP(btst, 8, r, .)
|
---|
| 3210 | {
|
---|
| 3211 | FLAG_Z = M68KMAKE_GET_OPER_AY_8 & (1 << (DX & 7));
|
---|
| 3212 | }
|
---|
| 3213 |
|
---|
| 3214 |
|
---|
| 3215 | M68KMAKE_OP(btst, 32, s, d)
|
---|
| 3216 | {
|
---|
| 3217 | FLAG_Z = DY & (1 << (OPER_I_8() & 0x1f));
|
---|
| 3218 | }
|
---|
| 3219 |
|
---|
| 3220 |
|
---|
| 3221 | M68KMAKE_OP(btst, 8, s, .)
|
---|
| 3222 | {
|
---|
| 3223 | uint bit = OPER_I_8() & 7;
|
---|
| 3224 |
|
---|
| 3225 | FLAG_Z = M68KMAKE_GET_OPER_AY_8 & (1 << bit);
|
---|
| 3226 | }
|
---|
| 3227 |
|
---|
| 3228 |
|
---|
| 3229 | M68KMAKE_OP(callm, 32, ., .)
|
---|
| 3230 | {
|
---|
| 3231 | /* note: watch out for pcrelative modes */
|
---|
| 3232 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
|
---|
| 3233 | {
|
---|
| 3234 | uint ea = M68KMAKE_GET_EA_AY_32;
|
---|
| 3235 |
|
---|
| 3236 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 3237 | REG_PC += 2;
|
---|
| 3238 | (void)ea; /* just to avoid an 'unused variable' warning */
|
---|
| 3239 | M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
|
---|
| 3240 | m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
|
---|
| 3241 | m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
|
---|
| 3242 | return;
|
---|
| 3243 | }
|
---|
| 3244 | m68ki_exception_illegal();
|
---|
| 3245 | }
|
---|
| 3246 |
|
---|
| 3247 |
|
---|
| 3248 | M68KMAKE_OP(cas, 8, ., .)
|
---|
| 3249 | {
|
---|
| 3250 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 3251 | {
|
---|
| 3252 | uint word2 = OPER_I_16();
|
---|
| 3253 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 3254 | uint dest = m68ki_read_8(ea);
|
---|
| 3255 | uint* compare = ®_D[word2 & 7];
|
---|
| 3256 | uint res = dest - MASK_OUT_ABOVE_8(*compare);
|
---|
| 3257 |
|
---|
| 3258 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 3259 | FLAG_N = NFLAG_8(res);
|
---|
| 3260 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 3261 | FLAG_V = VFLAG_SUB_8(*compare, dest, res);
|
---|
| 3262 | FLAG_C = CFLAG_8(res);
|
---|
| 3263 |
|
---|
| 3264 | if(COND_NE())
|
---|
| 3265 | *compare = MASK_OUT_BELOW_8(*compare) | dest;
|
---|
| 3266 | else
|
---|
| 3267 | {
|
---|
| 3268 | USE_CYCLES(3);
|
---|
| 3269 | m68ki_write_8(ea, MASK_OUT_ABOVE_8(REG_D[(word2 >> 6) & 7]));
|
---|
| 3270 | }
|
---|
| 3271 | return;
|
---|
| 3272 | }
|
---|
| 3273 | m68ki_exception_illegal();
|
---|
| 3274 | }
|
---|
| 3275 |
|
---|
| 3276 |
|
---|
| 3277 | M68KMAKE_OP(cas, 16, ., .)
|
---|
| 3278 | {
|
---|
| 3279 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 3280 | {
|
---|
| 3281 | uint word2 = OPER_I_16();
|
---|
| 3282 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 3283 | uint dest = m68ki_read_16(ea);
|
---|
| 3284 | uint* compare = ®_D[word2 & 7];
|
---|
| 3285 | uint res = dest - MASK_OUT_ABOVE_16(*compare);
|
---|
| 3286 |
|
---|
| 3287 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 3288 | FLAG_N = NFLAG_16(res);
|
---|
| 3289 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 3290 | FLAG_V = VFLAG_SUB_16(*compare, dest, res);
|
---|
| 3291 | FLAG_C = CFLAG_16(res);
|
---|
| 3292 |
|
---|
| 3293 | if(COND_NE())
|
---|
| 3294 | *compare = MASK_OUT_BELOW_16(*compare) | dest;
|
---|
| 3295 | else
|
---|
| 3296 | {
|
---|
| 3297 | USE_CYCLES(3);
|
---|
| 3298 | m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_D[(word2 >> 6) & 7]));
|
---|
| 3299 | }
|
---|
| 3300 | return;
|
---|
| 3301 | }
|
---|
| 3302 | m68ki_exception_illegal();
|
---|
| 3303 | }
|
---|
| 3304 |
|
---|
| 3305 |
|
---|
| 3306 | M68KMAKE_OP(cas, 32, ., .)
|
---|
| 3307 | {
|
---|
| 3308 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 3309 | {
|
---|
| 3310 | uint word2 = OPER_I_16();
|
---|
| 3311 | uint ea = M68KMAKE_GET_EA_AY_32;
|
---|
| 3312 | uint dest = m68ki_read_32(ea);
|
---|
| 3313 | uint* compare = ®_D[word2 & 7];
|
---|
| 3314 | uint res = dest - *compare;
|
---|
| 3315 |
|
---|
| 3316 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 3317 | FLAG_N = NFLAG_32(res);
|
---|
| 3318 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 3319 | FLAG_V = VFLAG_SUB_32(*compare, dest, res);
|
---|
| 3320 | FLAG_C = CFLAG_SUB_32(*compare, dest, res);
|
---|
| 3321 |
|
---|
| 3322 | if(COND_NE())
|
---|
| 3323 | *compare = dest;
|
---|
| 3324 | else
|
---|
| 3325 | {
|
---|
| 3326 | USE_CYCLES(3);
|
---|
| 3327 | m68ki_write_32(ea, REG_D[(word2 >> 6) & 7]);
|
---|
| 3328 | }
|
---|
| 3329 | return;
|
---|
| 3330 | }
|
---|
| 3331 | m68ki_exception_illegal();
|
---|
| 3332 | }
|
---|
| 3333 |
|
---|
| 3334 |
|
---|
| 3335 | M68KMAKE_OP(cas2, 16, ., .)
|
---|
| 3336 | {
|
---|
| 3337 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 3338 | {
|
---|
| 3339 | uint word2 = OPER_I_32();
|
---|
| 3340 | uint* compare1 = ®_D[(word2 >> 16) & 7];
|
---|
| 3341 | uint ea1 = REG_DA[(word2 >> 28) & 15];
|
---|
| 3342 | uint dest1 = m68ki_read_16(ea1);
|
---|
| 3343 | uint res1 = dest1 - MASK_OUT_ABOVE_16(*compare1);
|
---|
| 3344 | uint* compare2 = ®_D[word2 & 7];
|
---|
| 3345 | uint ea2 = REG_DA[(word2 >> 12) & 15];
|
---|
| 3346 | uint dest2 = m68ki_read_16(ea2);
|
---|
| 3347 | uint res2;
|
---|
| 3348 |
|
---|
| 3349 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 3350 | FLAG_N = NFLAG_16(res1);
|
---|
| 3351 | FLAG_Z = MASK_OUT_ABOVE_16(res1);
|
---|
| 3352 | FLAG_V = VFLAG_SUB_16(*compare1, dest1, res1);
|
---|
| 3353 | FLAG_C = CFLAG_16(res1);
|
---|
| 3354 |
|
---|
| 3355 | if(COND_EQ())
|
---|
| 3356 | {
|
---|
| 3357 | res2 = dest2 - MASK_OUT_ABOVE_16(*compare2);
|
---|
| 3358 |
|
---|
| 3359 | FLAG_N = NFLAG_16(res2);
|
---|
| 3360 | FLAG_Z = MASK_OUT_ABOVE_16(res2);
|
---|
| 3361 | FLAG_V = VFLAG_SUB_16(*compare2, dest2, res2);
|
---|
| 3362 | FLAG_C = CFLAG_16(res2);
|
---|
| 3363 |
|
---|
| 3364 | if(COND_EQ())
|
---|
| 3365 | {
|
---|
| 3366 | USE_CYCLES(3);
|
---|
| 3367 | m68ki_write_16(ea1, REG_D[(word2 >> 22) & 7]);
|
---|
| 3368 | m68ki_write_16(ea2, REG_D[(word2 >> 6) & 7]);
|
---|
| 3369 | return;
|
---|
| 3370 | }
|
---|
| 3371 | }
|
---|
| 3372 | *compare1 = BIT_1F(word2) ? MAKE_INT_16(dest1) : MASK_OUT_BELOW_16(*compare1) | dest1;
|
---|
| 3373 | *compare2 = BIT_F(word2) ? MAKE_INT_16(dest2) : MASK_OUT_BELOW_16(*compare2) | dest2;
|
---|
| 3374 | return;
|
---|
| 3375 | }
|
---|
| 3376 | m68ki_exception_illegal();
|
---|
| 3377 | }
|
---|
| 3378 |
|
---|
| 3379 |
|
---|
| 3380 | M68KMAKE_OP(cas2, 32, ., .)
|
---|
| 3381 | {
|
---|
| 3382 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 3383 | {
|
---|
| 3384 | uint word2 = OPER_I_32();
|
---|
| 3385 | uint* compare1 = ®_D[(word2 >> 16) & 7];
|
---|
| 3386 | uint ea1 = REG_DA[(word2 >> 28) & 15];
|
---|
| 3387 | uint dest1 = m68ki_read_32(ea1);
|
---|
| 3388 | uint res1 = dest1 - *compare1;
|
---|
| 3389 | uint* compare2 = ®_D[word2 & 7];
|
---|
| 3390 | uint ea2 = REG_DA[(word2 >> 12) & 15];
|
---|
| 3391 | uint dest2 = m68ki_read_32(ea2);
|
---|
| 3392 | uint res2;
|
---|
| 3393 |
|
---|
| 3394 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 3395 | FLAG_N = NFLAG_32(res1);
|
---|
| 3396 | FLAG_Z = MASK_OUT_ABOVE_32(res1);
|
---|
| 3397 | FLAG_V = VFLAG_SUB_32(*compare1, dest1, res1);
|
---|
| 3398 | FLAG_C = CFLAG_SUB_32(*compare1, dest1, res1);
|
---|
| 3399 |
|
---|
| 3400 | if(COND_EQ())
|
---|
| 3401 | {
|
---|
| 3402 | res2 = dest2 - *compare2;
|
---|
| 3403 |
|
---|
| 3404 | FLAG_N = NFLAG_32(res2);
|
---|
| 3405 | FLAG_Z = MASK_OUT_ABOVE_32(res2);
|
---|
| 3406 | FLAG_V = VFLAG_SUB_32(*compare2, dest2, res2);
|
---|
| 3407 | FLAG_C = CFLAG_SUB_32(*compare2, dest2, res2);
|
---|
| 3408 |
|
---|
| 3409 | if(COND_EQ())
|
---|
| 3410 | {
|
---|
| 3411 | USE_CYCLES(3);
|
---|
| 3412 | m68ki_write_32(ea1, REG_D[(word2 >> 22) & 7]);
|
---|
| 3413 | m68ki_write_32(ea2, REG_D[(word2 >> 6) & 7]);
|
---|
| 3414 | return;
|
---|
| 3415 | }
|
---|
| 3416 | }
|
---|
| 3417 | *compare1 = dest1;
|
---|
| 3418 | *compare2 = dest2;
|
---|
| 3419 | return;
|
---|
| 3420 | }
|
---|
| 3421 | m68ki_exception_illegal();
|
---|
| 3422 | }
|
---|
| 3423 |
|
---|
| 3424 |
|
---|
| 3425 | M68KMAKE_OP(chk, 16, ., d)
|
---|
| 3426 | {
|
---|
| 3427 | sint src = MAKE_INT_16(DX);
|
---|
| 3428 | sint bound = MAKE_INT_16(DY);
|
---|
| 3429 |
|
---|
| 3430 | FLAG_Z = ZFLAG_16(src); /* Undocumented */
|
---|
| 3431 | FLAG_V = VFLAG_CLEAR; /* Undocumented */
|
---|
| 3432 | FLAG_C = CFLAG_CLEAR; /* Undocumented */
|
---|
| 3433 |
|
---|
| 3434 | if(src >= 0 && src <= bound)
|
---|
| 3435 | {
|
---|
| 3436 | return;
|
---|
| 3437 | }
|
---|
| 3438 | FLAG_N = (src < 0)<<7;
|
---|
| 3439 | m68ki_exception_trap(EXCEPTION_CHK);
|
---|
| 3440 | }
|
---|
| 3441 |
|
---|
| 3442 |
|
---|
| 3443 | M68KMAKE_OP(chk, 16, ., .)
|
---|
| 3444 | {
|
---|
| 3445 | sint src = MAKE_INT_16(DX);
|
---|
| 3446 | sint bound = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
|
---|
| 3447 |
|
---|
| 3448 | FLAG_Z = ZFLAG_16(src); /* Undocumented */
|
---|
| 3449 | FLAG_V = VFLAG_CLEAR; /* Undocumented */
|
---|
| 3450 | FLAG_C = CFLAG_CLEAR; /* Undocumented */
|
---|
| 3451 |
|
---|
| 3452 | if(src >= 0 && src <= bound)
|
---|
| 3453 | {
|
---|
| 3454 | return;
|
---|
| 3455 | }
|
---|
| 3456 | FLAG_N = (src < 0)<<7;
|
---|
| 3457 | m68ki_exception_trap(EXCEPTION_CHK);
|
---|
| 3458 | }
|
---|
| 3459 |
|
---|
| 3460 |
|
---|
| 3461 | M68KMAKE_OP(chk, 32, ., d)
|
---|
| 3462 | {
|
---|
| 3463 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 3464 | {
|
---|
| 3465 | sint src = MAKE_INT_32(DX);
|
---|
| 3466 | sint bound = MAKE_INT_32(DY);
|
---|
| 3467 |
|
---|
| 3468 | FLAG_Z = ZFLAG_32(src); /* Undocumented */
|
---|
| 3469 | FLAG_V = VFLAG_CLEAR; /* Undocumented */
|
---|
| 3470 | FLAG_C = CFLAG_CLEAR; /* Undocumented */
|
---|
| 3471 |
|
---|
| 3472 | if(src >= 0 && src <= bound)
|
---|
| 3473 | {
|
---|
| 3474 | return;
|
---|
| 3475 | }
|
---|
| 3476 | FLAG_N = (src < 0)<<7;
|
---|
| 3477 | m68ki_exception_trap(EXCEPTION_CHK);
|
---|
| 3478 | return;
|
---|
| 3479 | }
|
---|
| 3480 | m68ki_exception_illegal();
|
---|
| 3481 | }
|
---|
| 3482 |
|
---|
| 3483 |
|
---|
| 3484 | M68KMAKE_OP(chk, 32, ., .)
|
---|
| 3485 | {
|
---|
| 3486 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 3487 | {
|
---|
| 3488 | sint src = MAKE_INT_32(DX);
|
---|
| 3489 | sint bound = MAKE_INT_32(M68KMAKE_GET_OPER_AY_32);
|
---|
| 3490 |
|
---|
| 3491 | FLAG_Z = ZFLAG_32(src); /* Undocumented */
|
---|
| 3492 | FLAG_V = VFLAG_CLEAR; /* Undocumented */
|
---|
| 3493 | FLAG_C = CFLAG_CLEAR; /* Undocumented */
|
---|
| 3494 |
|
---|
| 3495 | if(src >= 0 && src <= bound)
|
---|
| 3496 | {
|
---|
| 3497 | return;
|
---|
| 3498 | }
|
---|
| 3499 | FLAG_N = (src < 0)<<7;
|
---|
| 3500 | m68ki_exception_trap(EXCEPTION_CHK);
|
---|
| 3501 | return;
|
---|
| 3502 | }
|
---|
| 3503 | m68ki_exception_illegal();
|
---|
| 3504 | }
|
---|
| 3505 |
|
---|
| 3506 |
|
---|
| 3507 | M68KMAKE_OP(chk2cmp2, 8, ., pcdi)
|
---|
| 3508 | {
|
---|
| 3509 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 3510 | {
|
---|
| 3511 | uint word2 = OPER_I_16();
|
---|
| 3512 | uint compare = REG_DA[(word2 >> 12) & 15]&0xff;
|
---|
| 3513 | uint ea = EA_PCDI_8();
|
---|
| 3514 | uint lower_bound = m68ki_read_pcrel_8(ea);
|
---|
| 3515 | uint upper_bound = m68ki_read_pcrel_8(ea + 1);
|
---|
| 3516 |
|
---|
| 3517 | if(!BIT_F(word2))
|
---|
| 3518 | FLAG_C = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);
|
---|
| 3519 | else
|
---|
| 3520 | FLAG_C = compare - lower_bound;
|
---|
| 3521 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
|
---|
| 3522 | if(COND_CS())
|
---|
| 3523 | {
|
---|
| 3524 | if(BIT_B(word2))
|
---|
| 3525 | m68ki_exception_trap(EXCEPTION_CHK);
|
---|
| 3526 | return;
|
---|
| 3527 | }
|
---|
| 3528 |
|
---|
| 3529 | FLAG_C = upper_bound - compare;
|
---|
| 3530 | if(COND_CS() && BIT_B(word2))
|
---|
| 3531 | m68ki_exception_trap(EXCEPTION_CHK);
|
---|
| 3532 | return;
|
---|
| 3533 | }
|
---|
| 3534 | m68ki_exception_illegal();
|
---|
| 3535 | }
|
---|
| 3536 |
|
---|
| 3537 |
|
---|
| 3538 | M68KMAKE_OP(chk2cmp2, 8, ., pcix)
|
---|
| 3539 | {
|
---|
| 3540 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 3541 | {
|
---|
| 3542 | uint word2 = OPER_I_16();
|
---|
| 3543 | uint compare = REG_DA[(word2 >> 12) & 15]&0xff;
|
---|
| 3544 | uint ea = EA_PCIX_8();
|
---|
| 3545 | uint lower_bound = m68ki_read_pcrel_8(ea);
|
---|
| 3546 | uint upper_bound = m68ki_read_pcrel_8(ea + 1);
|
---|
| 3547 |
|
---|
| 3548 | if(!BIT_F(word2))
|
---|
| 3549 | FLAG_C = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);
|
---|
| 3550 | else
|
---|
| 3551 | FLAG_C = compare - lower_bound;
|
---|
| 3552 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
|
---|
| 3553 | if(COND_CS())
|
---|
| 3554 | {
|
---|
| 3555 | if(BIT_B(word2))
|
---|
| 3556 | m68ki_exception_trap(EXCEPTION_CHK);
|
---|
| 3557 | return;
|
---|
| 3558 | }
|
---|
| 3559 |
|
---|
| 3560 | FLAG_C = upper_bound - compare;
|
---|
| 3561 | if(COND_CS() && BIT_B(word2))
|
---|
| 3562 | m68ki_exception_trap(EXCEPTION_CHK);
|
---|
| 3563 | return;
|
---|
| 3564 | }
|
---|
| 3565 | m68ki_exception_illegal();
|
---|
| 3566 | }
|
---|
| 3567 |
|
---|
| 3568 |
|
---|
| 3569 | M68KMAKE_OP(chk2cmp2, 8, ., .)
|
---|
| 3570 | {
|
---|
| 3571 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 3572 | {
|
---|
| 3573 | uint word2 = OPER_I_16();
|
---|
| 3574 | uint compare = REG_DA[(word2 >> 12) & 15]&0xff;
|
---|
| 3575 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 3576 | uint lower_bound = m68ki_read_8(ea);
|
---|
| 3577 | uint upper_bound = m68ki_read_8(ea + 1);
|
---|
| 3578 |
|
---|
| 3579 | if(!BIT_F(word2))
|
---|
| 3580 | FLAG_C = MAKE_INT_8(compare) - MAKE_INT_8(lower_bound);
|
---|
| 3581 | else
|
---|
| 3582 | FLAG_C = compare - lower_bound;
|
---|
| 3583 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
|
---|
| 3584 | if(COND_CS())
|
---|
| 3585 | {
|
---|
| 3586 | if(BIT_B(word2))
|
---|
| 3587 | m68ki_exception_trap(EXCEPTION_CHK);
|
---|
| 3588 | return;
|
---|
| 3589 | }
|
---|
| 3590 |
|
---|
| 3591 | FLAG_C = upper_bound - compare;
|
---|
| 3592 | if(COND_CS() && BIT_B(word2))
|
---|
| 3593 | m68ki_exception_trap(EXCEPTION_CHK);
|
---|
| 3594 | return;
|
---|
| 3595 | }
|
---|
| 3596 | m68ki_exception_illegal();
|
---|
| 3597 | }
|
---|
| 3598 |
|
---|
| 3599 |
|
---|
| 3600 | M68KMAKE_OP(chk2cmp2, 16, ., pcdi)
|
---|
| 3601 | {
|
---|
| 3602 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 3603 | {
|
---|
| 3604 | uint word2 = OPER_I_16();
|
---|
| 3605 | uint compare = REG_DA[(word2 >> 12) & 15]&0xffff;
|
---|
| 3606 | uint ea = EA_PCDI_16();
|
---|
| 3607 | uint lower_bound = m68ki_read_pcrel_16(ea);
|
---|
| 3608 | uint upper_bound = m68ki_read_pcrel_16(ea + 2);
|
---|
| 3609 |
|
---|
| 3610 | if(!BIT_F(word2))
|
---|
| 3611 | FLAG_C = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);
|
---|
| 3612 | else
|
---|
| 3613 | FLAG_C = compare - lower_bound;
|
---|
| 3614 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
|
---|
| 3615 | FLAG_C = CFLAG_16(FLAG_C);
|
---|
| 3616 | if(COND_CS())
|
---|
| 3617 | {
|
---|
| 3618 | if(BIT_B(word2))
|
---|
| 3619 | m68ki_exception_trap(EXCEPTION_CHK);
|
---|
| 3620 | return;
|
---|
| 3621 | }
|
---|
| 3622 |
|
---|
| 3623 | if(!BIT_F(word2))
|
---|
| 3624 | FLAG_C = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare);
|
---|
| 3625 | else
|
---|
| 3626 | FLAG_C = upper_bound - compare;
|
---|
| 3627 | FLAG_C = CFLAG_16(FLAG_C);
|
---|
| 3628 | if(COND_CS() && BIT_B(word2))
|
---|
| 3629 | m68ki_exception_trap(EXCEPTION_CHK);
|
---|
| 3630 | return;
|
---|
| 3631 | }
|
---|
| 3632 | m68ki_exception_illegal();
|
---|
| 3633 | }
|
---|
| 3634 |
|
---|
| 3635 |
|
---|
| 3636 | M68KMAKE_OP(chk2cmp2, 16, ., pcix)
|
---|
| 3637 | {
|
---|
| 3638 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 3639 | {
|
---|
| 3640 | uint word2 = OPER_I_16();
|
---|
| 3641 | uint compare = REG_DA[(word2 >> 12) & 15]&0xffff;
|
---|
| 3642 | uint ea = EA_PCIX_16();
|
---|
| 3643 | uint lower_bound = m68ki_read_pcrel_16(ea);
|
---|
| 3644 | uint upper_bound = m68ki_read_pcrel_16(ea + 2);
|
---|
| 3645 |
|
---|
| 3646 | if(!BIT_F(word2))
|
---|
| 3647 | FLAG_C = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);
|
---|
| 3648 | else
|
---|
| 3649 | FLAG_C = compare - lower_bound;
|
---|
| 3650 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
|
---|
| 3651 | FLAG_C = CFLAG_16(FLAG_C);
|
---|
| 3652 | if(COND_CS())
|
---|
| 3653 | {
|
---|
| 3654 | if(BIT_B(word2))
|
---|
| 3655 | m68ki_exception_trap(EXCEPTION_CHK);
|
---|
| 3656 | return;
|
---|
| 3657 | }
|
---|
| 3658 |
|
---|
| 3659 | if(!BIT_F(word2))
|
---|
| 3660 | FLAG_C = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare);
|
---|
| 3661 | else
|
---|
| 3662 | FLAG_C = upper_bound - compare;
|
---|
| 3663 | FLAG_C = CFLAG_16(FLAG_C);
|
---|
| 3664 | if(COND_CS() && BIT_B(word2))
|
---|
| 3665 | m68ki_exception_trap(EXCEPTION_CHK);
|
---|
| 3666 | return;
|
---|
| 3667 | }
|
---|
| 3668 | m68ki_exception_illegal();
|
---|
| 3669 | }
|
---|
| 3670 |
|
---|
| 3671 |
|
---|
| 3672 | M68KMAKE_OP(chk2cmp2, 16, ., .)
|
---|
| 3673 | {
|
---|
| 3674 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 3675 | {
|
---|
| 3676 | uint word2 = OPER_I_16();
|
---|
| 3677 | uint compare = REG_DA[(word2 >> 12) & 15]&0xffff;
|
---|
| 3678 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 3679 | uint lower_bound = m68ki_read_16(ea);
|
---|
| 3680 | uint upper_bound = m68ki_read_16(ea + 2);
|
---|
| 3681 |
|
---|
| 3682 | if(!BIT_F(word2))
|
---|
| 3683 | FLAG_C = MAKE_INT_16(compare) - MAKE_INT_16(lower_bound);
|
---|
| 3684 | else
|
---|
| 3685 | FLAG_C = compare - lower_bound;
|
---|
| 3686 |
|
---|
| 3687 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
|
---|
| 3688 | FLAG_C = CFLAG_16(FLAG_C);
|
---|
| 3689 | if(COND_CS())
|
---|
| 3690 | {
|
---|
| 3691 | if(BIT_B(word2))
|
---|
| 3692 | m68ki_exception_trap(EXCEPTION_CHK);
|
---|
| 3693 | return;
|
---|
| 3694 | }
|
---|
| 3695 | if(!BIT_F(word2))
|
---|
| 3696 | FLAG_C = MAKE_INT_16(upper_bound) - MAKE_INT_16(compare);
|
---|
| 3697 | else
|
---|
| 3698 | FLAG_C = upper_bound - compare;
|
---|
| 3699 |
|
---|
| 3700 | FLAG_C = CFLAG_16(FLAG_C);
|
---|
| 3701 | if(COND_CS() && BIT_B(word2))
|
---|
| 3702 | m68ki_exception_trap(EXCEPTION_CHK);
|
---|
| 3703 | return;
|
---|
| 3704 | }
|
---|
| 3705 | m68ki_exception_illegal();
|
---|
| 3706 | }
|
---|
| 3707 |
|
---|
| 3708 |
|
---|
| 3709 | M68KMAKE_OP(chk2cmp2, 32, ., pcdi)
|
---|
| 3710 | {
|
---|
| 3711 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 3712 | {
|
---|
| 3713 | uint word2 = OPER_I_16();
|
---|
| 3714 | uint compare = REG_DA[(word2 >> 12) & 15];
|
---|
| 3715 | uint ea = EA_PCDI_32();
|
---|
| 3716 | uint lower_bound = m68ki_read_pcrel_32(ea);
|
---|
| 3717 | uint upper_bound = m68ki_read_pcrel_32(ea + 4);
|
---|
| 3718 |
|
---|
| 3719 | FLAG_C = compare - lower_bound;
|
---|
| 3720 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
|
---|
| 3721 | FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C);
|
---|
| 3722 | if(COND_CS())
|
---|
| 3723 | {
|
---|
| 3724 | if(BIT_B(word2))
|
---|
| 3725 | m68ki_exception_trap(EXCEPTION_CHK);
|
---|
| 3726 | return;
|
---|
| 3727 | }
|
---|
| 3728 |
|
---|
| 3729 | FLAG_C = upper_bound - compare;
|
---|
| 3730 | FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C);
|
---|
| 3731 | if(COND_CS() && BIT_B(word2))
|
---|
| 3732 | m68ki_exception_trap(EXCEPTION_CHK);
|
---|
| 3733 | return;
|
---|
| 3734 | }
|
---|
| 3735 | m68ki_exception_illegal();
|
---|
| 3736 | }
|
---|
| 3737 |
|
---|
| 3738 |
|
---|
| 3739 | M68KMAKE_OP(chk2cmp2, 32, ., pcix)
|
---|
| 3740 | {
|
---|
| 3741 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 3742 | {
|
---|
| 3743 | uint word2 = OPER_I_16();
|
---|
| 3744 | uint compare = REG_DA[(word2 >> 12) & 15];
|
---|
| 3745 | uint ea = EA_PCIX_32();
|
---|
| 3746 | uint lower_bound = m68ki_read_pcrel_32(ea);
|
---|
| 3747 | uint upper_bound = m68ki_read_pcrel_32(ea + 4);
|
---|
| 3748 |
|
---|
| 3749 | FLAG_C = compare - lower_bound;
|
---|
| 3750 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
|
---|
| 3751 | FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C);
|
---|
| 3752 | if(COND_CS())
|
---|
| 3753 | {
|
---|
| 3754 | if(BIT_B(word2))
|
---|
| 3755 | m68ki_exception_trap(EXCEPTION_CHK);
|
---|
| 3756 | return;
|
---|
| 3757 | }
|
---|
| 3758 |
|
---|
| 3759 | FLAG_C = upper_bound - compare;
|
---|
| 3760 | FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C);
|
---|
| 3761 | if(COND_CS() && BIT_B(word2))
|
---|
| 3762 | m68ki_exception_trap(EXCEPTION_CHK);
|
---|
| 3763 | return;
|
---|
| 3764 | }
|
---|
| 3765 | m68ki_exception_illegal();
|
---|
| 3766 | }
|
---|
| 3767 |
|
---|
| 3768 |
|
---|
| 3769 | M68KMAKE_OP(chk2cmp2, 32, ., .)
|
---|
| 3770 | {
|
---|
| 3771 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 3772 | {
|
---|
| 3773 | uint word2 = OPER_I_16();
|
---|
| 3774 | uint compare = REG_DA[(word2 >> 12) & 15];
|
---|
| 3775 | uint ea = M68KMAKE_GET_EA_AY_32;
|
---|
| 3776 | uint lower_bound = m68ki_read_32(ea);
|
---|
| 3777 | uint upper_bound = m68ki_read_32(ea + 4);
|
---|
| 3778 |
|
---|
| 3779 | FLAG_C = compare - lower_bound;
|
---|
| 3780 | FLAG_Z = !((upper_bound==compare) | (lower_bound==compare));
|
---|
| 3781 | FLAG_C = CFLAG_SUB_32(lower_bound, compare, FLAG_C);
|
---|
| 3782 | if(COND_CS())
|
---|
| 3783 | {
|
---|
| 3784 | if(BIT_B(word2))
|
---|
| 3785 | m68ki_exception_trap(EXCEPTION_CHK);
|
---|
| 3786 | return;
|
---|
| 3787 | }
|
---|
| 3788 |
|
---|
| 3789 | FLAG_C = upper_bound - compare;
|
---|
| 3790 | FLAG_C = CFLAG_SUB_32(compare, upper_bound, FLAG_C);
|
---|
| 3791 | if(COND_CS() && BIT_B(word2))
|
---|
| 3792 | m68ki_exception_trap(EXCEPTION_CHK);
|
---|
| 3793 | return;
|
---|
| 3794 | }
|
---|
| 3795 | m68ki_exception_illegal();
|
---|
| 3796 | }
|
---|
| 3797 |
|
---|
| 3798 |
|
---|
| 3799 | M68KMAKE_OP(clr, 8, ., d)
|
---|
| 3800 | {
|
---|
| 3801 | DY &= 0xffffff00;
|
---|
| 3802 |
|
---|
| 3803 | FLAG_N = NFLAG_CLEAR;
|
---|
| 3804 | FLAG_V = VFLAG_CLEAR;
|
---|
| 3805 | FLAG_C = CFLAG_CLEAR;
|
---|
| 3806 | FLAG_Z = ZFLAG_SET;
|
---|
| 3807 | }
|
---|
| 3808 |
|
---|
| 3809 |
|
---|
| 3810 | M68KMAKE_OP(clr, 8, ., .)
|
---|
| 3811 | {
|
---|
| 3812 | m68ki_write_8(M68KMAKE_GET_EA_AY_8, 0);
|
---|
| 3813 |
|
---|
| 3814 | FLAG_N = NFLAG_CLEAR;
|
---|
| 3815 | FLAG_V = VFLAG_CLEAR;
|
---|
| 3816 | FLAG_C = CFLAG_CLEAR;
|
---|
| 3817 | FLAG_Z = ZFLAG_SET;
|
---|
| 3818 | }
|
---|
| 3819 |
|
---|
| 3820 |
|
---|
| 3821 | M68KMAKE_OP(clr, 16, ., d)
|
---|
| 3822 | {
|
---|
| 3823 | DY &= 0xffff0000;
|
---|
| 3824 |
|
---|
| 3825 | FLAG_N = NFLAG_CLEAR;
|
---|
| 3826 | FLAG_V = VFLAG_CLEAR;
|
---|
| 3827 | FLAG_C = CFLAG_CLEAR;
|
---|
| 3828 | FLAG_Z = ZFLAG_SET;
|
---|
| 3829 | }
|
---|
| 3830 |
|
---|
| 3831 |
|
---|
| 3832 | M68KMAKE_OP(clr, 16, ., .)
|
---|
| 3833 | {
|
---|
| 3834 | m68ki_write_16(M68KMAKE_GET_EA_AY_16, 0);
|
---|
| 3835 |
|
---|
| 3836 | FLAG_N = NFLAG_CLEAR;
|
---|
| 3837 | FLAG_V = VFLAG_CLEAR;
|
---|
| 3838 | FLAG_C = CFLAG_CLEAR;
|
---|
| 3839 | FLAG_Z = ZFLAG_SET;
|
---|
| 3840 | }
|
---|
| 3841 |
|
---|
| 3842 |
|
---|
| 3843 | M68KMAKE_OP(clr, 32, ., d)
|
---|
| 3844 | {
|
---|
| 3845 | DY = 0;
|
---|
| 3846 |
|
---|
| 3847 | FLAG_N = NFLAG_CLEAR;
|
---|
| 3848 | FLAG_V = VFLAG_CLEAR;
|
---|
| 3849 | FLAG_C = CFLAG_CLEAR;
|
---|
| 3850 | FLAG_Z = ZFLAG_SET;
|
---|
| 3851 | }
|
---|
| 3852 |
|
---|
| 3853 |
|
---|
| 3854 | M68KMAKE_OP(clr, 32, ., .)
|
---|
| 3855 | {
|
---|
| 3856 | m68ki_write_32(M68KMAKE_GET_EA_AY_32, 0);
|
---|
| 3857 |
|
---|
| 3858 | FLAG_N = NFLAG_CLEAR;
|
---|
| 3859 | FLAG_V = VFLAG_CLEAR;
|
---|
| 3860 | FLAG_C = CFLAG_CLEAR;
|
---|
| 3861 | FLAG_Z = ZFLAG_SET;
|
---|
| 3862 | }
|
---|
| 3863 |
|
---|
| 3864 |
|
---|
| 3865 | M68KMAKE_OP(cmp, 8, ., d)
|
---|
| 3866 | {
|
---|
| 3867 | uint src = MASK_OUT_ABOVE_8(DY);
|
---|
| 3868 | uint dst = MASK_OUT_ABOVE_8(DX);
|
---|
| 3869 | uint res = dst - src;
|
---|
| 3870 |
|
---|
| 3871 | FLAG_N = NFLAG_8(res);
|
---|
| 3872 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 3873 | FLAG_V = VFLAG_SUB_8(src, dst, res);
|
---|
| 3874 | FLAG_C = CFLAG_8(res);
|
---|
| 3875 | }
|
---|
| 3876 |
|
---|
| 3877 |
|
---|
| 3878 | M68KMAKE_OP(cmp, 8, ., .)
|
---|
| 3879 | {
|
---|
| 3880 | uint src = M68KMAKE_GET_OPER_AY_8;
|
---|
| 3881 | uint dst = MASK_OUT_ABOVE_8(DX);
|
---|
| 3882 | uint res = dst - src;
|
---|
| 3883 |
|
---|
| 3884 | FLAG_N = NFLAG_8(res);
|
---|
| 3885 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 3886 | FLAG_V = VFLAG_SUB_8(src, dst, res);
|
---|
| 3887 | FLAG_C = CFLAG_8(res);
|
---|
| 3888 | }
|
---|
| 3889 |
|
---|
| 3890 |
|
---|
| 3891 | M68KMAKE_OP(cmp, 16, ., d)
|
---|
| 3892 | {
|
---|
| 3893 | uint src = MASK_OUT_ABOVE_16(DY);
|
---|
| 3894 | uint dst = MASK_OUT_ABOVE_16(DX);
|
---|
| 3895 | uint res = dst - src;
|
---|
| 3896 |
|
---|
| 3897 | FLAG_N = NFLAG_16(res);
|
---|
| 3898 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 3899 | FLAG_V = VFLAG_SUB_16(src, dst, res);
|
---|
| 3900 | FLAG_C = CFLAG_16(res);
|
---|
| 3901 | }
|
---|
| 3902 |
|
---|
| 3903 |
|
---|
| 3904 | M68KMAKE_OP(cmp, 16, ., a)
|
---|
| 3905 | {
|
---|
| 3906 | uint src = MASK_OUT_ABOVE_16(AY);
|
---|
| 3907 | uint dst = MASK_OUT_ABOVE_16(DX);
|
---|
| 3908 | uint res = dst - src;
|
---|
| 3909 |
|
---|
| 3910 | FLAG_N = NFLAG_16(res);
|
---|
| 3911 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 3912 | FLAG_V = VFLAG_SUB_16(src, dst, res);
|
---|
| 3913 | FLAG_C = CFLAG_16(res);
|
---|
| 3914 | }
|
---|
| 3915 |
|
---|
| 3916 |
|
---|
| 3917 | M68KMAKE_OP(cmp, 16, ., .)
|
---|
| 3918 | {
|
---|
| 3919 | uint src = M68KMAKE_GET_OPER_AY_16;
|
---|
| 3920 | uint dst = MASK_OUT_ABOVE_16(DX);
|
---|
| 3921 | uint res = dst - src;
|
---|
| 3922 |
|
---|
| 3923 | FLAG_N = NFLAG_16(res);
|
---|
| 3924 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 3925 | FLAG_V = VFLAG_SUB_16(src, dst, res);
|
---|
| 3926 | FLAG_C = CFLAG_16(res);
|
---|
| 3927 | }
|
---|
| 3928 |
|
---|
| 3929 |
|
---|
| 3930 | M68KMAKE_OP(cmp, 32, ., d)
|
---|
| 3931 | {
|
---|
| 3932 | uint src = DY;
|
---|
| 3933 | uint dst = DX;
|
---|
| 3934 | uint res = dst - src;
|
---|
| 3935 |
|
---|
| 3936 | FLAG_N = NFLAG_32(res);
|
---|
| 3937 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 3938 | FLAG_V = VFLAG_SUB_32(src, dst, res);
|
---|
| 3939 | FLAG_C = CFLAG_SUB_32(src, dst, res);
|
---|
| 3940 | }
|
---|
| 3941 |
|
---|
| 3942 |
|
---|
| 3943 | M68KMAKE_OP(cmp, 32, ., a)
|
---|
| 3944 | {
|
---|
| 3945 | uint src = AY;
|
---|
| 3946 | uint dst = DX;
|
---|
| 3947 | uint res = dst - src;
|
---|
| 3948 |
|
---|
| 3949 | FLAG_N = NFLAG_32(res);
|
---|
| 3950 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 3951 | FLAG_V = VFLAG_SUB_32(src, dst, res);
|
---|
| 3952 | FLAG_C = CFLAG_SUB_32(src, dst, res);
|
---|
| 3953 | }
|
---|
| 3954 |
|
---|
| 3955 |
|
---|
| 3956 | M68KMAKE_OP(cmp, 32, ., .)
|
---|
| 3957 | {
|
---|
| 3958 | uint src = M68KMAKE_GET_OPER_AY_32;
|
---|
| 3959 | uint dst = DX;
|
---|
| 3960 | uint res = dst - src;
|
---|
| 3961 |
|
---|
| 3962 | FLAG_N = NFLAG_32(res);
|
---|
| 3963 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 3964 | FLAG_V = VFLAG_SUB_32(src, dst, res);
|
---|
| 3965 | FLAG_C = CFLAG_SUB_32(src, dst, res);
|
---|
| 3966 | }
|
---|
| 3967 |
|
---|
| 3968 |
|
---|
| 3969 | M68KMAKE_OP(cmpa, 16, ., d)
|
---|
| 3970 | {
|
---|
| 3971 | uint src = MAKE_INT_16(DY);
|
---|
| 3972 | uint dst = AX;
|
---|
| 3973 | uint res = dst - src;
|
---|
| 3974 |
|
---|
| 3975 | FLAG_N = NFLAG_32(res);
|
---|
| 3976 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 3977 | FLAG_V = VFLAG_SUB_32(src, dst, res);
|
---|
| 3978 | FLAG_C = CFLAG_SUB_32(src, dst, res);
|
---|
| 3979 | }
|
---|
| 3980 |
|
---|
| 3981 |
|
---|
| 3982 | M68KMAKE_OP(cmpa, 16, ., a)
|
---|
| 3983 | {
|
---|
| 3984 | uint src = MAKE_INT_16(AY);
|
---|
| 3985 | uint dst = AX;
|
---|
| 3986 | uint res = dst - src;
|
---|
| 3987 |
|
---|
| 3988 | FLAG_N = NFLAG_32(res);
|
---|
| 3989 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 3990 | FLAG_V = VFLAG_SUB_32(src, dst, res);
|
---|
| 3991 | FLAG_C = CFLAG_SUB_32(src, dst, res);
|
---|
| 3992 | }
|
---|
| 3993 |
|
---|
| 3994 |
|
---|
| 3995 | M68KMAKE_OP(cmpa, 16, ., .)
|
---|
| 3996 | {
|
---|
| 3997 | uint src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
|
---|
| 3998 | uint dst = AX;
|
---|
| 3999 | uint res = dst - src;
|
---|
| 4000 |
|
---|
| 4001 | FLAG_N = NFLAG_32(res);
|
---|
| 4002 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 4003 | FLAG_V = VFLAG_SUB_32(src, dst, res);
|
---|
| 4004 | FLAG_C = CFLAG_SUB_32(src, dst, res);
|
---|
| 4005 | }
|
---|
| 4006 |
|
---|
| 4007 |
|
---|
| 4008 | M68KMAKE_OP(cmpa, 32, ., d)
|
---|
| 4009 | {
|
---|
| 4010 | uint src = DY;
|
---|
| 4011 | uint dst = AX;
|
---|
| 4012 | uint res = dst - src;
|
---|
| 4013 |
|
---|
| 4014 | FLAG_N = NFLAG_32(res);
|
---|
| 4015 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 4016 | FLAG_V = VFLAG_SUB_32(src, dst, res);
|
---|
| 4017 | FLAG_C = CFLAG_SUB_32(src, dst, res);
|
---|
| 4018 | }
|
---|
| 4019 |
|
---|
| 4020 |
|
---|
| 4021 | M68KMAKE_OP(cmpa, 32, ., a)
|
---|
| 4022 | {
|
---|
| 4023 | uint src = AY;
|
---|
| 4024 | uint dst = AX;
|
---|
| 4025 | uint res = dst - src;
|
---|
| 4026 |
|
---|
| 4027 | FLAG_N = NFLAG_32(res);
|
---|
| 4028 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 4029 | FLAG_V = VFLAG_SUB_32(src, dst, res);
|
---|
| 4030 | FLAG_C = CFLAG_SUB_32(src, dst, res);
|
---|
| 4031 | }
|
---|
| 4032 |
|
---|
| 4033 |
|
---|
| 4034 | M68KMAKE_OP(cmpa, 32, ., .)
|
---|
| 4035 | {
|
---|
| 4036 | uint src = M68KMAKE_GET_OPER_AY_32;
|
---|
| 4037 | uint dst = AX;
|
---|
| 4038 | uint res = dst - src;
|
---|
| 4039 |
|
---|
| 4040 | FLAG_N = NFLAG_32(res);
|
---|
| 4041 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 4042 | FLAG_V = VFLAG_SUB_32(src, dst, res);
|
---|
| 4043 | FLAG_C = CFLAG_SUB_32(src, dst, res);
|
---|
| 4044 | }
|
---|
| 4045 |
|
---|
| 4046 |
|
---|
| 4047 | M68KMAKE_OP(cmpi, 8, ., d)
|
---|
| 4048 | {
|
---|
| 4049 | uint src = OPER_I_8();
|
---|
| 4050 | uint dst = MASK_OUT_ABOVE_8(DY);
|
---|
| 4051 | uint res = dst - src;
|
---|
| 4052 |
|
---|
| 4053 | FLAG_N = NFLAG_8(res);
|
---|
| 4054 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 4055 | FLAG_V = VFLAG_SUB_8(src, dst, res);
|
---|
| 4056 | FLAG_C = CFLAG_8(res);
|
---|
| 4057 | }
|
---|
| 4058 |
|
---|
| 4059 |
|
---|
| 4060 | M68KMAKE_OP(cmpi, 8, ., .)
|
---|
| 4061 | {
|
---|
| 4062 | uint src = OPER_I_8();
|
---|
| 4063 | uint dst = M68KMAKE_GET_OPER_AY_8;
|
---|
| 4064 | uint res = dst - src;
|
---|
| 4065 |
|
---|
| 4066 | FLAG_N = NFLAG_8(res);
|
---|
| 4067 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 4068 | FLAG_V = VFLAG_SUB_8(src, dst, res);
|
---|
| 4069 | FLAG_C = CFLAG_8(res);
|
---|
| 4070 | }
|
---|
| 4071 |
|
---|
| 4072 |
|
---|
| 4073 | M68KMAKE_OP(cmpi, 8, ., pcdi)
|
---|
| 4074 | {
|
---|
| 4075 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 4076 | {
|
---|
| 4077 | uint src = OPER_I_8();
|
---|
| 4078 | uint dst = OPER_PCDI_8();
|
---|
| 4079 | uint res = dst - src;
|
---|
| 4080 |
|
---|
| 4081 | FLAG_N = NFLAG_8(res);
|
---|
| 4082 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 4083 | FLAG_V = VFLAG_SUB_8(src, dst, res);
|
---|
| 4084 | FLAG_C = CFLAG_8(res);
|
---|
| 4085 | return;
|
---|
| 4086 | }
|
---|
| 4087 | m68ki_exception_illegal();
|
---|
| 4088 | }
|
---|
| 4089 |
|
---|
| 4090 |
|
---|
| 4091 | M68KMAKE_OP(cmpi, 8, ., pcix)
|
---|
| 4092 | {
|
---|
| 4093 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 4094 | {
|
---|
| 4095 | uint src = OPER_I_8();
|
---|
| 4096 | uint dst = OPER_PCIX_8();
|
---|
| 4097 | uint res = dst - src;
|
---|
| 4098 |
|
---|
| 4099 | FLAG_N = NFLAG_8(res);
|
---|
| 4100 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 4101 | FLAG_V = VFLAG_SUB_8(src, dst, res);
|
---|
| 4102 | FLAG_C = CFLAG_8(res);
|
---|
| 4103 | return;
|
---|
| 4104 | }
|
---|
| 4105 | m68ki_exception_illegal();
|
---|
| 4106 | }
|
---|
| 4107 |
|
---|
| 4108 |
|
---|
| 4109 | M68KMAKE_OP(cmpi, 16, ., d)
|
---|
| 4110 | {
|
---|
| 4111 | uint src = OPER_I_16();
|
---|
| 4112 | uint dst = MASK_OUT_ABOVE_16(DY);
|
---|
| 4113 | uint res = dst - src;
|
---|
| 4114 |
|
---|
| 4115 | FLAG_N = NFLAG_16(res);
|
---|
| 4116 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 4117 | FLAG_V = VFLAG_SUB_16(src, dst, res);
|
---|
| 4118 | FLAG_C = CFLAG_16(res);
|
---|
| 4119 | }
|
---|
| 4120 |
|
---|
| 4121 |
|
---|
| 4122 | M68KMAKE_OP(cmpi, 16, ., .)
|
---|
| 4123 | {
|
---|
| 4124 | uint src = OPER_I_16();
|
---|
| 4125 | uint dst = M68KMAKE_GET_OPER_AY_16;
|
---|
| 4126 | uint res = dst - src;
|
---|
| 4127 |
|
---|
| 4128 | FLAG_N = NFLAG_16(res);
|
---|
| 4129 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 4130 | FLAG_V = VFLAG_SUB_16(src, dst, res);
|
---|
| 4131 | FLAG_C = CFLAG_16(res);
|
---|
| 4132 | }
|
---|
| 4133 |
|
---|
| 4134 |
|
---|
| 4135 | M68KMAKE_OP(cmpi, 16, ., pcdi)
|
---|
| 4136 | {
|
---|
| 4137 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 4138 | {
|
---|
| 4139 | uint src = OPER_I_16();
|
---|
| 4140 | uint dst = OPER_PCDI_16();
|
---|
| 4141 | uint res = dst - src;
|
---|
| 4142 |
|
---|
| 4143 | FLAG_N = NFLAG_16(res);
|
---|
| 4144 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 4145 | FLAG_V = VFLAG_SUB_16(src, dst, res);
|
---|
| 4146 | FLAG_C = CFLAG_16(res);
|
---|
| 4147 | return;
|
---|
| 4148 | }
|
---|
| 4149 | m68ki_exception_illegal();
|
---|
| 4150 | }
|
---|
| 4151 |
|
---|
| 4152 |
|
---|
| 4153 | M68KMAKE_OP(cmpi, 16, ., pcix)
|
---|
| 4154 | {
|
---|
| 4155 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 4156 | {
|
---|
| 4157 | uint src = OPER_I_16();
|
---|
| 4158 | uint dst = OPER_PCIX_16();
|
---|
| 4159 | uint res = dst - src;
|
---|
| 4160 |
|
---|
| 4161 | FLAG_N = NFLAG_16(res);
|
---|
| 4162 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 4163 | FLAG_V = VFLAG_SUB_16(src, dst, res);
|
---|
| 4164 | FLAG_C = CFLAG_16(res);
|
---|
| 4165 | return;
|
---|
| 4166 | }
|
---|
| 4167 | m68ki_exception_illegal();
|
---|
| 4168 | }
|
---|
| 4169 |
|
---|
| 4170 |
|
---|
| 4171 | M68KMAKE_OP(cmpi, 32, ., d)
|
---|
| 4172 | {
|
---|
| 4173 | uint src = OPER_I_32();
|
---|
| 4174 | uint dst = DY;
|
---|
| 4175 | uint res = dst - src;
|
---|
| 4176 |
|
---|
| 4177 | FLAG_N = NFLAG_32(res);
|
---|
| 4178 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 4179 | FLAG_V = VFLAG_SUB_32(src, dst, res);
|
---|
| 4180 | FLAG_C = CFLAG_SUB_32(src, dst, res);
|
---|
| 4181 | }
|
---|
| 4182 |
|
---|
| 4183 |
|
---|
| 4184 | M68KMAKE_OP(cmpi, 32, ., .)
|
---|
| 4185 | {
|
---|
| 4186 | uint src = OPER_I_32();
|
---|
| 4187 | uint dst = M68KMAKE_GET_OPER_AY_32;
|
---|
| 4188 | uint res = dst - src;
|
---|
| 4189 |
|
---|
| 4190 | FLAG_N = NFLAG_32(res);
|
---|
| 4191 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 4192 | FLAG_V = VFLAG_SUB_32(src, dst, res);
|
---|
| 4193 | FLAG_C = CFLAG_SUB_32(src, dst, res);
|
---|
| 4194 | }
|
---|
| 4195 |
|
---|
| 4196 |
|
---|
| 4197 | M68KMAKE_OP(cmpi, 32, ., pcdi)
|
---|
| 4198 | {
|
---|
| 4199 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 4200 | {
|
---|
| 4201 | uint src = OPER_I_32();
|
---|
| 4202 | uint dst = OPER_PCDI_32();
|
---|
| 4203 | uint res = dst - src;
|
---|
| 4204 |
|
---|
| 4205 | FLAG_N = NFLAG_32(res);
|
---|
| 4206 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 4207 | FLAG_V = VFLAG_SUB_32(src, dst, res);
|
---|
| 4208 | FLAG_C = CFLAG_SUB_32(src, dst, res);
|
---|
| 4209 | return;
|
---|
| 4210 | }
|
---|
| 4211 | m68ki_exception_illegal();
|
---|
| 4212 | }
|
---|
| 4213 |
|
---|
| 4214 |
|
---|
| 4215 | M68KMAKE_OP(cmpi, 32, ., pcix)
|
---|
| 4216 | {
|
---|
| 4217 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 4218 | {
|
---|
| 4219 | uint src = OPER_I_32();
|
---|
| 4220 | uint dst = OPER_PCIX_32();
|
---|
| 4221 | uint res = dst - src;
|
---|
| 4222 |
|
---|
| 4223 | FLAG_N = NFLAG_32(res);
|
---|
| 4224 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 4225 | FLAG_V = VFLAG_SUB_32(src, dst, res);
|
---|
| 4226 | FLAG_C = CFLAG_SUB_32(src, dst, res);
|
---|
| 4227 | return;
|
---|
| 4228 | }
|
---|
| 4229 | m68ki_exception_illegal();
|
---|
| 4230 | }
|
---|
| 4231 |
|
---|
| 4232 |
|
---|
| 4233 | M68KMAKE_OP(cmpm, 8, ., ax7)
|
---|
| 4234 | {
|
---|
| 4235 | uint src = OPER_AY_PI_8();
|
---|
| 4236 | uint dst = OPER_A7_PI_8();
|
---|
| 4237 | uint res = dst - src;
|
---|
| 4238 |
|
---|
| 4239 | FLAG_N = NFLAG_8(res);
|
---|
| 4240 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 4241 | FLAG_V = VFLAG_SUB_8(src, dst, res);
|
---|
| 4242 | FLAG_C = CFLAG_8(res);
|
---|
| 4243 | }
|
---|
| 4244 |
|
---|
| 4245 |
|
---|
| 4246 | M68KMAKE_OP(cmpm, 8, ., ay7)
|
---|
| 4247 | {
|
---|
| 4248 | uint src = OPER_A7_PI_8();
|
---|
| 4249 | uint dst = OPER_AX_PI_8();
|
---|
| 4250 | uint res = dst - src;
|
---|
| 4251 |
|
---|
| 4252 | FLAG_N = NFLAG_8(res);
|
---|
| 4253 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 4254 | FLAG_V = VFLAG_SUB_8(src, dst, res);
|
---|
| 4255 | FLAG_C = CFLAG_8(res);
|
---|
| 4256 | }
|
---|
| 4257 |
|
---|
| 4258 |
|
---|
| 4259 | M68KMAKE_OP(cmpm, 8, ., axy7)
|
---|
| 4260 | {
|
---|
| 4261 | uint src = OPER_A7_PI_8();
|
---|
| 4262 | uint dst = OPER_A7_PI_8();
|
---|
| 4263 | uint res = dst - src;
|
---|
| 4264 |
|
---|
| 4265 | FLAG_N = NFLAG_8(res);
|
---|
| 4266 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 4267 | FLAG_V = VFLAG_SUB_8(src, dst, res);
|
---|
| 4268 | FLAG_C = CFLAG_8(res);
|
---|
| 4269 | }
|
---|
| 4270 |
|
---|
| 4271 |
|
---|
| 4272 | M68KMAKE_OP(cmpm, 8, ., .)
|
---|
| 4273 | {
|
---|
| 4274 | uint src = OPER_AY_PI_8();
|
---|
| 4275 | uint dst = OPER_AX_PI_8();
|
---|
| 4276 | uint res = dst - src;
|
---|
| 4277 |
|
---|
| 4278 | FLAG_N = NFLAG_8(res);
|
---|
| 4279 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 4280 | FLAG_V = VFLAG_SUB_8(src, dst, res);
|
---|
| 4281 | FLAG_C = CFLAG_8(res);
|
---|
| 4282 | }
|
---|
| 4283 |
|
---|
| 4284 |
|
---|
| 4285 | M68KMAKE_OP(cmpm, 16, ., .)
|
---|
| 4286 | {
|
---|
| 4287 | uint src = OPER_AY_PI_16();
|
---|
| 4288 | uint dst = OPER_AX_PI_16();
|
---|
| 4289 | uint res = dst - src;
|
---|
| 4290 |
|
---|
| 4291 | FLAG_N = NFLAG_16(res);
|
---|
| 4292 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 4293 | FLAG_V = VFLAG_SUB_16(src, dst, res);
|
---|
| 4294 | FLAG_C = CFLAG_16(res);
|
---|
| 4295 | }
|
---|
| 4296 |
|
---|
| 4297 |
|
---|
| 4298 | M68KMAKE_OP(cmpm, 32, ., .)
|
---|
| 4299 | {
|
---|
| 4300 | uint src = OPER_AY_PI_32();
|
---|
| 4301 | uint dst = OPER_AX_PI_32();
|
---|
| 4302 | uint res = dst - src;
|
---|
| 4303 |
|
---|
| 4304 | FLAG_N = NFLAG_32(res);
|
---|
| 4305 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 4306 | FLAG_V = VFLAG_SUB_32(src, dst, res);
|
---|
| 4307 | FLAG_C = CFLAG_SUB_32(src, dst, res);
|
---|
| 4308 | }
|
---|
| 4309 |
|
---|
| 4310 |
|
---|
| 4311 | M68KMAKE_OP(cpbcc, 32, ., .)
|
---|
| 4312 | {
|
---|
| 4313 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 4314 | {
|
---|
| 4315 | M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
|
---|
| 4316 | m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
|
---|
| 4317 | m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
|
---|
| 4318 | return;
|
---|
| 4319 | }
|
---|
| 4320 | m68ki_exception_1111();
|
---|
| 4321 | }
|
---|
| 4322 |
|
---|
| 4323 |
|
---|
| 4324 | M68KMAKE_OP(cpdbcc, 32, ., .)
|
---|
| 4325 | {
|
---|
| 4326 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 4327 | {
|
---|
| 4328 | M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
|
---|
| 4329 | m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
|
---|
| 4330 | m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
|
---|
| 4331 | return;
|
---|
| 4332 | }
|
---|
| 4333 | m68ki_exception_1111();
|
---|
| 4334 | }
|
---|
| 4335 |
|
---|
| 4336 |
|
---|
| 4337 | M68KMAKE_OP(cpgen, 32, ., .)
|
---|
| 4338 | {
|
---|
| 4339 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 4340 | {
|
---|
| 4341 | M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
|
---|
| 4342 | m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
|
---|
| 4343 | m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
|
---|
| 4344 | return;
|
---|
| 4345 | }
|
---|
| 4346 | m68ki_exception_1111();
|
---|
| 4347 | }
|
---|
| 4348 |
|
---|
| 4349 |
|
---|
| 4350 | M68KMAKE_OP(cpscc, 32, ., .)
|
---|
| 4351 | {
|
---|
| 4352 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 4353 | {
|
---|
| 4354 | M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
|
---|
| 4355 | m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
|
---|
| 4356 | m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
|
---|
| 4357 | return;
|
---|
| 4358 | }
|
---|
| 4359 | m68ki_exception_1111();
|
---|
| 4360 | }
|
---|
| 4361 |
|
---|
| 4362 |
|
---|
| 4363 | M68KMAKE_OP(cptrapcc, 32, ., .)
|
---|
| 4364 | {
|
---|
| 4365 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 4366 | {
|
---|
| 4367 | M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
|
---|
| 4368 | m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
|
---|
| 4369 | m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
|
---|
| 4370 | return;
|
---|
| 4371 | }
|
---|
| 4372 | m68ki_exception_1111();
|
---|
| 4373 | }
|
---|
| 4374 |
|
---|
| 4375 |
|
---|
| 4376 | M68KMAKE_OP(dbt, 16, ., .)
|
---|
| 4377 | {
|
---|
| 4378 | REG_PC += 2;
|
---|
| 4379 | }
|
---|
| 4380 |
|
---|
| 4381 |
|
---|
| 4382 | M68KMAKE_OP(dbf, 16, ., .)
|
---|
| 4383 | {
|
---|
| 4384 | uint* r_dst = &DY;
|
---|
| 4385 | uint res = MASK_OUT_ABOVE_16(*r_dst - 1);
|
---|
| 4386 |
|
---|
| 4387 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
|
---|
| 4388 | if(res != 0xffff)
|
---|
| 4389 | {
|
---|
| 4390 | uint offset = OPER_I_16();
|
---|
| 4391 | REG_PC -= 2;
|
---|
| 4392 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 4393 | m68ki_branch_16(offset);
|
---|
| 4394 | USE_CYCLES(CYC_DBCC_F_NOEXP);
|
---|
| 4395 | return;
|
---|
| 4396 | }
|
---|
| 4397 | REG_PC += 2;
|
---|
| 4398 | USE_CYCLES(CYC_DBCC_F_EXP);
|
---|
| 4399 | }
|
---|
| 4400 |
|
---|
| 4401 |
|
---|
| 4402 | M68KMAKE_OP(dbcc, 16, ., .)
|
---|
| 4403 | {
|
---|
| 4404 | if(M68KMAKE_NOT_CC)
|
---|
| 4405 | {
|
---|
| 4406 | uint* r_dst = &DY;
|
---|
| 4407 | uint res = MASK_OUT_ABOVE_16(*r_dst - 1);
|
---|
| 4408 |
|
---|
| 4409 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
|
---|
| 4410 | if(res != 0xffff)
|
---|
| 4411 | {
|
---|
| 4412 | uint offset = OPER_I_16();
|
---|
| 4413 | REG_PC -= 2;
|
---|
| 4414 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 4415 | m68ki_branch_16(offset);
|
---|
| 4416 | USE_CYCLES(CYC_DBCC_F_NOEXP);
|
---|
| 4417 | return;
|
---|
| 4418 | }
|
---|
| 4419 | REG_PC += 2;
|
---|
| 4420 | USE_CYCLES(CYC_DBCC_F_EXP);
|
---|
| 4421 | return;
|
---|
| 4422 | }
|
---|
| 4423 | REG_PC += 2;
|
---|
| 4424 | }
|
---|
| 4425 |
|
---|
| 4426 |
|
---|
| 4427 | M68KMAKE_OP(divs, 16, ., d)
|
---|
| 4428 | {
|
---|
| 4429 | uint* r_dst = &DX;
|
---|
| 4430 | sint src = MAKE_INT_16(DY);
|
---|
| 4431 | sint quotient;
|
---|
| 4432 | sint remainder;
|
---|
| 4433 |
|
---|
| 4434 | if(src != 0)
|
---|
| 4435 | {
|
---|
| 4436 | if((uint32)*r_dst == 0x80000000 && src == -1)
|
---|
| 4437 | {
|
---|
| 4438 | FLAG_Z = 0;
|
---|
| 4439 | FLAG_N = NFLAG_CLEAR;
|
---|
| 4440 | FLAG_V = VFLAG_CLEAR;
|
---|
| 4441 | FLAG_C = CFLAG_CLEAR;
|
---|
| 4442 | *r_dst = 0;
|
---|
| 4443 | return;
|
---|
| 4444 | }
|
---|
| 4445 |
|
---|
| 4446 | quotient = MAKE_INT_32(*r_dst) / src;
|
---|
| 4447 | remainder = MAKE_INT_32(*r_dst) % src;
|
---|
| 4448 |
|
---|
| 4449 | if(quotient == MAKE_INT_16(quotient))
|
---|
| 4450 | {
|
---|
| 4451 | FLAG_Z = quotient;
|
---|
| 4452 | FLAG_N = NFLAG_16(quotient);
|
---|
| 4453 | FLAG_V = VFLAG_CLEAR;
|
---|
| 4454 | FLAG_C = CFLAG_CLEAR;
|
---|
| 4455 | *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
|
---|
| 4456 | return;
|
---|
| 4457 | }
|
---|
| 4458 | FLAG_V = VFLAG_SET;
|
---|
| 4459 | return;
|
---|
| 4460 | }
|
---|
| 4461 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
|
---|
| 4462 | }
|
---|
| 4463 |
|
---|
| 4464 |
|
---|
| 4465 | M68KMAKE_OP(divs, 16, ., .)
|
---|
| 4466 | {
|
---|
| 4467 | uint* r_dst = &DX;
|
---|
| 4468 | sint src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
|
---|
| 4469 | sint quotient;
|
---|
| 4470 | sint remainder;
|
---|
| 4471 |
|
---|
| 4472 | if(src != 0)
|
---|
| 4473 | {
|
---|
| 4474 | if((uint32)*r_dst == 0x80000000 && src == -1)
|
---|
| 4475 | {
|
---|
| 4476 | FLAG_Z = 0;
|
---|
| 4477 | FLAG_N = NFLAG_CLEAR;
|
---|
| 4478 | FLAG_V = VFLAG_CLEAR;
|
---|
| 4479 | FLAG_C = CFLAG_CLEAR;
|
---|
| 4480 | *r_dst = 0;
|
---|
| 4481 | return;
|
---|
| 4482 | }
|
---|
| 4483 |
|
---|
| 4484 | quotient = MAKE_INT_32(*r_dst) / src;
|
---|
| 4485 | remainder = MAKE_INT_32(*r_dst) % src;
|
---|
| 4486 |
|
---|
| 4487 | if(quotient == MAKE_INT_16(quotient))
|
---|
| 4488 | {
|
---|
| 4489 | FLAG_Z = quotient;
|
---|
| 4490 | FLAG_N = NFLAG_16(quotient);
|
---|
| 4491 | FLAG_V = VFLAG_CLEAR;
|
---|
| 4492 | FLAG_C = CFLAG_CLEAR;
|
---|
| 4493 | *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
|
---|
| 4494 | return;
|
---|
| 4495 | }
|
---|
| 4496 | FLAG_V = VFLAG_SET;
|
---|
| 4497 | return;
|
---|
| 4498 | }
|
---|
| 4499 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
|
---|
| 4500 | }
|
---|
| 4501 |
|
---|
| 4502 |
|
---|
| 4503 | M68KMAKE_OP(divu, 16, ., d)
|
---|
| 4504 | {
|
---|
| 4505 | uint* r_dst = &DX;
|
---|
| 4506 | uint src = MASK_OUT_ABOVE_16(DY);
|
---|
| 4507 |
|
---|
| 4508 | if(src != 0)
|
---|
| 4509 | {
|
---|
| 4510 | uint quotient = *r_dst / src;
|
---|
| 4511 | uint remainder = *r_dst % src;
|
---|
| 4512 |
|
---|
| 4513 | if(quotient < 0x10000)
|
---|
| 4514 | {
|
---|
| 4515 | FLAG_Z = quotient;
|
---|
| 4516 | FLAG_N = NFLAG_16(quotient);
|
---|
| 4517 | FLAG_V = VFLAG_CLEAR;
|
---|
| 4518 | FLAG_C = CFLAG_CLEAR;
|
---|
| 4519 | *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
|
---|
| 4520 | return;
|
---|
| 4521 | }
|
---|
| 4522 | FLAG_V = VFLAG_SET;
|
---|
| 4523 | return;
|
---|
| 4524 | }
|
---|
| 4525 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
|
---|
| 4526 | }
|
---|
| 4527 |
|
---|
| 4528 |
|
---|
| 4529 | M68KMAKE_OP(divu, 16, ., .)
|
---|
| 4530 | {
|
---|
| 4531 | uint* r_dst = &DX;
|
---|
| 4532 | uint src = M68KMAKE_GET_OPER_AY_16;
|
---|
| 4533 |
|
---|
| 4534 | if(src != 0)
|
---|
| 4535 | {
|
---|
| 4536 | uint quotient = *r_dst / src;
|
---|
| 4537 | uint remainder = *r_dst % src;
|
---|
| 4538 |
|
---|
| 4539 | if(quotient < 0x10000)
|
---|
| 4540 | {
|
---|
| 4541 | FLAG_Z = quotient;
|
---|
| 4542 | FLAG_N = NFLAG_16(quotient);
|
---|
| 4543 | FLAG_V = VFLAG_CLEAR;
|
---|
| 4544 | FLAG_C = CFLAG_CLEAR;
|
---|
| 4545 | *r_dst = MASK_OUT_ABOVE_32(MASK_OUT_ABOVE_16(quotient) | (remainder << 16));
|
---|
| 4546 | return;
|
---|
| 4547 | }
|
---|
| 4548 | FLAG_V = VFLAG_SET;
|
---|
| 4549 | return;
|
---|
| 4550 | }
|
---|
| 4551 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
|
---|
| 4552 | }
|
---|
| 4553 |
|
---|
| 4554 |
|
---|
| 4555 | M68KMAKE_OP(divl, 32, ., d)
|
---|
| 4556 | {
|
---|
| 4557 | #if M68K_USE_64_BIT
|
---|
| 4558 |
|
---|
| 4559 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 4560 | {
|
---|
| 4561 | uint word2 = OPER_I_16();
|
---|
| 4562 | uint64 divisor = DY;
|
---|
| 4563 | uint64 dividend = 0;
|
---|
| 4564 | uint64 quotient = 0;
|
---|
| 4565 | uint64 remainder = 0;
|
---|
| 4566 |
|
---|
| 4567 | if(divisor != 0)
|
---|
| 4568 | {
|
---|
| 4569 | if(BIT_A(word2)) /* 64 bit */
|
---|
| 4570 | {
|
---|
| 4571 | dividend = REG_D[word2 & 7];
|
---|
| 4572 | dividend <<= 32;
|
---|
| 4573 | dividend |= REG_D[(word2 >> 12) & 7];
|
---|
| 4574 |
|
---|
| 4575 | if(BIT_B(word2)) /* signed */
|
---|
| 4576 | {
|
---|
| 4577 | quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));
|
---|
| 4578 | remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));
|
---|
| 4579 | if((sint64)quotient != (sint64)((sint32)quotient))
|
---|
| 4580 | {
|
---|
| 4581 | FLAG_V = VFLAG_SET;
|
---|
| 4582 | return;
|
---|
| 4583 | }
|
---|
| 4584 | }
|
---|
| 4585 | else /* unsigned */
|
---|
| 4586 | {
|
---|
| 4587 | quotient = dividend / divisor;
|
---|
| 4588 | if(quotient > 0xffffffff)
|
---|
| 4589 | {
|
---|
| 4590 | FLAG_V = VFLAG_SET;
|
---|
| 4591 | return;
|
---|
| 4592 | }
|
---|
| 4593 | remainder = dividend % divisor;
|
---|
| 4594 | }
|
---|
| 4595 | }
|
---|
| 4596 | else /* 32 bit */
|
---|
| 4597 | {
|
---|
| 4598 | dividend = REG_D[(word2 >> 12) & 7];
|
---|
| 4599 | if(BIT_B(word2)) /* signed */
|
---|
| 4600 | {
|
---|
| 4601 | quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));
|
---|
| 4602 | remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));
|
---|
| 4603 | }
|
---|
| 4604 | else /* unsigned */
|
---|
| 4605 | {
|
---|
| 4606 | quotient = dividend / divisor;
|
---|
| 4607 | remainder = dividend % divisor;
|
---|
| 4608 | }
|
---|
| 4609 | }
|
---|
| 4610 |
|
---|
| 4611 | REG_D[word2 & 7] = remainder;
|
---|
| 4612 | REG_D[(word2 >> 12) & 7] = quotient;
|
---|
| 4613 |
|
---|
| 4614 | FLAG_N = NFLAG_32(quotient);
|
---|
| 4615 | FLAG_Z = quotient;
|
---|
| 4616 | FLAG_V = VFLAG_CLEAR;
|
---|
| 4617 | FLAG_C = CFLAG_CLEAR;
|
---|
| 4618 | return;
|
---|
| 4619 | }
|
---|
| 4620 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
|
---|
| 4621 | return;
|
---|
| 4622 | }
|
---|
| 4623 | m68ki_exception_illegal();
|
---|
| 4624 |
|
---|
| 4625 | #else
|
---|
| 4626 |
|
---|
| 4627 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 4628 | {
|
---|
| 4629 | uint word2 = OPER_I_16();
|
---|
| 4630 | uint divisor = DY;
|
---|
| 4631 | uint dividend_hi = REG_D[word2 & 7];
|
---|
| 4632 | uint dividend_lo = REG_D[(word2 >> 12) & 7];
|
---|
| 4633 | uint quotient = 0;
|
---|
| 4634 | uint remainder = 0;
|
---|
| 4635 | uint dividend_neg = 0;
|
---|
| 4636 | uint divisor_neg = 0;
|
---|
| 4637 | sint i;
|
---|
| 4638 | uint overflow;
|
---|
| 4639 |
|
---|
| 4640 | if(divisor != 0)
|
---|
| 4641 | {
|
---|
| 4642 | /* quad / long : long quotient, long remainder */
|
---|
| 4643 | if(BIT_A(word2))
|
---|
| 4644 | {
|
---|
| 4645 | if(BIT_B(word2)) /* signed */
|
---|
| 4646 | {
|
---|
| 4647 | /* special case in signed divide */
|
---|
| 4648 | if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)
|
---|
| 4649 | {
|
---|
| 4650 | REG_D[word2 & 7] = 0;
|
---|
| 4651 | REG_D[(word2 >> 12) & 7] = 0x80000000;
|
---|
| 4652 |
|
---|
| 4653 | FLAG_N = NFLAG_SET;
|
---|
| 4654 | FLAG_Z = ZFLAG_CLEAR;
|
---|
| 4655 | FLAG_V = VFLAG_CLEAR;
|
---|
| 4656 | FLAG_C = CFLAG_CLEAR;
|
---|
| 4657 | return;
|
---|
| 4658 | }
|
---|
| 4659 | if(GET_MSB_32(dividend_hi))
|
---|
| 4660 | {
|
---|
| 4661 | dividend_neg = 1;
|
---|
| 4662 | dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));
|
---|
| 4663 | dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);
|
---|
| 4664 | }
|
---|
| 4665 | if(GET_MSB_32(divisor))
|
---|
| 4666 | {
|
---|
| 4667 | divisor_neg = 1;
|
---|
| 4668 | divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);
|
---|
| 4669 |
|
---|
| 4670 | }
|
---|
| 4671 | }
|
---|
| 4672 |
|
---|
| 4673 | /* if the upper long is greater than the divisor, we're overflowing. */
|
---|
| 4674 | if(dividend_hi >= divisor)
|
---|
| 4675 | {
|
---|
| 4676 | FLAG_V = VFLAG_SET;
|
---|
| 4677 | return;
|
---|
| 4678 | }
|
---|
| 4679 |
|
---|
| 4680 | for(i = 31; i >= 0; i--)
|
---|
| 4681 | {
|
---|
| 4682 | quotient <<= 1;
|
---|
| 4683 | remainder = (remainder << 1) + ((dividend_hi >> i) & 1);
|
---|
| 4684 | if(remainder >= divisor)
|
---|
| 4685 | {
|
---|
| 4686 | remainder -= divisor;
|
---|
| 4687 | quotient++;
|
---|
| 4688 | }
|
---|
| 4689 | }
|
---|
| 4690 | for(i = 31; i >= 0; i--)
|
---|
| 4691 | {
|
---|
| 4692 | quotient <<= 1;
|
---|
| 4693 | overflow = GET_MSB_32(remainder);
|
---|
| 4694 | remainder = (remainder << 1) + ((dividend_lo >> i) & 1);
|
---|
| 4695 | if(remainder >= divisor || overflow)
|
---|
| 4696 | {
|
---|
| 4697 | remainder -= divisor;
|
---|
| 4698 | quotient++;
|
---|
| 4699 | }
|
---|
| 4700 | }
|
---|
| 4701 |
|
---|
| 4702 | if(BIT_B(word2)) /* signed */
|
---|
| 4703 | {
|
---|
| 4704 | if(quotient > 0x7fffffff)
|
---|
| 4705 | {
|
---|
| 4706 | FLAG_V = VFLAG_SET;
|
---|
| 4707 | return;
|
---|
| 4708 | }
|
---|
| 4709 | if(dividend_neg)
|
---|
| 4710 | {
|
---|
| 4711 | remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);
|
---|
| 4712 | quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
|
---|
| 4713 | }
|
---|
| 4714 | if(divisor_neg)
|
---|
| 4715 | quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
|
---|
| 4716 | }
|
---|
| 4717 |
|
---|
| 4718 | REG_D[word2 & 7] = remainder;
|
---|
| 4719 | REG_D[(word2 >> 12) & 7] = quotient;
|
---|
| 4720 |
|
---|
| 4721 | FLAG_N = NFLAG_32(quotient);
|
---|
| 4722 | FLAG_Z = quotient;
|
---|
| 4723 | FLAG_V = VFLAG_CLEAR;
|
---|
| 4724 | FLAG_C = CFLAG_CLEAR;
|
---|
| 4725 | return;
|
---|
| 4726 | }
|
---|
| 4727 |
|
---|
| 4728 | /* long / long: long quotient, maybe long remainder */
|
---|
| 4729 | if(BIT_B(word2)) /* signed */
|
---|
| 4730 | {
|
---|
| 4731 | /* Special case in divide */
|
---|
| 4732 | if(dividend_lo == 0x80000000 && divisor == 0xffffffff)
|
---|
| 4733 | {
|
---|
| 4734 | FLAG_N = NFLAG_SET;
|
---|
| 4735 | FLAG_Z = ZFLAG_CLEAR;
|
---|
| 4736 | FLAG_V = VFLAG_CLEAR;
|
---|
| 4737 | FLAG_C = CFLAG_CLEAR;
|
---|
| 4738 | REG_D[(word2 >> 12) & 7] = 0x80000000;
|
---|
| 4739 | REG_D[word2 & 7] = 0;
|
---|
| 4740 | return;
|
---|
| 4741 | }
|
---|
| 4742 | REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);
|
---|
| 4743 | quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);
|
---|
| 4744 | }
|
---|
| 4745 | else
|
---|
| 4746 | {
|
---|
| 4747 | REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);
|
---|
| 4748 | quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);
|
---|
| 4749 | }
|
---|
| 4750 |
|
---|
| 4751 | FLAG_N = NFLAG_32(quotient);
|
---|
| 4752 | FLAG_Z = quotient;
|
---|
| 4753 | FLAG_V = VFLAG_CLEAR;
|
---|
| 4754 | FLAG_C = CFLAG_CLEAR;
|
---|
| 4755 | return;
|
---|
| 4756 | }
|
---|
| 4757 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
|
---|
| 4758 | return;
|
---|
| 4759 | }
|
---|
| 4760 | m68ki_exception_illegal();
|
---|
| 4761 |
|
---|
| 4762 | #endif
|
---|
| 4763 | }
|
---|
| 4764 |
|
---|
| 4765 |
|
---|
| 4766 | M68KMAKE_OP(divl, 32, ., .)
|
---|
| 4767 | {
|
---|
| 4768 | #if M68K_USE_64_BIT
|
---|
| 4769 |
|
---|
| 4770 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 4771 | {
|
---|
| 4772 | uint word2 = OPER_I_16();
|
---|
| 4773 | uint64 divisor = M68KMAKE_GET_OPER_AY_32;
|
---|
| 4774 | uint64 dividend = 0;
|
---|
| 4775 | uint64 quotient = 0;
|
---|
| 4776 | uint64 remainder = 0;
|
---|
| 4777 |
|
---|
| 4778 | if(divisor != 0)
|
---|
| 4779 | {
|
---|
| 4780 | if(BIT_A(word2)) /* 64 bit */
|
---|
| 4781 | {
|
---|
| 4782 | dividend = REG_D[word2 & 7];
|
---|
| 4783 | dividend <<= 32;
|
---|
| 4784 | dividend |= REG_D[(word2 >> 12) & 7];
|
---|
| 4785 |
|
---|
| 4786 | if(BIT_B(word2)) /* signed */
|
---|
| 4787 | {
|
---|
| 4788 | quotient = (uint64)((sint64)dividend / (sint64)((sint32)divisor));
|
---|
| 4789 | remainder = (uint64)((sint64)dividend % (sint64)((sint32)divisor));
|
---|
| 4790 | if((sint64)quotient != (sint64)((sint32)quotient))
|
---|
| 4791 | {
|
---|
| 4792 | FLAG_V = VFLAG_SET;
|
---|
| 4793 | return;
|
---|
| 4794 | }
|
---|
| 4795 | }
|
---|
| 4796 | else /* unsigned */
|
---|
| 4797 | {
|
---|
| 4798 | quotient = dividend / divisor;
|
---|
| 4799 | if(quotient > 0xffffffff)
|
---|
| 4800 | {
|
---|
| 4801 | FLAG_V = VFLAG_SET;
|
---|
| 4802 | return;
|
---|
| 4803 | }
|
---|
| 4804 | remainder = dividend % divisor;
|
---|
| 4805 | }
|
---|
| 4806 | }
|
---|
| 4807 | else /* 32 bit */
|
---|
| 4808 | {
|
---|
| 4809 | dividend = REG_D[(word2 >> 12) & 7];
|
---|
| 4810 | if(BIT_B(word2)) /* signed */
|
---|
| 4811 | {
|
---|
| 4812 | quotient = (uint64)((sint64)((sint32)dividend) / (sint64)((sint32)divisor));
|
---|
| 4813 | remainder = (uint64)((sint64)((sint32)dividend) % (sint64)((sint32)divisor));
|
---|
| 4814 | }
|
---|
| 4815 | else /* unsigned */
|
---|
| 4816 | {
|
---|
| 4817 | quotient = dividend / divisor;
|
---|
| 4818 | remainder = dividend % divisor;
|
---|
| 4819 | }
|
---|
| 4820 | }
|
---|
| 4821 |
|
---|
| 4822 | REG_D[word2 & 7] = remainder;
|
---|
| 4823 | REG_D[(word2 >> 12) & 7] = quotient;
|
---|
| 4824 |
|
---|
| 4825 | FLAG_N = NFLAG_32(quotient);
|
---|
| 4826 | FLAG_Z = quotient;
|
---|
| 4827 | FLAG_V = VFLAG_CLEAR;
|
---|
| 4828 | FLAG_C = CFLAG_CLEAR;
|
---|
| 4829 | return;
|
---|
| 4830 | }
|
---|
| 4831 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
|
---|
| 4832 | return;
|
---|
| 4833 | }
|
---|
| 4834 | m68ki_exception_illegal();
|
---|
| 4835 |
|
---|
| 4836 | #else
|
---|
| 4837 |
|
---|
| 4838 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 4839 | {
|
---|
| 4840 | uint word2 = OPER_I_16();
|
---|
| 4841 | uint divisor = M68KMAKE_GET_OPER_AY_32;
|
---|
| 4842 | uint dividend_hi = REG_D[word2 & 7];
|
---|
| 4843 | uint dividend_lo = REG_D[(word2 >> 12) & 7];
|
---|
| 4844 | uint quotient = 0;
|
---|
| 4845 | uint remainder = 0;
|
---|
| 4846 | uint dividend_neg = 0;
|
---|
| 4847 | uint divisor_neg = 0;
|
---|
| 4848 | sint i;
|
---|
| 4849 | uint overflow;
|
---|
| 4850 |
|
---|
| 4851 | if(divisor != 0)
|
---|
| 4852 | {
|
---|
| 4853 | /* quad / long : long quotient, long remainder */
|
---|
| 4854 | if(BIT_A(word2))
|
---|
| 4855 | {
|
---|
| 4856 | if(BIT_B(word2)) /* signed */
|
---|
| 4857 | {
|
---|
| 4858 | /* special case in signed divide */
|
---|
| 4859 | if(dividend_hi == 0 && dividend_lo == 0x80000000 && divisor == 0xffffffff)
|
---|
| 4860 | {
|
---|
| 4861 | REG_D[word2 & 7] = 0;
|
---|
| 4862 | REG_D[(word2 >> 12) & 7] = 0x80000000;
|
---|
| 4863 |
|
---|
| 4864 | FLAG_N = NFLAG_SET;
|
---|
| 4865 | FLAG_Z = ZFLAG_CLEAR;
|
---|
| 4866 | FLAG_V = VFLAG_CLEAR;
|
---|
| 4867 | FLAG_C = CFLAG_CLEAR;
|
---|
| 4868 | return;
|
---|
| 4869 | }
|
---|
| 4870 | if(GET_MSB_32(dividend_hi))
|
---|
| 4871 | {
|
---|
| 4872 | dividend_neg = 1;
|
---|
| 4873 | dividend_hi = (uint)MASK_OUT_ABOVE_32((-(sint)dividend_hi) - (dividend_lo != 0));
|
---|
| 4874 | dividend_lo = (uint)MASK_OUT_ABOVE_32(-(sint)dividend_lo);
|
---|
| 4875 | }
|
---|
| 4876 | if(GET_MSB_32(divisor))
|
---|
| 4877 | {
|
---|
| 4878 | divisor_neg = 1;
|
---|
| 4879 | divisor = (uint)MASK_OUT_ABOVE_32(-(sint)divisor);
|
---|
| 4880 |
|
---|
| 4881 | }
|
---|
| 4882 | }
|
---|
| 4883 |
|
---|
| 4884 | /* if the upper long is greater than the divisor, we're overflowing. */
|
---|
| 4885 | if(dividend_hi >= divisor)
|
---|
| 4886 | {
|
---|
| 4887 | FLAG_V = VFLAG_SET;
|
---|
| 4888 | return;
|
---|
| 4889 | }
|
---|
| 4890 |
|
---|
| 4891 | for(i = 31; i >= 0; i--)
|
---|
| 4892 | {
|
---|
| 4893 | quotient <<= 1;
|
---|
| 4894 | remainder = (remainder << 1) + ((dividend_hi >> i) & 1);
|
---|
| 4895 | if(remainder >= divisor)
|
---|
| 4896 | {
|
---|
| 4897 | remainder -= divisor;
|
---|
| 4898 | quotient++;
|
---|
| 4899 | }
|
---|
| 4900 | }
|
---|
| 4901 | for(i = 31; i >= 0; i--)
|
---|
| 4902 | {
|
---|
| 4903 | quotient <<= 1;
|
---|
| 4904 | overflow = GET_MSB_32(remainder);
|
---|
| 4905 | remainder = (remainder << 1) + ((dividend_lo >> i) & 1);
|
---|
| 4906 | if(remainder >= divisor || overflow)
|
---|
| 4907 | {
|
---|
| 4908 | remainder -= divisor;
|
---|
| 4909 | quotient++;
|
---|
| 4910 | }
|
---|
| 4911 | }
|
---|
| 4912 |
|
---|
| 4913 | if(BIT_B(word2)) /* signed */
|
---|
| 4914 | {
|
---|
| 4915 | if(quotient > 0x7fffffff)
|
---|
| 4916 | {
|
---|
| 4917 | FLAG_V = VFLAG_SET;
|
---|
| 4918 | return;
|
---|
| 4919 | }
|
---|
| 4920 | if(dividend_neg)
|
---|
| 4921 | {
|
---|
| 4922 | remainder = (uint)MASK_OUT_ABOVE_32(-(sint)remainder);
|
---|
| 4923 | quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
|
---|
| 4924 | }
|
---|
| 4925 | if(divisor_neg)
|
---|
| 4926 | quotient = (uint)MASK_OUT_ABOVE_32(-(sint)quotient);
|
---|
| 4927 | }
|
---|
| 4928 |
|
---|
| 4929 | REG_D[word2 & 7] = remainder;
|
---|
| 4930 | REG_D[(word2 >> 12) & 7] = quotient;
|
---|
| 4931 |
|
---|
| 4932 | FLAG_N = NFLAG_32(quotient);
|
---|
| 4933 | FLAG_Z = quotient;
|
---|
| 4934 | FLAG_V = VFLAG_CLEAR;
|
---|
| 4935 | FLAG_C = CFLAG_CLEAR;
|
---|
| 4936 | return;
|
---|
| 4937 | }
|
---|
| 4938 |
|
---|
| 4939 | /* long / long: long quotient, maybe long remainder */
|
---|
| 4940 | if(BIT_B(word2)) /* signed */
|
---|
| 4941 | {
|
---|
| 4942 | /* Special case in divide */
|
---|
| 4943 | if(dividend_lo == 0x80000000 && divisor == 0xffffffff)
|
---|
| 4944 | {
|
---|
| 4945 | FLAG_N = NFLAG_SET;
|
---|
| 4946 | FLAG_Z = ZFLAG_CLEAR;
|
---|
| 4947 | FLAG_V = VFLAG_CLEAR;
|
---|
| 4948 | FLAG_C = CFLAG_CLEAR;
|
---|
| 4949 | REG_D[(word2 >> 12) & 7] = 0x80000000;
|
---|
| 4950 | REG_D[word2 & 7] = 0;
|
---|
| 4951 | return;
|
---|
| 4952 | }
|
---|
| 4953 | REG_D[word2 & 7] = MAKE_INT_32(dividend_lo) % MAKE_INT_32(divisor);
|
---|
| 4954 | quotient = REG_D[(word2 >> 12) & 7] = MAKE_INT_32(dividend_lo) / MAKE_INT_32(divisor);
|
---|
| 4955 | }
|
---|
| 4956 | else
|
---|
| 4957 | {
|
---|
| 4958 | REG_D[word2 & 7] = MASK_OUT_ABOVE_32(dividend_lo) % MASK_OUT_ABOVE_32(divisor);
|
---|
| 4959 | quotient = REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(dividend_lo) / MASK_OUT_ABOVE_32(divisor);
|
---|
| 4960 | }
|
---|
| 4961 |
|
---|
| 4962 | FLAG_N = NFLAG_32(quotient);
|
---|
| 4963 | FLAG_Z = quotient;
|
---|
| 4964 | FLAG_V = VFLAG_CLEAR;
|
---|
| 4965 | FLAG_C = CFLAG_CLEAR;
|
---|
| 4966 | return;
|
---|
| 4967 | }
|
---|
| 4968 | m68ki_exception_trap(EXCEPTION_ZERO_DIVIDE);
|
---|
| 4969 | return;
|
---|
| 4970 | }
|
---|
| 4971 | m68ki_exception_illegal();
|
---|
| 4972 |
|
---|
| 4973 | #endif
|
---|
| 4974 | }
|
---|
| 4975 |
|
---|
| 4976 |
|
---|
| 4977 | M68KMAKE_OP(eor, 8, ., d)
|
---|
| 4978 | {
|
---|
| 4979 | uint res = MASK_OUT_ABOVE_8(DY ^= MASK_OUT_ABOVE_8(DX));
|
---|
| 4980 |
|
---|
| 4981 | FLAG_N = NFLAG_8(res);
|
---|
| 4982 | FLAG_Z = res;
|
---|
| 4983 | FLAG_C = CFLAG_CLEAR;
|
---|
| 4984 | FLAG_V = VFLAG_CLEAR;
|
---|
| 4985 | }
|
---|
| 4986 |
|
---|
| 4987 |
|
---|
| 4988 | M68KMAKE_OP(eor, 8, ., .)
|
---|
| 4989 | {
|
---|
| 4990 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 4991 | uint res = MASK_OUT_ABOVE_8(DX ^ m68ki_read_8(ea));
|
---|
| 4992 |
|
---|
| 4993 | m68ki_write_8(ea, res);
|
---|
| 4994 |
|
---|
| 4995 | FLAG_N = NFLAG_8(res);
|
---|
| 4996 | FLAG_Z = res;
|
---|
| 4997 | FLAG_C = CFLAG_CLEAR;
|
---|
| 4998 | FLAG_V = VFLAG_CLEAR;
|
---|
| 4999 | }
|
---|
| 5000 |
|
---|
| 5001 |
|
---|
| 5002 | M68KMAKE_OP(eor, 16, ., d)
|
---|
| 5003 | {
|
---|
| 5004 | uint res = MASK_OUT_ABOVE_16(DY ^= MASK_OUT_ABOVE_16(DX));
|
---|
| 5005 |
|
---|
| 5006 | FLAG_N = NFLAG_16(res);
|
---|
| 5007 | FLAG_Z = res;
|
---|
| 5008 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5009 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5010 | }
|
---|
| 5011 |
|
---|
| 5012 |
|
---|
| 5013 | M68KMAKE_OP(eor, 16, ., .)
|
---|
| 5014 | {
|
---|
| 5015 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 5016 | uint res = MASK_OUT_ABOVE_16(DX ^ m68ki_read_16(ea));
|
---|
| 5017 |
|
---|
| 5018 | m68ki_write_16(ea, res);
|
---|
| 5019 |
|
---|
| 5020 | FLAG_N = NFLAG_16(res);
|
---|
| 5021 | FLAG_Z = res;
|
---|
| 5022 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5023 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5024 | }
|
---|
| 5025 |
|
---|
| 5026 |
|
---|
| 5027 | M68KMAKE_OP(eor, 32, ., d)
|
---|
| 5028 | {
|
---|
| 5029 | uint res = DY ^= DX;
|
---|
| 5030 |
|
---|
| 5031 | FLAG_N = NFLAG_32(res);
|
---|
| 5032 | FLAG_Z = res;
|
---|
| 5033 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5034 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5035 | }
|
---|
| 5036 |
|
---|
| 5037 |
|
---|
| 5038 | M68KMAKE_OP(eor, 32, ., .)
|
---|
| 5039 | {
|
---|
| 5040 | uint ea = M68KMAKE_GET_EA_AY_32;
|
---|
| 5041 | uint res = DX ^ m68ki_read_32(ea);
|
---|
| 5042 |
|
---|
| 5043 | m68ki_write_32(ea, res);
|
---|
| 5044 |
|
---|
| 5045 | FLAG_N = NFLAG_32(res);
|
---|
| 5046 | FLAG_Z = res;
|
---|
| 5047 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5048 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5049 | }
|
---|
| 5050 |
|
---|
| 5051 |
|
---|
| 5052 | M68KMAKE_OP(eori, 8, ., d)
|
---|
| 5053 | {
|
---|
| 5054 | uint res = MASK_OUT_ABOVE_8(DY ^= OPER_I_8());
|
---|
| 5055 |
|
---|
| 5056 | FLAG_N = NFLAG_8(res);
|
---|
| 5057 | FLAG_Z = res;
|
---|
| 5058 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5059 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5060 | }
|
---|
| 5061 |
|
---|
| 5062 |
|
---|
| 5063 | M68KMAKE_OP(eori, 8, ., .)
|
---|
| 5064 | {
|
---|
| 5065 | uint src = OPER_I_8();
|
---|
| 5066 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 5067 | uint res = src ^ m68ki_read_8(ea);
|
---|
| 5068 |
|
---|
| 5069 | m68ki_write_8(ea, res);
|
---|
| 5070 |
|
---|
| 5071 | FLAG_N = NFLAG_8(res);
|
---|
| 5072 | FLAG_Z = res;
|
---|
| 5073 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5074 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5075 | }
|
---|
| 5076 |
|
---|
| 5077 |
|
---|
| 5078 | M68KMAKE_OP(eori, 16, ., d)
|
---|
| 5079 | {
|
---|
| 5080 | uint res = MASK_OUT_ABOVE_16(DY ^= OPER_I_16());
|
---|
| 5081 |
|
---|
| 5082 | FLAG_N = NFLAG_16(res);
|
---|
| 5083 | FLAG_Z = res;
|
---|
| 5084 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5085 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5086 | }
|
---|
| 5087 |
|
---|
| 5088 |
|
---|
| 5089 | M68KMAKE_OP(eori, 16, ., .)
|
---|
| 5090 | {
|
---|
| 5091 | uint src = OPER_I_16();
|
---|
| 5092 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 5093 | uint res = src ^ m68ki_read_16(ea);
|
---|
| 5094 |
|
---|
| 5095 | m68ki_write_16(ea, res);
|
---|
| 5096 |
|
---|
| 5097 | FLAG_N = NFLAG_16(res);
|
---|
| 5098 | FLAG_Z = res;
|
---|
| 5099 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5100 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5101 | }
|
---|
| 5102 |
|
---|
| 5103 |
|
---|
| 5104 | M68KMAKE_OP(eori, 32, ., d)
|
---|
| 5105 | {
|
---|
| 5106 | uint res = DY ^= OPER_I_32();
|
---|
| 5107 |
|
---|
| 5108 | FLAG_N = NFLAG_32(res);
|
---|
| 5109 | FLAG_Z = res;
|
---|
| 5110 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5111 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5112 | }
|
---|
| 5113 |
|
---|
| 5114 |
|
---|
| 5115 | M68KMAKE_OP(eori, 32, ., .)
|
---|
| 5116 | {
|
---|
| 5117 | uint src = OPER_I_32();
|
---|
| 5118 | uint ea = M68KMAKE_GET_EA_AY_32;
|
---|
| 5119 | uint res = src ^ m68ki_read_32(ea);
|
---|
| 5120 |
|
---|
| 5121 | m68ki_write_32(ea, res);
|
---|
| 5122 |
|
---|
| 5123 | FLAG_N = NFLAG_32(res);
|
---|
| 5124 | FLAG_Z = res;
|
---|
| 5125 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5126 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5127 | }
|
---|
| 5128 |
|
---|
| 5129 |
|
---|
| 5130 | M68KMAKE_OP(eori, 16, toc, .)
|
---|
| 5131 | {
|
---|
| 5132 | m68ki_set_ccr(m68ki_get_ccr() ^ OPER_I_16());
|
---|
| 5133 | }
|
---|
| 5134 |
|
---|
| 5135 |
|
---|
| 5136 | M68KMAKE_OP(eori, 16, tos, .)
|
---|
| 5137 | {
|
---|
| 5138 | if(FLAG_S)
|
---|
| 5139 | {
|
---|
| 5140 | uint src = OPER_I_16();
|
---|
| 5141 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 5142 | m68ki_set_sr(m68ki_get_sr() ^ src);
|
---|
| 5143 | return;
|
---|
| 5144 | }
|
---|
| 5145 | m68ki_exception_privilege_violation();
|
---|
| 5146 | }
|
---|
| 5147 |
|
---|
| 5148 |
|
---|
| 5149 | M68KMAKE_OP(exg, 32, dd, .)
|
---|
| 5150 | {
|
---|
| 5151 | uint* reg_a = &DX;
|
---|
| 5152 | uint* reg_b = &DY;
|
---|
| 5153 | uint tmp = *reg_a;
|
---|
| 5154 | *reg_a = *reg_b;
|
---|
| 5155 | *reg_b = tmp;
|
---|
| 5156 | }
|
---|
| 5157 |
|
---|
| 5158 |
|
---|
| 5159 | M68KMAKE_OP(exg, 32, aa, .)
|
---|
| 5160 | {
|
---|
| 5161 | uint* reg_a = &AX;
|
---|
| 5162 | uint* reg_b = &AY;
|
---|
| 5163 | uint tmp = *reg_a;
|
---|
| 5164 | *reg_a = *reg_b;
|
---|
| 5165 | *reg_b = tmp;
|
---|
| 5166 | }
|
---|
| 5167 |
|
---|
| 5168 |
|
---|
| 5169 | M68KMAKE_OP(exg, 32, da, .)
|
---|
| 5170 | {
|
---|
| 5171 | uint* reg_a = &DX;
|
---|
| 5172 | uint* reg_b = &AY;
|
---|
| 5173 | uint tmp = *reg_a;
|
---|
| 5174 | *reg_a = *reg_b;
|
---|
| 5175 | *reg_b = tmp;
|
---|
| 5176 | }
|
---|
| 5177 |
|
---|
| 5178 |
|
---|
| 5179 | M68KMAKE_OP(ext, 16, ., .)
|
---|
| 5180 | {
|
---|
| 5181 | uint* r_dst = &DY;
|
---|
| 5182 |
|
---|
| 5183 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | MASK_OUT_ABOVE_8(*r_dst) | (GET_MSB_8(*r_dst) ? 0xff00 : 0);
|
---|
| 5184 |
|
---|
| 5185 | FLAG_N = NFLAG_16(*r_dst);
|
---|
| 5186 | FLAG_Z = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 5187 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5188 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5189 | }
|
---|
| 5190 |
|
---|
| 5191 |
|
---|
| 5192 | M68KMAKE_OP(ext, 32, ., .)
|
---|
| 5193 | {
|
---|
| 5194 | uint* r_dst = &DY;
|
---|
| 5195 |
|
---|
| 5196 | *r_dst = MASK_OUT_ABOVE_16(*r_dst) | (GET_MSB_16(*r_dst) ? 0xffff0000 : 0);
|
---|
| 5197 |
|
---|
| 5198 | FLAG_N = NFLAG_32(*r_dst);
|
---|
| 5199 | FLAG_Z = *r_dst;
|
---|
| 5200 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5201 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5202 | }
|
---|
| 5203 |
|
---|
| 5204 |
|
---|
| 5205 | M68KMAKE_OP(extb, 32, ., .)
|
---|
| 5206 | {
|
---|
| 5207 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 5208 | {
|
---|
| 5209 | uint* r_dst = &DY;
|
---|
| 5210 |
|
---|
| 5211 | *r_dst = MASK_OUT_ABOVE_8(*r_dst) | (GET_MSB_8(*r_dst) ? 0xffffff00 : 0);
|
---|
| 5212 |
|
---|
| 5213 | FLAG_N = NFLAG_32(*r_dst);
|
---|
| 5214 | FLAG_Z = *r_dst;
|
---|
| 5215 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5216 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5217 | return;
|
---|
| 5218 | }
|
---|
| 5219 | m68ki_exception_illegal();
|
---|
| 5220 | }
|
---|
| 5221 |
|
---|
| 5222 |
|
---|
| 5223 | M68KMAKE_OP(illegal, 0, ., .)
|
---|
| 5224 | {
|
---|
| 5225 | m68ki_exception_illegal();
|
---|
| 5226 | }
|
---|
| 5227 |
|
---|
| 5228 | M68KMAKE_OP(jmp, 32, ., .)
|
---|
| 5229 | {
|
---|
| 5230 | m68ki_jump(M68KMAKE_GET_EA_AY_32);
|
---|
| 5231 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 5232 | if(REG_PC == REG_PPC)
|
---|
| 5233 | USE_ALL_CYCLES();
|
---|
| 5234 | }
|
---|
| 5235 |
|
---|
| 5236 |
|
---|
| 5237 | M68KMAKE_OP(jsr, 32, ., .)
|
---|
| 5238 | {
|
---|
| 5239 | uint ea = M68KMAKE_GET_EA_AY_32;
|
---|
| 5240 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 5241 | m68ki_push_32(REG_PC);
|
---|
| 5242 | m68ki_jump(ea);
|
---|
| 5243 | }
|
---|
| 5244 |
|
---|
| 5245 |
|
---|
| 5246 | M68KMAKE_OP(lea, 32, ., .)
|
---|
| 5247 | {
|
---|
| 5248 | AX = M68KMAKE_GET_EA_AY_32;
|
---|
| 5249 | }
|
---|
| 5250 |
|
---|
| 5251 |
|
---|
| 5252 | M68KMAKE_OP(link, 16, ., a7)
|
---|
| 5253 | {
|
---|
| 5254 | REG_A[7] -= 4;
|
---|
| 5255 | m68ki_write_32(REG_A[7], REG_A[7]);
|
---|
| 5256 | REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16()));
|
---|
| 5257 | }
|
---|
| 5258 |
|
---|
| 5259 |
|
---|
| 5260 | M68KMAKE_OP(link, 16, ., .)
|
---|
| 5261 | {
|
---|
| 5262 | uint* r_dst = &AY;
|
---|
| 5263 |
|
---|
| 5264 | m68ki_push_32(*r_dst);
|
---|
| 5265 | *r_dst = REG_A[7];
|
---|
| 5266 | REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16()));
|
---|
| 5267 | }
|
---|
| 5268 |
|
---|
| 5269 |
|
---|
| 5270 | M68KMAKE_OP(link, 32, ., a7)
|
---|
| 5271 | {
|
---|
| 5272 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 5273 | {
|
---|
| 5274 | REG_A[7] -= 4;
|
---|
| 5275 | m68ki_write_32(REG_A[7], REG_A[7]);
|
---|
| 5276 | REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + OPER_I_32());
|
---|
| 5277 | return;
|
---|
| 5278 | }
|
---|
| 5279 | m68ki_exception_illegal();
|
---|
| 5280 | }
|
---|
| 5281 |
|
---|
| 5282 |
|
---|
| 5283 | M68KMAKE_OP(link, 32, ., .)
|
---|
| 5284 | {
|
---|
| 5285 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 5286 | {
|
---|
| 5287 | uint* r_dst = &AY;
|
---|
| 5288 |
|
---|
| 5289 | m68ki_push_32(*r_dst);
|
---|
| 5290 | *r_dst = REG_A[7];
|
---|
| 5291 | REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + OPER_I_32());
|
---|
| 5292 | return;
|
---|
| 5293 | }
|
---|
| 5294 | m68ki_exception_illegal();
|
---|
| 5295 | }
|
---|
| 5296 |
|
---|
| 5297 |
|
---|
| 5298 | M68KMAKE_OP(lsr, 8, s, .)
|
---|
| 5299 | {
|
---|
| 5300 | uint* r_dst = &DY;
|
---|
| 5301 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 5302 | uint src = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 5303 | uint res = src >> shift;
|
---|
| 5304 |
|
---|
| 5305 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
|
---|
| 5306 |
|
---|
| 5307 | FLAG_N = NFLAG_CLEAR;
|
---|
| 5308 | FLAG_Z = res;
|
---|
| 5309 | FLAG_X = FLAG_C = src << (9-shift);
|
---|
| 5310 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5311 | }
|
---|
| 5312 |
|
---|
| 5313 |
|
---|
| 5314 | M68KMAKE_OP(lsr, 16, s, .)
|
---|
| 5315 | {
|
---|
| 5316 | uint* r_dst = &DY;
|
---|
| 5317 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 5318 | uint src = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 5319 | uint res = src >> shift;
|
---|
| 5320 |
|
---|
| 5321 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
|
---|
| 5322 |
|
---|
| 5323 | FLAG_N = NFLAG_CLEAR;
|
---|
| 5324 | FLAG_Z = res;
|
---|
| 5325 | FLAG_X = FLAG_C = src << (9-shift);
|
---|
| 5326 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5327 | }
|
---|
| 5328 |
|
---|
| 5329 |
|
---|
| 5330 | M68KMAKE_OP(lsr, 32, s, .)
|
---|
| 5331 | {
|
---|
| 5332 | uint* r_dst = &DY;
|
---|
| 5333 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 5334 | uint src = *r_dst;
|
---|
| 5335 | uint res = src >> shift;
|
---|
| 5336 |
|
---|
| 5337 | *r_dst = res;
|
---|
| 5338 |
|
---|
| 5339 | FLAG_N = NFLAG_CLEAR;
|
---|
| 5340 | FLAG_Z = res;
|
---|
| 5341 | FLAG_X = FLAG_C = src << (9-shift);
|
---|
| 5342 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5343 | }
|
---|
| 5344 |
|
---|
| 5345 |
|
---|
| 5346 | M68KMAKE_OP(lsr, 8, r, .)
|
---|
| 5347 | {
|
---|
| 5348 | uint* r_dst = &DY;
|
---|
| 5349 | uint shift = DX & 0x3f;
|
---|
| 5350 | uint src = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 5351 | uint res = src >> shift;
|
---|
| 5352 |
|
---|
| 5353 | if(shift != 0)
|
---|
| 5354 | {
|
---|
| 5355 | USE_CYCLES(shift<<CYC_SHIFT);
|
---|
| 5356 |
|
---|
| 5357 | if(shift <= 8)
|
---|
| 5358 | {
|
---|
| 5359 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
|
---|
| 5360 | FLAG_X = FLAG_C = src << (9-shift);
|
---|
| 5361 | FLAG_N = NFLAG_CLEAR;
|
---|
| 5362 | FLAG_Z = res;
|
---|
| 5363 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5364 | return;
|
---|
| 5365 | }
|
---|
| 5366 |
|
---|
| 5367 | *r_dst &= 0xffffff00;
|
---|
| 5368 | FLAG_X = XFLAG_CLEAR;
|
---|
| 5369 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5370 | FLAG_N = NFLAG_CLEAR;
|
---|
| 5371 | FLAG_Z = ZFLAG_SET;
|
---|
| 5372 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5373 | return;
|
---|
| 5374 | }
|
---|
| 5375 |
|
---|
| 5376 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5377 | FLAG_N = NFLAG_8(src);
|
---|
| 5378 | FLAG_Z = src;
|
---|
| 5379 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5380 | }
|
---|
| 5381 |
|
---|
| 5382 |
|
---|
| 5383 | M68KMAKE_OP(lsr, 16, r, .)
|
---|
| 5384 | {
|
---|
| 5385 | uint* r_dst = &DY;
|
---|
| 5386 | uint shift = DX & 0x3f;
|
---|
| 5387 | uint src = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 5388 | uint res = src >> shift;
|
---|
| 5389 |
|
---|
| 5390 | if(shift != 0)
|
---|
| 5391 | {
|
---|
| 5392 | USE_CYCLES(shift<<CYC_SHIFT);
|
---|
| 5393 |
|
---|
| 5394 | if(shift <= 16)
|
---|
| 5395 | {
|
---|
| 5396 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
|
---|
| 5397 | FLAG_C = FLAG_X = (src >> (shift - 1))<<8;
|
---|
| 5398 | FLAG_N = NFLAG_CLEAR;
|
---|
| 5399 | FLAG_Z = res;
|
---|
| 5400 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5401 | return;
|
---|
| 5402 | }
|
---|
| 5403 |
|
---|
| 5404 | *r_dst &= 0xffff0000;
|
---|
| 5405 | FLAG_X = XFLAG_CLEAR;
|
---|
| 5406 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5407 | FLAG_N = NFLAG_CLEAR;
|
---|
| 5408 | FLAG_Z = ZFLAG_SET;
|
---|
| 5409 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5410 | return;
|
---|
| 5411 | }
|
---|
| 5412 |
|
---|
| 5413 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5414 | FLAG_N = NFLAG_16(src);
|
---|
| 5415 | FLAG_Z = src;
|
---|
| 5416 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5417 | }
|
---|
| 5418 |
|
---|
| 5419 |
|
---|
| 5420 | M68KMAKE_OP(lsr, 32, r, .)
|
---|
| 5421 | {
|
---|
| 5422 | uint* r_dst = &DY;
|
---|
| 5423 | uint shift = DX & 0x3f;
|
---|
| 5424 | uint src = *r_dst;
|
---|
| 5425 | uint res = src >> shift;
|
---|
| 5426 |
|
---|
| 5427 | if(shift != 0)
|
---|
| 5428 | {
|
---|
| 5429 | USE_CYCLES(shift<<CYC_SHIFT);
|
---|
| 5430 |
|
---|
| 5431 | if(shift < 32)
|
---|
| 5432 | {
|
---|
| 5433 | *r_dst = res;
|
---|
| 5434 | FLAG_C = FLAG_X = (src >> (shift - 1))<<8;
|
---|
| 5435 | FLAG_N = NFLAG_CLEAR;
|
---|
| 5436 | FLAG_Z = res;
|
---|
| 5437 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5438 | return;
|
---|
| 5439 | }
|
---|
| 5440 |
|
---|
| 5441 | *r_dst = 0;
|
---|
| 5442 | FLAG_X = FLAG_C = (shift == 32 ? GET_MSB_32(src)>>23 : 0);
|
---|
| 5443 | FLAG_N = NFLAG_CLEAR;
|
---|
| 5444 | FLAG_Z = ZFLAG_SET;
|
---|
| 5445 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5446 | return;
|
---|
| 5447 | }
|
---|
| 5448 |
|
---|
| 5449 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5450 | FLAG_N = NFLAG_32(src);
|
---|
| 5451 | FLAG_Z = src;
|
---|
| 5452 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5453 | }
|
---|
| 5454 |
|
---|
| 5455 |
|
---|
| 5456 | M68KMAKE_OP(lsr, 16, ., .)
|
---|
| 5457 | {
|
---|
| 5458 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 5459 | uint src = m68ki_read_16(ea);
|
---|
| 5460 | uint res = src >> 1;
|
---|
| 5461 |
|
---|
| 5462 | m68ki_write_16(ea, res);
|
---|
| 5463 |
|
---|
| 5464 | FLAG_N = NFLAG_CLEAR;
|
---|
| 5465 | FLAG_Z = res;
|
---|
| 5466 | FLAG_C = FLAG_X = src << 8;
|
---|
| 5467 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5468 | }
|
---|
| 5469 |
|
---|
| 5470 |
|
---|
| 5471 | M68KMAKE_OP(lsl, 8, s, .)
|
---|
| 5472 | {
|
---|
| 5473 | uint* r_dst = &DY;
|
---|
| 5474 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 5475 | uint src = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 5476 | uint res = MASK_OUT_ABOVE_8(src << shift);
|
---|
| 5477 |
|
---|
| 5478 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
|
---|
| 5479 |
|
---|
| 5480 | FLAG_N = NFLAG_8(res);
|
---|
| 5481 | FLAG_Z = res;
|
---|
| 5482 | FLAG_X = FLAG_C = src << shift;
|
---|
| 5483 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5484 | }
|
---|
| 5485 |
|
---|
| 5486 |
|
---|
| 5487 | M68KMAKE_OP(lsl, 16, s, .)
|
---|
| 5488 | {
|
---|
| 5489 | uint* r_dst = &DY;
|
---|
| 5490 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 5491 | uint src = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 5492 | uint res = MASK_OUT_ABOVE_16(src << shift);
|
---|
| 5493 |
|
---|
| 5494 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
|
---|
| 5495 |
|
---|
| 5496 | FLAG_N = NFLAG_16(res);
|
---|
| 5497 | FLAG_Z = res;
|
---|
| 5498 | FLAG_X = FLAG_C = src >> (8-shift);
|
---|
| 5499 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5500 | }
|
---|
| 5501 |
|
---|
| 5502 |
|
---|
| 5503 | M68KMAKE_OP(lsl, 32, s, .)
|
---|
| 5504 | {
|
---|
| 5505 | uint* r_dst = &DY;
|
---|
| 5506 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 5507 | uint src = *r_dst;
|
---|
| 5508 | uint res = MASK_OUT_ABOVE_32(src << shift);
|
---|
| 5509 |
|
---|
| 5510 | *r_dst = res;
|
---|
| 5511 |
|
---|
| 5512 | FLAG_N = NFLAG_32(res);
|
---|
| 5513 | FLAG_Z = res;
|
---|
| 5514 | FLAG_X = FLAG_C = src >> (24-shift);
|
---|
| 5515 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5516 | }
|
---|
| 5517 |
|
---|
| 5518 |
|
---|
| 5519 | M68KMAKE_OP(lsl, 8, r, .)
|
---|
| 5520 | {
|
---|
| 5521 | uint* r_dst = &DY;
|
---|
| 5522 | uint shift = DX & 0x3f;
|
---|
| 5523 | uint src = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 5524 | uint res = MASK_OUT_ABOVE_8(src << shift);
|
---|
| 5525 |
|
---|
| 5526 | if(shift != 0)
|
---|
| 5527 | {
|
---|
| 5528 | USE_CYCLES(shift<<CYC_SHIFT);
|
---|
| 5529 |
|
---|
| 5530 | if(shift <= 8)
|
---|
| 5531 | {
|
---|
| 5532 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
|
---|
| 5533 | FLAG_X = FLAG_C = src << shift;
|
---|
| 5534 | FLAG_N = NFLAG_8(res);
|
---|
| 5535 | FLAG_Z = res;
|
---|
| 5536 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5537 | return;
|
---|
| 5538 | }
|
---|
| 5539 |
|
---|
| 5540 | *r_dst &= 0xffffff00;
|
---|
| 5541 | FLAG_X = XFLAG_CLEAR;
|
---|
| 5542 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5543 | FLAG_N = NFLAG_CLEAR;
|
---|
| 5544 | FLAG_Z = ZFLAG_SET;
|
---|
| 5545 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5546 | return;
|
---|
| 5547 | }
|
---|
| 5548 |
|
---|
| 5549 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5550 | FLAG_N = NFLAG_8(src);
|
---|
| 5551 | FLAG_Z = src;
|
---|
| 5552 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5553 | }
|
---|
| 5554 |
|
---|
| 5555 |
|
---|
| 5556 | M68KMAKE_OP(lsl, 16, r, .)
|
---|
| 5557 | {
|
---|
| 5558 | uint* r_dst = &DY;
|
---|
| 5559 | uint shift = DX & 0x3f;
|
---|
| 5560 | uint src = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 5561 | uint res = MASK_OUT_ABOVE_16(src << shift);
|
---|
| 5562 |
|
---|
| 5563 | if(shift != 0)
|
---|
| 5564 | {
|
---|
| 5565 | USE_CYCLES(shift<<CYC_SHIFT);
|
---|
| 5566 |
|
---|
| 5567 | if(shift <= 16)
|
---|
| 5568 | {
|
---|
| 5569 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
|
---|
| 5570 | FLAG_X = FLAG_C = (src << shift) >> 8;
|
---|
| 5571 | FLAG_N = NFLAG_16(res);
|
---|
| 5572 | FLAG_Z = res;
|
---|
| 5573 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5574 | return;
|
---|
| 5575 | }
|
---|
| 5576 |
|
---|
| 5577 | *r_dst &= 0xffff0000;
|
---|
| 5578 | FLAG_X = XFLAG_CLEAR;
|
---|
| 5579 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5580 | FLAG_N = NFLAG_CLEAR;
|
---|
| 5581 | FLAG_Z = ZFLAG_SET;
|
---|
| 5582 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5583 | return;
|
---|
| 5584 | }
|
---|
| 5585 |
|
---|
| 5586 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5587 | FLAG_N = NFLAG_16(src);
|
---|
| 5588 | FLAG_Z = src;
|
---|
| 5589 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5590 | }
|
---|
| 5591 |
|
---|
| 5592 |
|
---|
| 5593 | M68KMAKE_OP(lsl, 32, r, .)
|
---|
| 5594 | {
|
---|
| 5595 | uint* r_dst = &DY;
|
---|
| 5596 | uint shift = DX & 0x3f;
|
---|
| 5597 | uint src = *r_dst;
|
---|
| 5598 | uint res = MASK_OUT_ABOVE_32(src << shift);
|
---|
| 5599 |
|
---|
| 5600 | if(shift != 0)
|
---|
| 5601 | {
|
---|
| 5602 | USE_CYCLES(shift<<CYC_SHIFT);
|
---|
| 5603 |
|
---|
| 5604 | if(shift < 32)
|
---|
| 5605 | {
|
---|
| 5606 | *r_dst = res;
|
---|
| 5607 | FLAG_X = FLAG_C = (src >> (32 - shift)) << 8;
|
---|
| 5608 | FLAG_N = NFLAG_32(res);
|
---|
| 5609 | FLAG_Z = res;
|
---|
| 5610 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5611 | return;
|
---|
| 5612 | }
|
---|
| 5613 |
|
---|
| 5614 | *r_dst = 0;
|
---|
| 5615 | FLAG_X = FLAG_C = ((shift == 32 ? src & 1 : 0))<<8;
|
---|
| 5616 | FLAG_N = NFLAG_CLEAR;
|
---|
| 5617 | FLAG_Z = ZFLAG_SET;
|
---|
| 5618 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5619 | return;
|
---|
| 5620 | }
|
---|
| 5621 |
|
---|
| 5622 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5623 | FLAG_N = NFLAG_32(src);
|
---|
| 5624 | FLAG_Z = src;
|
---|
| 5625 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5626 | }
|
---|
| 5627 |
|
---|
| 5628 |
|
---|
| 5629 | M68KMAKE_OP(lsl, 16, ., .)
|
---|
| 5630 | {
|
---|
| 5631 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 5632 | uint src = m68ki_read_16(ea);
|
---|
| 5633 | uint res = MASK_OUT_ABOVE_16(src << 1);
|
---|
| 5634 |
|
---|
| 5635 | m68ki_write_16(ea, res);
|
---|
| 5636 |
|
---|
| 5637 | FLAG_N = NFLAG_16(res);
|
---|
| 5638 | FLAG_Z = res;
|
---|
| 5639 | FLAG_X = FLAG_C = src >> 7;
|
---|
| 5640 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5641 | }
|
---|
| 5642 |
|
---|
| 5643 |
|
---|
| 5644 | M68KMAKE_OP(move, 8, d, d)
|
---|
| 5645 | {
|
---|
| 5646 | uint res = MASK_OUT_ABOVE_8(DY);
|
---|
| 5647 | uint* r_dst = &DX;
|
---|
| 5648 |
|
---|
| 5649 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
|
---|
| 5650 |
|
---|
| 5651 | FLAG_N = NFLAG_8(res);
|
---|
| 5652 | FLAG_Z = res;
|
---|
| 5653 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5654 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5655 | }
|
---|
| 5656 |
|
---|
| 5657 |
|
---|
| 5658 | M68KMAKE_OP(move, 8, d, .)
|
---|
| 5659 | {
|
---|
| 5660 | uint res = M68KMAKE_GET_OPER_AY_8;
|
---|
| 5661 | uint* r_dst = &DX;
|
---|
| 5662 |
|
---|
| 5663 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
|
---|
| 5664 |
|
---|
| 5665 | FLAG_N = NFLAG_8(res);
|
---|
| 5666 | FLAG_Z = res;
|
---|
| 5667 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5668 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5669 | }
|
---|
| 5670 |
|
---|
| 5671 |
|
---|
| 5672 | M68KMAKE_OP(move, 8, ai, d)
|
---|
| 5673 | {
|
---|
| 5674 | uint res = MASK_OUT_ABOVE_8(DY);
|
---|
| 5675 | uint ea = EA_AX_AI_8();
|
---|
| 5676 |
|
---|
| 5677 | m68ki_write_8(ea, res);
|
---|
| 5678 |
|
---|
| 5679 | FLAG_N = NFLAG_8(res);
|
---|
| 5680 | FLAG_Z = res;
|
---|
| 5681 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5682 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5683 | }
|
---|
| 5684 |
|
---|
| 5685 |
|
---|
| 5686 | M68KMAKE_OP(move, 8, ai, .)
|
---|
| 5687 | {
|
---|
| 5688 | uint res = M68KMAKE_GET_OPER_AY_8;
|
---|
| 5689 | uint ea = EA_AX_AI_8();
|
---|
| 5690 |
|
---|
| 5691 | m68ki_write_8(ea, res);
|
---|
| 5692 |
|
---|
| 5693 | FLAG_N = NFLAG_8(res);
|
---|
| 5694 | FLAG_Z = res;
|
---|
| 5695 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5696 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5697 | }
|
---|
| 5698 |
|
---|
| 5699 |
|
---|
| 5700 | M68KMAKE_OP(move, 8, pi7, d)
|
---|
| 5701 | {
|
---|
| 5702 | uint res = MASK_OUT_ABOVE_8(DY);
|
---|
| 5703 | uint ea = EA_A7_PI_8();
|
---|
| 5704 |
|
---|
| 5705 | m68ki_write_8(ea, res);
|
---|
| 5706 |
|
---|
| 5707 | FLAG_N = NFLAG_8(res);
|
---|
| 5708 | FLAG_Z = res;
|
---|
| 5709 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5710 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5711 | }
|
---|
| 5712 |
|
---|
| 5713 |
|
---|
| 5714 | M68KMAKE_OP(move, 8, pi, d)
|
---|
| 5715 | {
|
---|
| 5716 | uint res = MASK_OUT_ABOVE_8(DY);
|
---|
| 5717 | uint ea = EA_AX_PI_8();
|
---|
| 5718 |
|
---|
| 5719 | m68ki_write_8(ea, res);
|
---|
| 5720 |
|
---|
| 5721 | FLAG_N = NFLAG_8(res);
|
---|
| 5722 | FLAG_Z = res;
|
---|
| 5723 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5724 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5725 | }
|
---|
| 5726 |
|
---|
| 5727 |
|
---|
| 5728 | M68KMAKE_OP(move, 8, pi7, .)
|
---|
| 5729 | {
|
---|
| 5730 | uint res = M68KMAKE_GET_OPER_AY_8;
|
---|
| 5731 | uint ea = EA_A7_PI_8();
|
---|
| 5732 |
|
---|
| 5733 | m68ki_write_8(ea, res);
|
---|
| 5734 |
|
---|
| 5735 | FLAG_N = NFLAG_8(res);
|
---|
| 5736 | FLAG_Z = res;
|
---|
| 5737 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5738 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5739 | }
|
---|
| 5740 |
|
---|
| 5741 |
|
---|
| 5742 | M68KMAKE_OP(move, 8, pi, .)
|
---|
| 5743 | {
|
---|
| 5744 | uint res = M68KMAKE_GET_OPER_AY_8;
|
---|
| 5745 | uint ea = EA_AX_PI_8();
|
---|
| 5746 |
|
---|
| 5747 | m68ki_write_8(ea, res);
|
---|
| 5748 |
|
---|
| 5749 | FLAG_N = NFLAG_8(res);
|
---|
| 5750 | FLAG_Z = res;
|
---|
| 5751 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5752 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5753 | }
|
---|
| 5754 |
|
---|
| 5755 |
|
---|
| 5756 | M68KMAKE_OP(move, 8, pd7, d)
|
---|
| 5757 | {
|
---|
| 5758 | uint res = MASK_OUT_ABOVE_8(DY);
|
---|
| 5759 | uint ea = EA_A7_PD_8();
|
---|
| 5760 |
|
---|
| 5761 | m68ki_write_8(ea, res);
|
---|
| 5762 |
|
---|
| 5763 | FLAG_N = NFLAG_8(res);
|
---|
| 5764 | FLAG_Z = res;
|
---|
| 5765 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5766 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5767 | }
|
---|
| 5768 |
|
---|
| 5769 |
|
---|
| 5770 | M68KMAKE_OP(move, 8, pd, d)
|
---|
| 5771 | {
|
---|
| 5772 | uint res = MASK_OUT_ABOVE_8(DY);
|
---|
| 5773 | uint ea = EA_AX_PD_8();
|
---|
| 5774 |
|
---|
| 5775 | m68ki_write_8(ea, res);
|
---|
| 5776 |
|
---|
| 5777 | FLAG_N = NFLAG_8(res);
|
---|
| 5778 | FLAG_Z = res;
|
---|
| 5779 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5780 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5781 | }
|
---|
| 5782 |
|
---|
| 5783 |
|
---|
| 5784 | M68KMAKE_OP(move, 8, pd7, .)
|
---|
| 5785 | {
|
---|
| 5786 | uint res = M68KMAKE_GET_OPER_AY_8;
|
---|
| 5787 | uint ea = EA_A7_PD_8();
|
---|
| 5788 |
|
---|
| 5789 | m68ki_write_8(ea, res);
|
---|
| 5790 |
|
---|
| 5791 | FLAG_N = NFLAG_8(res);
|
---|
| 5792 | FLAG_Z = res;
|
---|
| 5793 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5794 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5795 | }
|
---|
| 5796 |
|
---|
| 5797 |
|
---|
| 5798 | M68KMAKE_OP(move, 8, pd, .)
|
---|
| 5799 | {
|
---|
| 5800 | uint res = M68KMAKE_GET_OPER_AY_8;
|
---|
| 5801 | uint ea = EA_AX_PD_8();
|
---|
| 5802 |
|
---|
| 5803 | m68ki_write_8(ea, res);
|
---|
| 5804 |
|
---|
| 5805 | FLAG_N = NFLAG_8(res);
|
---|
| 5806 | FLAG_Z = res;
|
---|
| 5807 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5808 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5809 | }
|
---|
| 5810 |
|
---|
| 5811 |
|
---|
| 5812 | M68KMAKE_OP(move, 8, di, d)
|
---|
| 5813 | {
|
---|
| 5814 | uint res = MASK_OUT_ABOVE_8(DY);
|
---|
| 5815 | uint ea = EA_AX_DI_8();
|
---|
| 5816 |
|
---|
| 5817 | m68ki_write_8(ea, res);
|
---|
| 5818 |
|
---|
| 5819 | FLAG_N = NFLAG_8(res);
|
---|
| 5820 | FLAG_Z = res;
|
---|
| 5821 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5822 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5823 | }
|
---|
| 5824 |
|
---|
| 5825 |
|
---|
| 5826 | M68KMAKE_OP(move, 8, di, .)
|
---|
| 5827 | {
|
---|
| 5828 | uint res = M68KMAKE_GET_OPER_AY_8;
|
---|
| 5829 | uint ea = EA_AX_DI_8();
|
---|
| 5830 |
|
---|
| 5831 | m68ki_write_8(ea, res);
|
---|
| 5832 |
|
---|
| 5833 | FLAG_N = NFLAG_8(res);
|
---|
| 5834 | FLAG_Z = res;
|
---|
| 5835 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5836 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5837 | }
|
---|
| 5838 |
|
---|
| 5839 |
|
---|
| 5840 | M68KMAKE_OP(move, 8, ix, d)
|
---|
| 5841 | {
|
---|
| 5842 | uint res = MASK_OUT_ABOVE_8(DY);
|
---|
| 5843 | uint ea = EA_AX_IX_8();
|
---|
| 5844 |
|
---|
| 5845 | m68ki_write_8(ea, res);
|
---|
| 5846 |
|
---|
| 5847 | FLAG_N = NFLAG_8(res);
|
---|
| 5848 | FLAG_Z = res;
|
---|
| 5849 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5850 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5851 | }
|
---|
| 5852 |
|
---|
| 5853 |
|
---|
| 5854 | M68KMAKE_OP(move, 8, ix, .)
|
---|
| 5855 | {
|
---|
| 5856 | uint res = M68KMAKE_GET_OPER_AY_8;
|
---|
| 5857 | uint ea = EA_AX_IX_8();
|
---|
| 5858 |
|
---|
| 5859 | m68ki_write_8(ea, res);
|
---|
| 5860 |
|
---|
| 5861 | FLAG_N = NFLAG_8(res);
|
---|
| 5862 | FLAG_Z = res;
|
---|
| 5863 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5864 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5865 | }
|
---|
| 5866 |
|
---|
| 5867 |
|
---|
| 5868 | M68KMAKE_OP(move, 8, aw, d)
|
---|
| 5869 | {
|
---|
| 5870 | uint res = MASK_OUT_ABOVE_8(DY);
|
---|
| 5871 | uint ea = EA_AW_8();
|
---|
| 5872 |
|
---|
| 5873 | m68ki_write_8(ea, res);
|
---|
| 5874 |
|
---|
| 5875 | FLAG_N = NFLAG_8(res);
|
---|
| 5876 | FLAG_Z = res;
|
---|
| 5877 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5878 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5879 | }
|
---|
| 5880 |
|
---|
| 5881 |
|
---|
| 5882 | M68KMAKE_OP(move, 8, aw, .)
|
---|
| 5883 | {
|
---|
| 5884 | uint res = M68KMAKE_GET_OPER_AY_8;
|
---|
| 5885 | uint ea = EA_AW_8();
|
---|
| 5886 |
|
---|
| 5887 | m68ki_write_8(ea, res);
|
---|
| 5888 |
|
---|
| 5889 | FLAG_N = NFLAG_8(res);
|
---|
| 5890 | FLAG_Z = res;
|
---|
| 5891 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5892 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5893 | }
|
---|
| 5894 |
|
---|
| 5895 |
|
---|
| 5896 | M68KMAKE_OP(move, 8, al, d)
|
---|
| 5897 | {
|
---|
| 5898 | uint res = MASK_OUT_ABOVE_8(DY);
|
---|
| 5899 | uint ea = EA_AL_8();
|
---|
| 5900 |
|
---|
| 5901 | m68ki_write_8(ea, res);
|
---|
| 5902 |
|
---|
| 5903 | FLAG_N = NFLAG_8(res);
|
---|
| 5904 | FLAG_Z = res;
|
---|
| 5905 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5906 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5907 | }
|
---|
| 5908 |
|
---|
| 5909 |
|
---|
| 5910 | M68KMAKE_OP(move, 8, al, .)
|
---|
| 5911 | {
|
---|
| 5912 | uint res = M68KMAKE_GET_OPER_AY_8;
|
---|
| 5913 | uint ea = EA_AL_8();
|
---|
| 5914 |
|
---|
| 5915 | m68ki_write_8(ea, res);
|
---|
| 5916 |
|
---|
| 5917 | FLAG_N = NFLAG_8(res);
|
---|
| 5918 | FLAG_Z = res;
|
---|
| 5919 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5920 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5921 | }
|
---|
| 5922 |
|
---|
| 5923 |
|
---|
| 5924 | M68KMAKE_OP(move, 16, d, d)
|
---|
| 5925 | {
|
---|
| 5926 | uint res = MASK_OUT_ABOVE_16(DY);
|
---|
| 5927 | uint* r_dst = &DX;
|
---|
| 5928 |
|
---|
| 5929 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
|
---|
| 5930 |
|
---|
| 5931 | FLAG_N = NFLAG_16(res);
|
---|
| 5932 | FLAG_Z = res;
|
---|
| 5933 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5934 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5935 | }
|
---|
| 5936 |
|
---|
| 5937 |
|
---|
| 5938 | M68KMAKE_OP(move, 16, d, a)
|
---|
| 5939 | {
|
---|
| 5940 | uint res = MASK_OUT_ABOVE_16(AY);
|
---|
| 5941 | uint* r_dst = &DX;
|
---|
| 5942 |
|
---|
| 5943 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
|
---|
| 5944 |
|
---|
| 5945 | FLAG_N = NFLAG_16(res);
|
---|
| 5946 | FLAG_Z = res;
|
---|
| 5947 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5948 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5949 | }
|
---|
| 5950 |
|
---|
| 5951 |
|
---|
| 5952 | M68KMAKE_OP(move, 16, d, .)
|
---|
| 5953 | {
|
---|
| 5954 | uint res = M68KMAKE_GET_OPER_AY_16;
|
---|
| 5955 | uint* r_dst = &DX;
|
---|
| 5956 |
|
---|
| 5957 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
|
---|
| 5958 |
|
---|
| 5959 | FLAG_N = NFLAG_16(res);
|
---|
| 5960 | FLAG_Z = res;
|
---|
| 5961 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5962 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5963 | }
|
---|
| 5964 |
|
---|
| 5965 |
|
---|
| 5966 | M68KMAKE_OP(move, 16, ai, d)
|
---|
| 5967 | {
|
---|
| 5968 | uint res = MASK_OUT_ABOVE_16(DY);
|
---|
| 5969 | uint ea = EA_AX_AI_16();
|
---|
| 5970 |
|
---|
| 5971 | m68ki_write_16(ea, res);
|
---|
| 5972 |
|
---|
| 5973 | FLAG_N = NFLAG_16(res);
|
---|
| 5974 | FLAG_Z = res;
|
---|
| 5975 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5976 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5977 | }
|
---|
| 5978 |
|
---|
| 5979 |
|
---|
| 5980 | M68KMAKE_OP(move, 16, ai, a)
|
---|
| 5981 | {
|
---|
| 5982 | uint res = MASK_OUT_ABOVE_16(AY);
|
---|
| 5983 | uint ea = EA_AX_AI_16();
|
---|
| 5984 |
|
---|
| 5985 | m68ki_write_16(ea, res);
|
---|
| 5986 |
|
---|
| 5987 | FLAG_N = NFLAG_16(res);
|
---|
| 5988 | FLAG_Z = res;
|
---|
| 5989 | FLAG_V = VFLAG_CLEAR;
|
---|
| 5990 | FLAG_C = CFLAG_CLEAR;
|
---|
| 5991 | }
|
---|
| 5992 |
|
---|
| 5993 |
|
---|
| 5994 | M68KMAKE_OP(move, 16, ai, .)
|
---|
| 5995 | {
|
---|
| 5996 | uint res = M68KMAKE_GET_OPER_AY_16;
|
---|
| 5997 | uint ea = EA_AX_AI_16();
|
---|
| 5998 |
|
---|
| 5999 | m68ki_write_16(ea, res);
|
---|
| 6000 |
|
---|
| 6001 | FLAG_N = NFLAG_16(res);
|
---|
| 6002 | FLAG_Z = res;
|
---|
| 6003 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6004 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6005 | }
|
---|
| 6006 |
|
---|
| 6007 |
|
---|
| 6008 | M68KMAKE_OP(move, 16, pi, d)
|
---|
| 6009 | {
|
---|
| 6010 | uint res = MASK_OUT_ABOVE_16(DY);
|
---|
| 6011 | uint ea = EA_AX_PI_16();
|
---|
| 6012 |
|
---|
| 6013 | m68ki_write_16(ea, res);
|
---|
| 6014 |
|
---|
| 6015 | FLAG_N = NFLAG_16(res);
|
---|
| 6016 | FLAG_Z = res;
|
---|
| 6017 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6018 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6019 | }
|
---|
| 6020 |
|
---|
| 6021 |
|
---|
| 6022 | M68KMAKE_OP(move, 16, pi, a)
|
---|
| 6023 | {
|
---|
| 6024 | uint res = MASK_OUT_ABOVE_16(AY);
|
---|
| 6025 | uint ea = EA_AX_PI_16();
|
---|
| 6026 |
|
---|
| 6027 | m68ki_write_16(ea, res);
|
---|
| 6028 |
|
---|
| 6029 | FLAG_N = NFLAG_16(res);
|
---|
| 6030 | FLAG_Z = res;
|
---|
| 6031 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6032 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6033 | }
|
---|
| 6034 |
|
---|
| 6035 |
|
---|
| 6036 | M68KMAKE_OP(move, 16, pi, .)
|
---|
| 6037 | {
|
---|
| 6038 | uint res = M68KMAKE_GET_OPER_AY_16;
|
---|
| 6039 | uint ea = EA_AX_PI_16();
|
---|
| 6040 |
|
---|
| 6041 | m68ki_write_16(ea, res);
|
---|
| 6042 |
|
---|
| 6043 | FLAG_N = NFLAG_16(res);
|
---|
| 6044 | FLAG_Z = res;
|
---|
| 6045 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6046 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6047 | }
|
---|
| 6048 |
|
---|
| 6049 |
|
---|
| 6050 | M68KMAKE_OP(move, 16, pd, d)
|
---|
| 6051 | {
|
---|
| 6052 | uint res = MASK_OUT_ABOVE_16(DY);
|
---|
| 6053 | uint ea = EA_AX_PD_16();
|
---|
| 6054 |
|
---|
| 6055 | m68ki_write_16(ea, res);
|
---|
| 6056 |
|
---|
| 6057 | FLAG_N = NFLAG_16(res);
|
---|
| 6058 | FLAG_Z = res;
|
---|
| 6059 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6060 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6061 | }
|
---|
| 6062 |
|
---|
| 6063 |
|
---|
| 6064 | M68KMAKE_OP(move, 16, pd, a)
|
---|
| 6065 | {
|
---|
| 6066 | uint res = MASK_OUT_ABOVE_16(AY);
|
---|
| 6067 | uint ea = EA_AX_PD_16();
|
---|
| 6068 |
|
---|
| 6069 | m68ki_write_16(ea, res);
|
---|
| 6070 |
|
---|
| 6071 | FLAG_N = NFLAG_16(res);
|
---|
| 6072 | FLAG_Z = res;
|
---|
| 6073 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6074 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6075 | }
|
---|
| 6076 |
|
---|
| 6077 |
|
---|
| 6078 | M68KMAKE_OP(move, 16, pd, .)
|
---|
| 6079 | {
|
---|
| 6080 | uint res = M68KMAKE_GET_OPER_AY_16;
|
---|
| 6081 | uint ea = EA_AX_PD_16();
|
---|
| 6082 |
|
---|
| 6083 | m68ki_write_16(ea, res);
|
---|
| 6084 |
|
---|
| 6085 | FLAG_N = NFLAG_16(res);
|
---|
| 6086 | FLAG_Z = res;
|
---|
| 6087 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6088 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6089 | }
|
---|
| 6090 |
|
---|
| 6091 |
|
---|
| 6092 | M68KMAKE_OP(move, 16, di, d)
|
---|
| 6093 | {
|
---|
| 6094 | uint res = MASK_OUT_ABOVE_16(DY);
|
---|
| 6095 | uint ea = EA_AX_DI_16();
|
---|
| 6096 |
|
---|
| 6097 | m68ki_write_16(ea, res);
|
---|
| 6098 |
|
---|
| 6099 | FLAG_N = NFLAG_16(res);
|
---|
| 6100 | FLAG_Z = res;
|
---|
| 6101 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6102 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6103 | }
|
---|
| 6104 |
|
---|
| 6105 |
|
---|
| 6106 | M68KMAKE_OP(move, 16, di, a)
|
---|
| 6107 | {
|
---|
| 6108 | uint res = MASK_OUT_ABOVE_16(AY);
|
---|
| 6109 | uint ea = EA_AX_DI_16();
|
---|
| 6110 |
|
---|
| 6111 | m68ki_write_16(ea, res);
|
---|
| 6112 |
|
---|
| 6113 | FLAG_N = NFLAG_16(res);
|
---|
| 6114 | FLAG_Z = res;
|
---|
| 6115 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6116 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6117 | }
|
---|
| 6118 |
|
---|
| 6119 |
|
---|
| 6120 | M68KMAKE_OP(move, 16, di, .)
|
---|
| 6121 | {
|
---|
| 6122 | uint res = M68KMAKE_GET_OPER_AY_16;
|
---|
| 6123 | uint ea = EA_AX_DI_16();
|
---|
| 6124 |
|
---|
| 6125 | m68ki_write_16(ea, res);
|
---|
| 6126 |
|
---|
| 6127 | FLAG_N = NFLAG_16(res);
|
---|
| 6128 | FLAG_Z = res;
|
---|
| 6129 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6130 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6131 | }
|
---|
| 6132 |
|
---|
| 6133 |
|
---|
| 6134 | M68KMAKE_OP(move, 16, ix, d)
|
---|
| 6135 | {
|
---|
| 6136 | uint res = MASK_OUT_ABOVE_16(DY);
|
---|
| 6137 | uint ea = EA_AX_IX_16();
|
---|
| 6138 |
|
---|
| 6139 | m68ki_write_16(ea, res);
|
---|
| 6140 |
|
---|
| 6141 | FLAG_N = NFLAG_16(res);
|
---|
| 6142 | FLAG_Z = res;
|
---|
| 6143 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6144 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6145 | }
|
---|
| 6146 |
|
---|
| 6147 |
|
---|
| 6148 | M68KMAKE_OP(move, 16, ix, a)
|
---|
| 6149 | {
|
---|
| 6150 | uint res = MASK_OUT_ABOVE_16(AY);
|
---|
| 6151 | uint ea = EA_AX_IX_16();
|
---|
| 6152 |
|
---|
| 6153 | m68ki_write_16(ea, res);
|
---|
| 6154 |
|
---|
| 6155 | FLAG_N = NFLAG_16(res);
|
---|
| 6156 | FLAG_Z = res;
|
---|
| 6157 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6158 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6159 | }
|
---|
| 6160 |
|
---|
| 6161 |
|
---|
| 6162 | M68KMAKE_OP(move, 16, ix, .)
|
---|
| 6163 | {
|
---|
| 6164 | uint res = M68KMAKE_GET_OPER_AY_16;
|
---|
| 6165 | uint ea = EA_AX_IX_16();
|
---|
| 6166 |
|
---|
| 6167 | m68ki_write_16(ea, res);
|
---|
| 6168 |
|
---|
| 6169 | FLAG_N = NFLAG_16(res);
|
---|
| 6170 | FLAG_Z = res;
|
---|
| 6171 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6172 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6173 | }
|
---|
| 6174 |
|
---|
| 6175 |
|
---|
| 6176 | M68KMAKE_OP(move, 16, aw, d)
|
---|
| 6177 | {
|
---|
| 6178 | uint res = MASK_OUT_ABOVE_16(DY);
|
---|
| 6179 | uint ea = EA_AW_16();
|
---|
| 6180 |
|
---|
| 6181 | m68ki_write_16(ea, res);
|
---|
| 6182 |
|
---|
| 6183 | FLAG_N = NFLAG_16(res);
|
---|
| 6184 | FLAG_Z = res;
|
---|
| 6185 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6186 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6187 | }
|
---|
| 6188 |
|
---|
| 6189 |
|
---|
| 6190 | M68KMAKE_OP(move, 16, aw, a)
|
---|
| 6191 | {
|
---|
| 6192 | uint res = MASK_OUT_ABOVE_16(AY);
|
---|
| 6193 | uint ea = EA_AW_16();
|
---|
| 6194 |
|
---|
| 6195 | m68ki_write_16(ea, res);
|
---|
| 6196 |
|
---|
| 6197 | FLAG_N = NFLAG_16(res);
|
---|
| 6198 | FLAG_Z = res;
|
---|
| 6199 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6200 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6201 | }
|
---|
| 6202 |
|
---|
| 6203 |
|
---|
| 6204 | M68KMAKE_OP(move, 16, aw, .)
|
---|
| 6205 | {
|
---|
| 6206 | uint res = M68KMAKE_GET_OPER_AY_16;
|
---|
| 6207 | uint ea = EA_AW_16();
|
---|
| 6208 |
|
---|
| 6209 | m68ki_write_16(ea, res);
|
---|
| 6210 |
|
---|
| 6211 | FLAG_N = NFLAG_16(res);
|
---|
| 6212 | FLAG_Z = res;
|
---|
| 6213 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6214 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6215 | }
|
---|
| 6216 |
|
---|
| 6217 |
|
---|
| 6218 | M68KMAKE_OP(move, 16, al, d)
|
---|
| 6219 | {
|
---|
| 6220 | uint res = MASK_OUT_ABOVE_16(DY);
|
---|
| 6221 | uint ea = EA_AL_16();
|
---|
| 6222 |
|
---|
| 6223 | m68ki_write_16(ea, res);
|
---|
| 6224 |
|
---|
| 6225 | FLAG_N = NFLAG_16(res);
|
---|
| 6226 | FLAG_Z = res;
|
---|
| 6227 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6228 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6229 | }
|
---|
| 6230 |
|
---|
| 6231 |
|
---|
| 6232 | M68KMAKE_OP(move, 16, al, a)
|
---|
| 6233 | {
|
---|
| 6234 | uint res = MASK_OUT_ABOVE_16(AY);
|
---|
| 6235 | uint ea = EA_AL_16();
|
---|
| 6236 |
|
---|
| 6237 | m68ki_write_16(ea, res);
|
---|
| 6238 |
|
---|
| 6239 | FLAG_N = NFLAG_16(res);
|
---|
| 6240 | FLAG_Z = res;
|
---|
| 6241 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6242 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6243 | }
|
---|
| 6244 |
|
---|
| 6245 |
|
---|
| 6246 | M68KMAKE_OP(move, 16, al, .)
|
---|
| 6247 | {
|
---|
| 6248 | uint res = M68KMAKE_GET_OPER_AY_16;
|
---|
| 6249 | uint ea = EA_AL_16();
|
---|
| 6250 |
|
---|
| 6251 | m68ki_write_16(ea, res);
|
---|
| 6252 |
|
---|
| 6253 | FLAG_N = NFLAG_16(res);
|
---|
| 6254 | FLAG_Z = res;
|
---|
| 6255 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6256 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6257 | }
|
---|
| 6258 |
|
---|
| 6259 |
|
---|
| 6260 | M68KMAKE_OP(move, 32, d, d)
|
---|
| 6261 | {
|
---|
| 6262 | uint res = DY;
|
---|
| 6263 | uint* r_dst = &DX;
|
---|
| 6264 |
|
---|
| 6265 | *r_dst = res;
|
---|
| 6266 |
|
---|
| 6267 | FLAG_N = NFLAG_32(res);
|
---|
| 6268 | FLAG_Z = res;
|
---|
| 6269 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6270 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6271 | }
|
---|
| 6272 |
|
---|
| 6273 |
|
---|
| 6274 | M68KMAKE_OP(move, 32, d, a)
|
---|
| 6275 | {
|
---|
| 6276 | uint res = AY;
|
---|
| 6277 | uint* r_dst = &DX;
|
---|
| 6278 |
|
---|
| 6279 | *r_dst = res;
|
---|
| 6280 |
|
---|
| 6281 | FLAG_N = NFLAG_32(res);
|
---|
| 6282 | FLAG_Z = res;
|
---|
| 6283 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6284 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6285 | }
|
---|
| 6286 |
|
---|
| 6287 |
|
---|
| 6288 | M68KMAKE_OP(move, 32, d, .)
|
---|
| 6289 | {
|
---|
| 6290 | uint res = M68KMAKE_GET_OPER_AY_32;
|
---|
| 6291 | uint* r_dst = &DX;
|
---|
| 6292 |
|
---|
| 6293 | *r_dst = res;
|
---|
| 6294 |
|
---|
| 6295 | FLAG_N = NFLAG_32(res);
|
---|
| 6296 | FLAG_Z = res;
|
---|
| 6297 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6298 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6299 | }
|
---|
| 6300 |
|
---|
| 6301 |
|
---|
| 6302 | M68KMAKE_OP(move, 32, ai, d)
|
---|
| 6303 | {
|
---|
| 6304 | uint res = DY;
|
---|
| 6305 | uint ea = EA_AX_AI_32();
|
---|
| 6306 |
|
---|
| 6307 | m68ki_write_32(ea, res);
|
---|
| 6308 |
|
---|
| 6309 | FLAG_N = NFLAG_32(res);
|
---|
| 6310 | FLAG_Z = res;
|
---|
| 6311 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6312 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6313 | }
|
---|
| 6314 |
|
---|
| 6315 |
|
---|
| 6316 | M68KMAKE_OP(move, 32, ai, a)
|
---|
| 6317 | {
|
---|
| 6318 | uint res = AY;
|
---|
| 6319 | uint ea = EA_AX_AI_32();
|
---|
| 6320 |
|
---|
| 6321 | m68ki_write_32(ea, res);
|
---|
| 6322 |
|
---|
| 6323 | FLAG_N = NFLAG_32(res);
|
---|
| 6324 | FLAG_Z = res;
|
---|
| 6325 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6326 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6327 | }
|
---|
| 6328 |
|
---|
| 6329 |
|
---|
| 6330 | M68KMAKE_OP(move, 32, ai, .)
|
---|
| 6331 | {
|
---|
| 6332 | uint res = M68KMAKE_GET_OPER_AY_32;
|
---|
| 6333 | uint ea = EA_AX_AI_32();
|
---|
| 6334 |
|
---|
| 6335 | m68ki_write_32(ea, res);
|
---|
| 6336 |
|
---|
| 6337 | FLAG_N = NFLAG_32(res);
|
---|
| 6338 | FLAG_Z = res;
|
---|
| 6339 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6340 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6341 | }
|
---|
| 6342 |
|
---|
| 6343 |
|
---|
| 6344 | M68KMAKE_OP(move, 32, pi, d)
|
---|
| 6345 | {
|
---|
| 6346 | uint res = DY;
|
---|
| 6347 | uint ea = EA_AX_PI_32();
|
---|
| 6348 |
|
---|
| 6349 | m68ki_write_32(ea, res);
|
---|
| 6350 |
|
---|
| 6351 | FLAG_N = NFLAG_32(res);
|
---|
| 6352 | FLAG_Z = res;
|
---|
| 6353 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6354 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6355 | }
|
---|
| 6356 |
|
---|
| 6357 |
|
---|
| 6358 | M68KMAKE_OP(move, 32, pi, a)
|
---|
| 6359 | {
|
---|
| 6360 | uint res = AY;
|
---|
| 6361 | uint ea = EA_AX_PI_32();
|
---|
| 6362 |
|
---|
| 6363 | m68ki_write_32(ea, res);
|
---|
| 6364 |
|
---|
| 6365 | FLAG_N = NFLAG_32(res);
|
---|
| 6366 | FLAG_Z = res;
|
---|
| 6367 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6368 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6369 | }
|
---|
| 6370 |
|
---|
| 6371 |
|
---|
| 6372 | M68KMAKE_OP(move, 32, pi, .)
|
---|
| 6373 | {
|
---|
| 6374 | uint res = M68KMAKE_GET_OPER_AY_32;
|
---|
| 6375 | uint ea = EA_AX_PI_32();
|
---|
| 6376 |
|
---|
| 6377 | m68ki_write_32(ea, res);
|
---|
| 6378 |
|
---|
| 6379 | FLAG_N = NFLAG_32(res);
|
---|
| 6380 | FLAG_Z = res;
|
---|
| 6381 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6382 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6383 | }
|
---|
| 6384 |
|
---|
| 6385 |
|
---|
| 6386 | M68KMAKE_OP(move, 32, pd, d)
|
---|
| 6387 | {
|
---|
| 6388 | uint res = DY;
|
---|
| 6389 | uint ea = EA_AX_PD_32();
|
---|
| 6390 |
|
---|
| 6391 | m68ki_write_32(ea, res);
|
---|
| 6392 |
|
---|
| 6393 | FLAG_N = NFLAG_32(res);
|
---|
| 6394 | FLAG_Z = res;
|
---|
| 6395 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6396 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6397 | }
|
---|
| 6398 |
|
---|
| 6399 |
|
---|
| 6400 | M68KMAKE_OP(move, 32, pd, a)
|
---|
| 6401 | {
|
---|
| 6402 | uint res = AY;
|
---|
| 6403 | uint ea = EA_AX_PD_32();
|
---|
| 6404 |
|
---|
| 6405 | m68ki_write_32(ea, res);
|
---|
| 6406 |
|
---|
| 6407 | FLAG_N = NFLAG_32(res);
|
---|
| 6408 | FLAG_Z = res;
|
---|
| 6409 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6410 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6411 | }
|
---|
| 6412 |
|
---|
| 6413 |
|
---|
| 6414 | M68KMAKE_OP(move, 32, pd, .)
|
---|
| 6415 | {
|
---|
| 6416 | uint res = M68KMAKE_GET_OPER_AY_32;
|
---|
| 6417 | uint ea = EA_AX_PD_32();
|
---|
| 6418 |
|
---|
| 6419 | m68ki_write_32(ea, res);
|
---|
| 6420 |
|
---|
| 6421 | FLAG_N = NFLAG_32(res);
|
---|
| 6422 | FLAG_Z = res;
|
---|
| 6423 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6424 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6425 | }
|
---|
| 6426 |
|
---|
| 6427 |
|
---|
| 6428 | M68KMAKE_OP(move, 32, di, d)
|
---|
| 6429 | {
|
---|
| 6430 | uint res = DY;
|
---|
| 6431 | uint ea = EA_AX_DI_32();
|
---|
| 6432 |
|
---|
| 6433 | m68ki_write_32(ea, res);
|
---|
| 6434 |
|
---|
| 6435 | FLAG_N = NFLAG_32(res);
|
---|
| 6436 | FLAG_Z = res;
|
---|
| 6437 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6438 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6439 | }
|
---|
| 6440 |
|
---|
| 6441 |
|
---|
| 6442 | M68KMAKE_OP(move, 32, di, a)
|
---|
| 6443 | {
|
---|
| 6444 | uint res = AY;
|
---|
| 6445 | uint ea = EA_AX_DI_32();
|
---|
| 6446 |
|
---|
| 6447 | m68ki_write_32(ea, res);
|
---|
| 6448 |
|
---|
| 6449 | FLAG_N = NFLAG_32(res);
|
---|
| 6450 | FLAG_Z = res;
|
---|
| 6451 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6452 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6453 | }
|
---|
| 6454 |
|
---|
| 6455 |
|
---|
| 6456 | M68KMAKE_OP(move, 32, di, .)
|
---|
| 6457 | {
|
---|
| 6458 | uint res = M68KMAKE_GET_OPER_AY_32;
|
---|
| 6459 | uint ea = EA_AX_DI_32();
|
---|
| 6460 |
|
---|
| 6461 | m68ki_write_32(ea, res);
|
---|
| 6462 |
|
---|
| 6463 | FLAG_N = NFLAG_32(res);
|
---|
| 6464 | FLAG_Z = res;
|
---|
| 6465 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6466 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6467 | }
|
---|
| 6468 |
|
---|
| 6469 |
|
---|
| 6470 | M68KMAKE_OP(move, 32, ix, d)
|
---|
| 6471 | {
|
---|
| 6472 | uint res = DY;
|
---|
| 6473 | uint ea = EA_AX_IX_32();
|
---|
| 6474 |
|
---|
| 6475 | m68ki_write_32(ea, res);
|
---|
| 6476 |
|
---|
| 6477 | FLAG_N = NFLAG_32(res);
|
---|
| 6478 | FLAG_Z = res;
|
---|
| 6479 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6480 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6481 | }
|
---|
| 6482 |
|
---|
| 6483 |
|
---|
| 6484 | M68KMAKE_OP(move, 32, ix, a)
|
---|
| 6485 | {
|
---|
| 6486 | uint res = AY;
|
---|
| 6487 | uint ea = EA_AX_IX_32();
|
---|
| 6488 |
|
---|
| 6489 | m68ki_write_32(ea, res);
|
---|
| 6490 |
|
---|
| 6491 | FLAG_N = NFLAG_32(res);
|
---|
| 6492 | FLAG_Z = res;
|
---|
| 6493 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6494 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6495 | }
|
---|
| 6496 |
|
---|
| 6497 |
|
---|
| 6498 | M68KMAKE_OP(move, 32, ix, .)
|
---|
| 6499 | {
|
---|
| 6500 | uint res = M68KMAKE_GET_OPER_AY_32;
|
---|
| 6501 | uint ea = EA_AX_IX_32();
|
---|
| 6502 |
|
---|
| 6503 | m68ki_write_32(ea, res);
|
---|
| 6504 |
|
---|
| 6505 | FLAG_N = NFLAG_32(res);
|
---|
| 6506 | FLAG_Z = res;
|
---|
| 6507 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6508 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6509 | }
|
---|
| 6510 |
|
---|
| 6511 |
|
---|
| 6512 | M68KMAKE_OP(move, 32, aw, d)
|
---|
| 6513 | {
|
---|
| 6514 | uint res = DY;
|
---|
| 6515 | uint ea = EA_AW_32();
|
---|
| 6516 |
|
---|
| 6517 | m68ki_write_32(ea, res);
|
---|
| 6518 |
|
---|
| 6519 | FLAG_N = NFLAG_32(res);
|
---|
| 6520 | FLAG_Z = res;
|
---|
| 6521 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6522 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6523 | }
|
---|
| 6524 |
|
---|
| 6525 |
|
---|
| 6526 | M68KMAKE_OP(move, 32, aw, a)
|
---|
| 6527 | {
|
---|
| 6528 | uint res = AY;
|
---|
| 6529 | uint ea = EA_AW_32();
|
---|
| 6530 |
|
---|
| 6531 | m68ki_write_32(ea, res);
|
---|
| 6532 |
|
---|
| 6533 | FLAG_N = NFLAG_32(res);
|
---|
| 6534 | FLAG_Z = res;
|
---|
| 6535 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6536 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6537 | }
|
---|
| 6538 |
|
---|
| 6539 |
|
---|
| 6540 | M68KMAKE_OP(move, 32, aw, .)
|
---|
| 6541 | {
|
---|
| 6542 | uint res = M68KMAKE_GET_OPER_AY_32;
|
---|
| 6543 | uint ea = EA_AW_32();
|
---|
| 6544 |
|
---|
| 6545 | m68ki_write_32(ea, res);
|
---|
| 6546 |
|
---|
| 6547 | FLAG_N = NFLAG_32(res);
|
---|
| 6548 | FLAG_Z = res;
|
---|
| 6549 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6550 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6551 | }
|
---|
| 6552 |
|
---|
| 6553 |
|
---|
| 6554 | M68KMAKE_OP(move, 32, al, d)
|
---|
| 6555 | {
|
---|
| 6556 | uint res = DY;
|
---|
| 6557 | uint ea = EA_AL_32();
|
---|
| 6558 |
|
---|
| 6559 | m68ki_write_32(ea, res);
|
---|
| 6560 |
|
---|
| 6561 | FLAG_N = NFLAG_32(res);
|
---|
| 6562 | FLAG_Z = res;
|
---|
| 6563 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6564 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6565 | }
|
---|
| 6566 |
|
---|
| 6567 |
|
---|
| 6568 | M68KMAKE_OP(move, 32, al, a)
|
---|
| 6569 | {
|
---|
| 6570 | uint res = AY;
|
---|
| 6571 | uint ea = EA_AL_32();
|
---|
| 6572 |
|
---|
| 6573 | m68ki_write_32(ea, res);
|
---|
| 6574 |
|
---|
| 6575 | FLAG_N = NFLAG_32(res);
|
---|
| 6576 | FLAG_Z = res;
|
---|
| 6577 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6578 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6579 | }
|
---|
| 6580 |
|
---|
| 6581 |
|
---|
| 6582 | M68KMAKE_OP(move, 32, al, .)
|
---|
| 6583 | {
|
---|
| 6584 | uint res = M68KMAKE_GET_OPER_AY_32;
|
---|
| 6585 | uint ea = EA_AL_32();
|
---|
| 6586 |
|
---|
| 6587 | m68ki_write_32(ea, res);
|
---|
| 6588 |
|
---|
| 6589 | FLAG_N = NFLAG_32(res);
|
---|
| 6590 | FLAG_Z = res;
|
---|
| 6591 | FLAG_V = VFLAG_CLEAR;
|
---|
| 6592 | FLAG_C = CFLAG_CLEAR;
|
---|
| 6593 | }
|
---|
| 6594 |
|
---|
| 6595 |
|
---|
| 6596 | M68KMAKE_OP(movea, 16, ., d)
|
---|
| 6597 | {
|
---|
| 6598 | AX = MAKE_INT_16(DY);
|
---|
| 6599 | }
|
---|
| 6600 |
|
---|
| 6601 |
|
---|
| 6602 | M68KMAKE_OP(movea, 16, ., a)
|
---|
| 6603 | {
|
---|
| 6604 | AX = MAKE_INT_16(AY);
|
---|
| 6605 | }
|
---|
| 6606 |
|
---|
| 6607 |
|
---|
| 6608 | M68KMAKE_OP(movea, 16, ., .)
|
---|
| 6609 | {
|
---|
| 6610 | AX = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
|
---|
| 6611 | }
|
---|
| 6612 |
|
---|
| 6613 |
|
---|
| 6614 | M68KMAKE_OP(movea, 32, ., d)
|
---|
| 6615 | {
|
---|
| 6616 | AX = DY;
|
---|
| 6617 | }
|
---|
| 6618 |
|
---|
| 6619 |
|
---|
| 6620 | M68KMAKE_OP(movea, 32, ., a)
|
---|
| 6621 | {
|
---|
| 6622 | AX = AY;
|
---|
| 6623 | }
|
---|
| 6624 |
|
---|
| 6625 |
|
---|
| 6626 | M68KMAKE_OP(movea, 32, ., .)
|
---|
| 6627 | {
|
---|
| 6628 | AX = M68KMAKE_GET_OPER_AY_32;
|
---|
| 6629 | }
|
---|
| 6630 |
|
---|
| 6631 |
|
---|
| 6632 | M68KMAKE_OP(move, 16, frc, d)
|
---|
| 6633 | {
|
---|
| 6634 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
|
---|
| 6635 | {
|
---|
| 6636 | DY = MASK_OUT_BELOW_16(DY) | m68ki_get_ccr();
|
---|
| 6637 | return;
|
---|
| 6638 | }
|
---|
| 6639 | m68ki_exception_illegal();
|
---|
| 6640 | }
|
---|
| 6641 |
|
---|
| 6642 |
|
---|
| 6643 | M68KMAKE_OP(move, 16, frc, .)
|
---|
| 6644 | {
|
---|
| 6645 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
|
---|
| 6646 | {
|
---|
| 6647 | m68ki_write_16(M68KMAKE_GET_EA_AY_16, m68ki_get_ccr());
|
---|
| 6648 | return;
|
---|
| 6649 | }
|
---|
| 6650 | m68ki_exception_illegal();
|
---|
| 6651 | }
|
---|
| 6652 |
|
---|
| 6653 |
|
---|
| 6654 | M68KMAKE_OP(move, 16, toc, d)
|
---|
| 6655 | {
|
---|
| 6656 | m68ki_set_ccr(DY);
|
---|
| 6657 | }
|
---|
| 6658 |
|
---|
| 6659 |
|
---|
| 6660 | M68KMAKE_OP(move, 16, toc, .)
|
---|
| 6661 | {
|
---|
| 6662 | m68ki_set_ccr(M68KMAKE_GET_OPER_AY_16);
|
---|
| 6663 | }
|
---|
| 6664 |
|
---|
| 6665 |
|
---|
| 6666 | M68KMAKE_OP(move, 16, frs, d)
|
---|
| 6667 | {
|
---|
| 6668 | if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */
|
---|
| 6669 | {
|
---|
| 6670 | DY = MASK_OUT_BELOW_16(DY) | m68ki_get_sr();
|
---|
| 6671 | return;
|
---|
| 6672 | }
|
---|
| 6673 | m68ki_exception_privilege_violation();
|
---|
| 6674 | }
|
---|
| 6675 |
|
---|
| 6676 |
|
---|
| 6677 | M68KMAKE_OP(move, 16, frs, .)
|
---|
| 6678 | {
|
---|
| 6679 | if(CPU_TYPE_IS_000(CPU_TYPE) || FLAG_S) /* NS990408 */
|
---|
| 6680 | {
|
---|
| 6681 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 6682 | m68ki_write_16(ea, m68ki_get_sr());
|
---|
| 6683 | return;
|
---|
| 6684 | }
|
---|
| 6685 | m68ki_exception_privilege_violation();
|
---|
| 6686 | }
|
---|
| 6687 |
|
---|
| 6688 |
|
---|
| 6689 | M68KMAKE_OP(move, 16, tos, d)
|
---|
| 6690 | {
|
---|
| 6691 | if(FLAG_S)
|
---|
| 6692 | {
|
---|
| 6693 | m68ki_set_sr(DY);
|
---|
| 6694 | return;
|
---|
| 6695 | }
|
---|
| 6696 | m68ki_exception_privilege_violation();
|
---|
| 6697 | }
|
---|
| 6698 |
|
---|
| 6699 |
|
---|
| 6700 | M68KMAKE_OP(move, 16, tos, .)
|
---|
| 6701 | {
|
---|
| 6702 | if(FLAG_S)
|
---|
| 6703 | {
|
---|
| 6704 | uint new_sr = M68KMAKE_GET_OPER_AY_16;
|
---|
| 6705 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 6706 | m68ki_set_sr(new_sr);
|
---|
| 6707 | return;
|
---|
| 6708 | }
|
---|
| 6709 | m68ki_exception_privilege_violation();
|
---|
| 6710 | }
|
---|
| 6711 |
|
---|
| 6712 |
|
---|
| 6713 | M68KMAKE_OP(move, 32, fru, .)
|
---|
| 6714 | {
|
---|
| 6715 | if(FLAG_S)
|
---|
| 6716 | {
|
---|
| 6717 | AY = REG_USP;
|
---|
| 6718 | return;
|
---|
| 6719 | }
|
---|
| 6720 | m68ki_exception_privilege_violation();
|
---|
| 6721 | }
|
---|
| 6722 |
|
---|
| 6723 |
|
---|
| 6724 | M68KMAKE_OP(move, 32, tou, .)
|
---|
| 6725 | {
|
---|
| 6726 | if(FLAG_S)
|
---|
| 6727 | {
|
---|
| 6728 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 6729 | REG_USP = AY;
|
---|
| 6730 | return;
|
---|
| 6731 | }
|
---|
| 6732 | m68ki_exception_privilege_violation();
|
---|
| 6733 | }
|
---|
| 6734 |
|
---|
| 6735 |
|
---|
| 6736 | M68KMAKE_OP(movec, 32, cr, .)
|
---|
| 6737 | {
|
---|
| 6738 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
|
---|
| 6739 | {
|
---|
| 6740 | if(FLAG_S)
|
---|
| 6741 | {
|
---|
| 6742 | uint word2 = OPER_I_16();
|
---|
| 6743 |
|
---|
| 6744 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 6745 | switch (word2 & 0xfff)
|
---|
| 6746 | {
|
---|
| 6747 | case 0x000: /* SFC */
|
---|
| 6748 | REG_DA[(word2 >> 12) & 15] = REG_SFC;
|
---|
| 6749 | return;
|
---|
| 6750 | case 0x001: /* DFC */
|
---|
| 6751 | REG_DA[(word2 >> 12) & 15] = REG_DFC;
|
---|
| 6752 | return;
|
---|
| 6753 | case 0x002: /* CACR */
|
---|
| 6754 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 6755 | {
|
---|
| 6756 | REG_DA[(word2 >> 12) & 15] = REG_CACR;
|
---|
| 6757 | return;
|
---|
| 6758 | }
|
---|
| 6759 | return;
|
---|
| 6760 | case 0x800: /* USP */
|
---|
| 6761 | REG_DA[(word2 >> 12) & 15] = REG_USP;
|
---|
| 6762 | return;
|
---|
| 6763 | case 0x801: /* VBR */
|
---|
| 6764 | REG_DA[(word2 >> 12) & 15] = REG_VBR;
|
---|
| 6765 | return;
|
---|
| 6766 | case 0x802: /* CAAR */
|
---|
| 6767 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 6768 | {
|
---|
| 6769 | REG_DA[(word2 >> 12) & 15] = REG_CAAR;
|
---|
| 6770 | return;
|
---|
| 6771 | }
|
---|
| 6772 | m68ki_exception_illegal();
|
---|
| 6773 | break;
|
---|
| 6774 | case 0x803: /* MSP */
|
---|
| 6775 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 6776 | {
|
---|
| 6777 | REG_DA[(word2 >> 12) & 15] = FLAG_M ? REG_SP : REG_MSP;
|
---|
| 6778 | return;
|
---|
| 6779 | }
|
---|
| 6780 | m68ki_exception_illegal();
|
---|
| 6781 | return;
|
---|
| 6782 | case 0x804: /* ISP */
|
---|
| 6783 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 6784 | {
|
---|
| 6785 | REG_DA[(word2 >> 12) & 15] = FLAG_M ? REG_ISP : REG_SP;
|
---|
| 6786 | return;
|
---|
| 6787 | }
|
---|
| 6788 | m68ki_exception_illegal();
|
---|
| 6789 | return;
|
---|
| 6790 | default:
|
---|
| 6791 | m68ki_exception_illegal();
|
---|
| 6792 | return;
|
---|
| 6793 | }
|
---|
| 6794 | }
|
---|
| 6795 | m68ki_exception_privilege_violation();
|
---|
| 6796 | return;
|
---|
| 6797 | }
|
---|
| 6798 | m68ki_exception_illegal();
|
---|
| 6799 | }
|
---|
| 6800 |
|
---|
| 6801 |
|
---|
| 6802 | M68KMAKE_OP(movec, 32, rc, .)
|
---|
| 6803 | {
|
---|
| 6804 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
|
---|
| 6805 | {
|
---|
| 6806 | if(FLAG_S)
|
---|
| 6807 | {
|
---|
| 6808 | uint word2 = OPER_I_16();
|
---|
| 6809 |
|
---|
| 6810 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 6811 | switch (word2 & 0xfff)
|
---|
| 6812 | {
|
---|
| 6813 | case 0x000: /* SFC */
|
---|
| 6814 | REG_SFC = REG_DA[(word2 >> 12) & 15] & 7;
|
---|
| 6815 | return;
|
---|
| 6816 | case 0x001: /* DFC */
|
---|
| 6817 | REG_DFC = REG_DA[(word2 >> 12) & 15] & 7;
|
---|
| 6818 | return;
|
---|
| 6819 | case 0x002: /* CACR */
|
---|
| 6820 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 6821 | {
|
---|
| 6822 | REG_CACR = REG_DA[(word2 >> 12) & 15];
|
---|
| 6823 | return;
|
---|
| 6824 | }
|
---|
| 6825 | m68ki_exception_illegal();
|
---|
| 6826 | return;
|
---|
| 6827 | case 0x800: /* USP */
|
---|
| 6828 | REG_USP = REG_DA[(word2 >> 12) & 15];
|
---|
| 6829 | return;
|
---|
| 6830 | case 0x801: /* VBR */
|
---|
| 6831 | REG_VBR = REG_DA[(word2 >> 12) & 15];
|
---|
| 6832 | return;
|
---|
| 6833 | case 0x802: /* CAAR */
|
---|
| 6834 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 6835 | {
|
---|
| 6836 | REG_CAAR = REG_DA[(word2 >> 12) & 15];
|
---|
| 6837 | return;
|
---|
| 6838 | }
|
---|
| 6839 | m68ki_exception_illegal();
|
---|
| 6840 | return;
|
---|
| 6841 | case 0x803: /* MSP */
|
---|
| 6842 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 6843 | {
|
---|
| 6844 | /* we are in supervisor mode so just check for M flag */
|
---|
| 6845 | if(!FLAG_M)
|
---|
| 6846 | {
|
---|
| 6847 | REG_MSP = REG_DA[(word2 >> 12) & 15];
|
---|
| 6848 | return;
|
---|
| 6849 | }
|
---|
| 6850 | REG_SP = REG_DA[(word2 >> 12) & 15];
|
---|
| 6851 | return;
|
---|
| 6852 | }
|
---|
| 6853 | m68ki_exception_illegal();
|
---|
| 6854 | return;
|
---|
| 6855 | case 0x804: /* ISP */
|
---|
| 6856 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 6857 | {
|
---|
| 6858 | if(!FLAG_M)
|
---|
| 6859 | {
|
---|
| 6860 | REG_SP = REG_DA[(word2 >> 12) & 15];
|
---|
| 6861 | return;
|
---|
| 6862 | }
|
---|
| 6863 | REG_ISP = REG_DA[(word2 >> 12) & 15];
|
---|
| 6864 | return;
|
---|
| 6865 | }
|
---|
| 6866 | m68ki_exception_illegal();
|
---|
| 6867 | return;
|
---|
| 6868 | default:
|
---|
| 6869 | m68ki_exception_illegal();
|
---|
| 6870 | return;
|
---|
| 6871 | }
|
---|
| 6872 | }
|
---|
| 6873 | m68ki_exception_privilege_violation();
|
---|
| 6874 | return;
|
---|
| 6875 | }
|
---|
| 6876 | m68ki_exception_illegal();
|
---|
| 6877 | }
|
---|
| 6878 |
|
---|
| 6879 |
|
---|
| 6880 | M68KMAKE_OP(movem, 16, re, pd)
|
---|
| 6881 | {
|
---|
| 6882 | uint i = 0;
|
---|
| 6883 | uint register_list = OPER_I_16();
|
---|
| 6884 | uint ea = AY;
|
---|
| 6885 | uint count = 0;
|
---|
| 6886 |
|
---|
| 6887 | for(; i < 16; i++)
|
---|
| 6888 | if(register_list & (1 << i))
|
---|
| 6889 | {
|
---|
| 6890 | ea -= 2;
|
---|
| 6891 | m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA[15-i]));
|
---|
| 6892 | count++;
|
---|
| 6893 | }
|
---|
| 6894 | AY = ea;
|
---|
| 6895 |
|
---|
| 6896 | USE_CYCLES(count<<CYC_MOVEM_W);
|
---|
| 6897 | }
|
---|
| 6898 |
|
---|
| 6899 |
|
---|
| 6900 | M68KMAKE_OP(movem, 16, re, .)
|
---|
| 6901 | {
|
---|
| 6902 | uint i = 0;
|
---|
| 6903 | uint register_list = OPER_I_16();
|
---|
| 6904 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 6905 | uint count = 0;
|
---|
| 6906 |
|
---|
| 6907 | for(; i < 16; i++)
|
---|
| 6908 | if(register_list & (1 << i))
|
---|
| 6909 | {
|
---|
| 6910 | m68ki_write_16(ea, MASK_OUT_ABOVE_16(REG_DA[i]));
|
---|
| 6911 | ea += 2;
|
---|
| 6912 | count++;
|
---|
| 6913 | }
|
---|
| 6914 |
|
---|
| 6915 | USE_CYCLES(count<<CYC_MOVEM_W);
|
---|
| 6916 | }
|
---|
| 6917 |
|
---|
| 6918 |
|
---|
| 6919 | M68KMAKE_OP(movem, 32, re, pd)
|
---|
| 6920 | {
|
---|
| 6921 | uint i = 0;
|
---|
| 6922 | uint register_list = OPER_I_16();
|
---|
| 6923 | uint ea = AY;
|
---|
| 6924 | uint count = 0;
|
---|
| 6925 |
|
---|
| 6926 | for(; i < 16; i++)
|
---|
| 6927 | if(register_list & (1 << i))
|
---|
| 6928 | {
|
---|
| 6929 | ea -= 4;
|
---|
| 6930 | m68ki_write_32(ea, REG_DA[15-i]);
|
---|
| 6931 | count++;
|
---|
| 6932 | }
|
---|
| 6933 | AY = ea;
|
---|
| 6934 |
|
---|
| 6935 | USE_CYCLES(count<<CYC_MOVEM_L);
|
---|
| 6936 | }
|
---|
| 6937 |
|
---|
| 6938 |
|
---|
| 6939 | M68KMAKE_OP(movem, 32, re, .)
|
---|
| 6940 | {
|
---|
| 6941 | uint i = 0;
|
---|
| 6942 | uint register_list = OPER_I_16();
|
---|
| 6943 | uint ea = M68KMAKE_GET_EA_AY_32;
|
---|
| 6944 | uint count = 0;
|
---|
| 6945 |
|
---|
| 6946 | for(; i < 16; i++)
|
---|
| 6947 | if(register_list & (1 << i))
|
---|
| 6948 | {
|
---|
| 6949 | m68ki_write_32(ea, REG_DA[i]);
|
---|
| 6950 | ea += 4;
|
---|
| 6951 | count++;
|
---|
| 6952 | }
|
---|
| 6953 |
|
---|
| 6954 | USE_CYCLES(count<<CYC_MOVEM_L);
|
---|
| 6955 | }
|
---|
| 6956 |
|
---|
| 6957 |
|
---|
| 6958 | M68KMAKE_OP(movem, 16, er, pi)
|
---|
| 6959 | {
|
---|
| 6960 | uint i = 0;
|
---|
| 6961 | uint register_list = OPER_I_16();
|
---|
| 6962 | uint ea = AY;
|
---|
| 6963 | uint count = 0;
|
---|
| 6964 |
|
---|
| 6965 | for(; i < 16; i++)
|
---|
| 6966 | if(register_list & (1 << i))
|
---|
| 6967 | {
|
---|
| 6968 | REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea)));
|
---|
| 6969 | ea += 2;
|
---|
| 6970 | count++;
|
---|
| 6971 | }
|
---|
| 6972 | AY = ea;
|
---|
| 6973 |
|
---|
| 6974 | USE_CYCLES(count<<CYC_MOVEM_W);
|
---|
| 6975 | }
|
---|
| 6976 |
|
---|
| 6977 |
|
---|
| 6978 | M68KMAKE_OP(movem, 16, er, pcdi)
|
---|
| 6979 | {
|
---|
| 6980 | uint i = 0;
|
---|
| 6981 | uint register_list = OPER_I_16();
|
---|
| 6982 | uint ea = EA_PCDI_16();
|
---|
| 6983 | uint count = 0;
|
---|
| 6984 |
|
---|
| 6985 | for(; i < 16; i++)
|
---|
| 6986 | if(register_list & (1 << i))
|
---|
| 6987 | {
|
---|
| 6988 | REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_pcrel_16(ea)));
|
---|
| 6989 | ea += 2;
|
---|
| 6990 | count++;
|
---|
| 6991 | }
|
---|
| 6992 |
|
---|
| 6993 | USE_CYCLES(count<<CYC_MOVEM_W);
|
---|
| 6994 | }
|
---|
| 6995 |
|
---|
| 6996 |
|
---|
| 6997 | M68KMAKE_OP(movem, 16, er, pcix)
|
---|
| 6998 | {
|
---|
| 6999 | uint i = 0;
|
---|
| 7000 | uint register_list = OPER_I_16();
|
---|
| 7001 | uint ea = EA_PCIX_16();
|
---|
| 7002 | uint count = 0;
|
---|
| 7003 |
|
---|
| 7004 | for(; i < 16; i++)
|
---|
| 7005 | if(register_list & (1 << i))
|
---|
| 7006 | {
|
---|
| 7007 | REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_pcrel_16(ea)));
|
---|
| 7008 | ea += 2;
|
---|
| 7009 | count++;
|
---|
| 7010 | }
|
---|
| 7011 |
|
---|
| 7012 | USE_CYCLES(count<<CYC_MOVEM_W);
|
---|
| 7013 | }
|
---|
| 7014 |
|
---|
| 7015 |
|
---|
| 7016 | M68KMAKE_OP(movem, 16, er, .)
|
---|
| 7017 | {
|
---|
| 7018 | uint i = 0;
|
---|
| 7019 | uint register_list = OPER_I_16();
|
---|
| 7020 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 7021 | uint count = 0;
|
---|
| 7022 |
|
---|
| 7023 | for(; i < 16; i++)
|
---|
| 7024 | if(register_list & (1 << i))
|
---|
| 7025 | {
|
---|
| 7026 | REG_DA[i] = MAKE_INT_16(MASK_OUT_ABOVE_16(m68ki_read_16(ea)));
|
---|
| 7027 | ea += 2;
|
---|
| 7028 | count++;
|
---|
| 7029 | }
|
---|
| 7030 |
|
---|
| 7031 | USE_CYCLES(count<<CYC_MOVEM_W);
|
---|
| 7032 | }
|
---|
| 7033 |
|
---|
| 7034 |
|
---|
| 7035 | M68KMAKE_OP(movem, 32, er, pi)
|
---|
| 7036 | {
|
---|
| 7037 | uint i = 0;
|
---|
| 7038 | uint register_list = OPER_I_16();
|
---|
| 7039 | uint ea = AY;
|
---|
| 7040 | uint count = 0;
|
---|
| 7041 |
|
---|
| 7042 | for(; i < 16; i++)
|
---|
| 7043 | if(register_list & (1 << i))
|
---|
| 7044 | {
|
---|
| 7045 | REG_DA[i] = m68ki_read_32(ea);
|
---|
| 7046 | ea += 4;
|
---|
| 7047 | count++;
|
---|
| 7048 | }
|
---|
| 7049 | AY = ea;
|
---|
| 7050 |
|
---|
| 7051 | USE_CYCLES(count<<CYC_MOVEM_L);
|
---|
| 7052 | }
|
---|
| 7053 |
|
---|
| 7054 |
|
---|
| 7055 | M68KMAKE_OP(movem, 32, er, pcdi)
|
---|
| 7056 | {
|
---|
| 7057 | uint i = 0;
|
---|
| 7058 | uint register_list = OPER_I_16();
|
---|
| 7059 | uint ea = EA_PCDI_32();
|
---|
| 7060 | uint count = 0;
|
---|
| 7061 |
|
---|
| 7062 | for(; i < 16; i++)
|
---|
| 7063 | if(register_list & (1 << i))
|
---|
| 7064 | {
|
---|
| 7065 | REG_DA[i] = m68ki_read_pcrel_32(ea);
|
---|
| 7066 | ea += 4;
|
---|
| 7067 | count++;
|
---|
| 7068 | }
|
---|
| 7069 |
|
---|
| 7070 | USE_CYCLES(count<<CYC_MOVEM_L);
|
---|
| 7071 | }
|
---|
| 7072 |
|
---|
| 7073 |
|
---|
| 7074 | M68KMAKE_OP(movem, 32, er, pcix)
|
---|
| 7075 | {
|
---|
| 7076 | uint i = 0;
|
---|
| 7077 | uint register_list = OPER_I_16();
|
---|
| 7078 | uint ea = EA_PCIX_32();
|
---|
| 7079 | uint count = 0;
|
---|
| 7080 |
|
---|
| 7081 | for(; i < 16; i++)
|
---|
| 7082 | if(register_list & (1 << i))
|
---|
| 7083 | {
|
---|
| 7084 | REG_DA[i] = m68ki_read_pcrel_32(ea);
|
---|
| 7085 | ea += 4;
|
---|
| 7086 | count++;
|
---|
| 7087 | }
|
---|
| 7088 |
|
---|
| 7089 | USE_CYCLES(count<<CYC_MOVEM_L);
|
---|
| 7090 | }
|
---|
| 7091 |
|
---|
| 7092 |
|
---|
| 7093 | M68KMAKE_OP(movem, 32, er, .)
|
---|
| 7094 | {
|
---|
| 7095 | uint i = 0;
|
---|
| 7096 | uint register_list = OPER_I_16();
|
---|
| 7097 | uint ea = M68KMAKE_GET_EA_AY_32;
|
---|
| 7098 | uint count = 0;
|
---|
| 7099 |
|
---|
| 7100 | for(; i < 16; i++)
|
---|
| 7101 | if(register_list & (1 << i))
|
---|
| 7102 | {
|
---|
| 7103 | REG_DA[i] = m68ki_read_32(ea);
|
---|
| 7104 | ea += 4;
|
---|
| 7105 | count++;
|
---|
| 7106 | }
|
---|
| 7107 |
|
---|
| 7108 | USE_CYCLES(count<<CYC_MOVEM_L);
|
---|
| 7109 | }
|
---|
| 7110 |
|
---|
| 7111 |
|
---|
| 7112 | M68KMAKE_OP(movep, 16, re, .)
|
---|
| 7113 | {
|
---|
| 7114 | uint ea = EA_AY_DI_16();
|
---|
| 7115 | uint src = DX;
|
---|
| 7116 |
|
---|
| 7117 | m68ki_write_8(ea, MASK_OUT_ABOVE_8(src >> 8));
|
---|
| 7118 | m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src));
|
---|
| 7119 | }
|
---|
| 7120 |
|
---|
| 7121 |
|
---|
| 7122 | M68KMAKE_OP(movep, 32, re, .)
|
---|
| 7123 | {
|
---|
| 7124 | uint ea = EA_AY_DI_32();
|
---|
| 7125 | uint src = DX;
|
---|
| 7126 |
|
---|
| 7127 | m68ki_write_8(ea, MASK_OUT_ABOVE_8(src >> 24));
|
---|
| 7128 | m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src >> 16));
|
---|
| 7129 | m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src >> 8));
|
---|
| 7130 | m68ki_write_8(ea += 2, MASK_OUT_ABOVE_8(src));
|
---|
| 7131 | }
|
---|
| 7132 |
|
---|
| 7133 |
|
---|
| 7134 | M68KMAKE_OP(movep, 16, er, .)
|
---|
| 7135 | {
|
---|
| 7136 | uint ea = EA_AY_DI_16();
|
---|
| 7137 | uint* r_dst = &DX;
|
---|
| 7138 |
|
---|
| 7139 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | ((m68ki_read_8(ea) << 8) + m68ki_read_8(ea + 2));
|
---|
| 7140 | }
|
---|
| 7141 |
|
---|
| 7142 |
|
---|
| 7143 | M68KMAKE_OP(movep, 32, er, .)
|
---|
| 7144 | {
|
---|
| 7145 | uint ea = EA_AY_DI_32();
|
---|
| 7146 |
|
---|
| 7147 | DX = (m68ki_read_8(ea) << 24) + (m68ki_read_8(ea + 2) << 16)
|
---|
| 7148 | + (m68ki_read_8(ea + 4) << 8) + m68ki_read_8(ea + 6);
|
---|
| 7149 | }
|
---|
| 7150 |
|
---|
| 7151 |
|
---|
| 7152 | M68KMAKE_OP(moves, 8, ., .)
|
---|
| 7153 | {
|
---|
| 7154 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
|
---|
| 7155 | {
|
---|
| 7156 | if(FLAG_S)
|
---|
| 7157 | {
|
---|
| 7158 | uint word2 = OPER_I_16();
|
---|
| 7159 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 7160 |
|
---|
| 7161 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 7162 | if(BIT_B(word2)) /* Register to memory */
|
---|
| 7163 | {
|
---|
| 7164 | m68ki_write_8_fc(ea, REG_DFC, MASK_OUT_ABOVE_8(REG_DA[(word2 >> 12) & 15]));
|
---|
| 7165 | return;
|
---|
| 7166 | }
|
---|
| 7167 | if(BIT_F(word2)) /* Memory to address register */
|
---|
| 7168 | {
|
---|
| 7169 | REG_A[(word2 >> 12) & 7] = MAKE_INT_8(m68ki_read_8_fc(ea, REG_SFC));
|
---|
| 7170 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
|
---|
| 7171 | USE_CYCLES(2);
|
---|
| 7172 | return;
|
---|
| 7173 | }
|
---|
| 7174 | /* Memory to data register */
|
---|
| 7175 | REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_8(REG_D[(word2 >> 12) & 7]) | m68ki_read_8_fc(ea, REG_SFC);
|
---|
| 7176 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
|
---|
| 7177 | USE_CYCLES(2);
|
---|
| 7178 | return;
|
---|
| 7179 | }
|
---|
| 7180 | m68ki_exception_privilege_violation();
|
---|
| 7181 | return;
|
---|
| 7182 | }
|
---|
| 7183 | m68ki_exception_illegal();
|
---|
| 7184 | }
|
---|
| 7185 |
|
---|
| 7186 |
|
---|
| 7187 | M68KMAKE_OP(moves, 16, ., .)
|
---|
| 7188 | {
|
---|
| 7189 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
|
---|
| 7190 | {
|
---|
| 7191 | if(FLAG_S)
|
---|
| 7192 | {
|
---|
| 7193 | uint word2 = OPER_I_16();
|
---|
| 7194 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 7195 |
|
---|
| 7196 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 7197 | if(BIT_B(word2)) /* Register to memory */
|
---|
| 7198 | {
|
---|
| 7199 | m68ki_write_16_fc(ea, REG_DFC, MASK_OUT_ABOVE_16(REG_DA[(word2 >> 12) & 15]));
|
---|
| 7200 | return;
|
---|
| 7201 | }
|
---|
| 7202 | if(BIT_F(word2)) /* Memory to address register */
|
---|
| 7203 | {
|
---|
| 7204 | REG_A[(word2 >> 12) & 7] = MAKE_INT_16(m68ki_read_16_fc(ea, REG_SFC));
|
---|
| 7205 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
|
---|
| 7206 | USE_CYCLES(2);
|
---|
| 7207 | return;
|
---|
| 7208 | }
|
---|
| 7209 | /* Memory to data register */
|
---|
| 7210 | REG_D[(word2 >> 12) & 7] = MASK_OUT_BELOW_16(REG_D[(word2 >> 12) & 7]) | m68ki_read_16_fc(ea, REG_SFC);
|
---|
| 7211 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
|
---|
| 7212 | USE_CYCLES(2);
|
---|
| 7213 | return;
|
---|
| 7214 | }
|
---|
| 7215 | m68ki_exception_privilege_violation();
|
---|
| 7216 | return;
|
---|
| 7217 | }
|
---|
| 7218 | m68ki_exception_illegal();
|
---|
| 7219 | }
|
---|
| 7220 |
|
---|
| 7221 |
|
---|
| 7222 | M68KMAKE_OP(moves, 32, ., .)
|
---|
| 7223 | {
|
---|
| 7224 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
|
---|
| 7225 | {
|
---|
| 7226 | if(FLAG_S)
|
---|
| 7227 | {
|
---|
| 7228 | uint word2 = OPER_I_16();
|
---|
| 7229 | uint ea = M68KMAKE_GET_EA_AY_32;
|
---|
| 7230 |
|
---|
| 7231 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 7232 | if(BIT_B(word2)) /* Register to memory */
|
---|
| 7233 | {
|
---|
| 7234 | m68ki_write_32_fc(ea, REG_DFC, REG_DA[(word2 >> 12) & 15]);
|
---|
| 7235 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
|
---|
| 7236 | USE_CYCLES(2);
|
---|
| 7237 | return;
|
---|
| 7238 | }
|
---|
| 7239 | /* Memory to register */
|
---|
| 7240 | REG_DA[(word2 >> 12) & 15] = m68ki_read_32_fc(ea, REG_SFC);
|
---|
| 7241 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
|
---|
| 7242 | USE_CYCLES(2);
|
---|
| 7243 | return;
|
---|
| 7244 | }
|
---|
| 7245 | m68ki_exception_privilege_violation();
|
---|
| 7246 | return;
|
---|
| 7247 | }
|
---|
| 7248 | m68ki_exception_illegal();
|
---|
| 7249 | }
|
---|
| 7250 |
|
---|
| 7251 |
|
---|
| 7252 | M68KMAKE_OP(moveq, 32, ., .)
|
---|
| 7253 | {
|
---|
| 7254 | uint res = DX = MAKE_INT_8(MASK_OUT_ABOVE_8(REG_IR));
|
---|
| 7255 |
|
---|
| 7256 | FLAG_N = NFLAG_32(res);
|
---|
| 7257 | FLAG_Z = res;
|
---|
| 7258 | FLAG_V = VFLAG_CLEAR;
|
---|
| 7259 | FLAG_C = CFLAG_CLEAR;
|
---|
| 7260 | }
|
---|
| 7261 |
|
---|
| 7262 |
|
---|
| 7263 | M68KMAKE_OP(muls, 16, ., d)
|
---|
| 7264 | {
|
---|
| 7265 | uint* r_dst = &DX;
|
---|
| 7266 | uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(DY) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));
|
---|
| 7267 |
|
---|
| 7268 | *r_dst = res;
|
---|
| 7269 |
|
---|
| 7270 | FLAG_Z = res;
|
---|
| 7271 | FLAG_N = NFLAG_32(res);
|
---|
| 7272 | FLAG_V = VFLAG_CLEAR;
|
---|
| 7273 | FLAG_C = CFLAG_CLEAR;
|
---|
| 7274 | }
|
---|
| 7275 |
|
---|
| 7276 |
|
---|
| 7277 | M68KMAKE_OP(muls, 16, ., .)
|
---|
| 7278 | {
|
---|
| 7279 | uint* r_dst = &DX;
|
---|
| 7280 | uint res = MASK_OUT_ABOVE_32(MAKE_INT_16(M68KMAKE_GET_OPER_AY_16) * MAKE_INT_16(MASK_OUT_ABOVE_16(*r_dst)));
|
---|
| 7281 |
|
---|
| 7282 | *r_dst = res;
|
---|
| 7283 |
|
---|
| 7284 | FLAG_Z = res;
|
---|
| 7285 | FLAG_N = NFLAG_32(res);
|
---|
| 7286 | FLAG_V = VFLAG_CLEAR;
|
---|
| 7287 | FLAG_C = CFLAG_CLEAR;
|
---|
| 7288 | }
|
---|
| 7289 |
|
---|
| 7290 |
|
---|
| 7291 | M68KMAKE_OP(mulu, 16, ., d)
|
---|
| 7292 | {
|
---|
| 7293 | uint* r_dst = &DX;
|
---|
| 7294 | uint res = MASK_OUT_ABOVE_16(DY) * MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 7295 |
|
---|
| 7296 | *r_dst = res;
|
---|
| 7297 |
|
---|
| 7298 | FLAG_Z = res;
|
---|
| 7299 | FLAG_N = NFLAG_32(res);
|
---|
| 7300 | FLAG_V = VFLAG_CLEAR;
|
---|
| 7301 | FLAG_C = CFLAG_CLEAR;
|
---|
| 7302 | }
|
---|
| 7303 |
|
---|
| 7304 |
|
---|
| 7305 | M68KMAKE_OP(mulu, 16, ., .)
|
---|
| 7306 | {
|
---|
| 7307 | uint* r_dst = &DX;
|
---|
| 7308 | uint res = M68KMAKE_GET_OPER_AY_16 * MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 7309 |
|
---|
| 7310 | *r_dst = res;
|
---|
| 7311 |
|
---|
| 7312 | FLAG_Z = res;
|
---|
| 7313 | FLAG_N = NFLAG_32(res);
|
---|
| 7314 | FLAG_V = VFLAG_CLEAR;
|
---|
| 7315 | FLAG_C = CFLAG_CLEAR;
|
---|
| 7316 | }
|
---|
| 7317 |
|
---|
| 7318 |
|
---|
| 7319 | M68KMAKE_OP(mull, 32, ., d)
|
---|
| 7320 | {
|
---|
| 7321 | #if M68K_USE_64_BIT
|
---|
| 7322 |
|
---|
| 7323 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 7324 | {
|
---|
| 7325 | uint word2 = OPER_I_16();
|
---|
| 7326 | uint64 src = DY;
|
---|
| 7327 | uint64 dst = REG_D[(word2 >> 12) & 7];
|
---|
| 7328 | uint64 res;
|
---|
| 7329 |
|
---|
| 7330 | FLAG_C = CFLAG_CLEAR;
|
---|
| 7331 |
|
---|
| 7332 | if(BIT_B(word2)) /* signed */
|
---|
| 7333 | {
|
---|
| 7334 | res = (sint64)((sint32)src) * (sint64)((sint32)dst);
|
---|
| 7335 | if(!BIT_A(word2))
|
---|
| 7336 | {
|
---|
| 7337 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 7338 | FLAG_N = NFLAG_32(res);
|
---|
| 7339 | FLAG_V = ((sint64)res != (sint32)res)<<7;
|
---|
| 7340 | REG_D[(word2 >> 12) & 7] = FLAG_Z;
|
---|
| 7341 | return;
|
---|
| 7342 | }
|
---|
| 7343 | FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
|
---|
| 7344 | FLAG_N = NFLAG_64(res);
|
---|
| 7345 | FLAG_V = VFLAG_CLEAR;
|
---|
| 7346 | REG_D[word2 & 7] = (res >> 32);
|
---|
| 7347 | REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
|
---|
| 7348 | return;
|
---|
| 7349 | }
|
---|
| 7350 |
|
---|
| 7351 | res = src * dst;
|
---|
| 7352 | if(!BIT_A(word2))
|
---|
| 7353 | {
|
---|
| 7354 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 7355 | FLAG_N = NFLAG_32(res);
|
---|
| 7356 | FLAG_V = (res > 0xffffffff)<<7;
|
---|
| 7357 | REG_D[(word2 >> 12) & 7] = FLAG_Z;
|
---|
| 7358 | return;
|
---|
| 7359 | }
|
---|
| 7360 | FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
|
---|
| 7361 | FLAG_N = NFLAG_64(res);
|
---|
| 7362 | FLAG_V = VFLAG_CLEAR;
|
---|
| 7363 | REG_D[word2 & 7] = (res >> 32);
|
---|
| 7364 | REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
|
---|
| 7365 | return;
|
---|
| 7366 | }
|
---|
| 7367 | m68ki_exception_illegal();
|
---|
| 7368 |
|
---|
| 7369 | #else
|
---|
| 7370 |
|
---|
| 7371 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 7372 | {
|
---|
| 7373 | uint word2 = OPER_I_16();
|
---|
| 7374 | uint src = DY;
|
---|
| 7375 | uint dst = REG_D[(word2 >> 12) & 7];
|
---|
| 7376 | uint neg = GET_MSB_32(src ^ dst);
|
---|
| 7377 | uint src1;
|
---|
| 7378 | uint src2;
|
---|
| 7379 | uint dst1;
|
---|
| 7380 | uint dst2;
|
---|
| 7381 | uint r1;
|
---|
| 7382 | uint r2;
|
---|
| 7383 | uint r3;
|
---|
| 7384 | uint r4;
|
---|
| 7385 | uint lo;
|
---|
| 7386 | uint hi;
|
---|
| 7387 |
|
---|
| 7388 | FLAG_C = CFLAG_CLEAR;
|
---|
| 7389 |
|
---|
| 7390 | if(BIT_B(word2)) /* signed */
|
---|
| 7391 | {
|
---|
| 7392 | if(GET_MSB_32(src))
|
---|
| 7393 | src = (uint)MASK_OUT_ABOVE_32(-(sint)src);
|
---|
| 7394 | if(GET_MSB_32(dst))
|
---|
| 7395 | dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);
|
---|
| 7396 | }
|
---|
| 7397 |
|
---|
| 7398 | src1 = MASK_OUT_ABOVE_16(src);
|
---|
| 7399 | src2 = src>>16;
|
---|
| 7400 | dst1 = MASK_OUT_ABOVE_16(dst);
|
---|
| 7401 | dst2 = dst>>16;
|
---|
| 7402 |
|
---|
| 7403 |
|
---|
| 7404 | r1 = src1 * dst1;
|
---|
| 7405 | r2 = src1 * dst2;
|
---|
| 7406 | r3 = src2 * dst1;
|
---|
| 7407 | r4 = src2 * dst2;
|
---|
| 7408 |
|
---|
| 7409 | lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);
|
---|
| 7410 | hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);
|
---|
| 7411 |
|
---|
| 7412 | if(BIT_B(word2) && neg)
|
---|
| 7413 | {
|
---|
| 7414 | hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));
|
---|
| 7415 | lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);
|
---|
| 7416 | }
|
---|
| 7417 |
|
---|
| 7418 | if(BIT_A(word2))
|
---|
| 7419 | {
|
---|
| 7420 | REG_D[word2 & 7] = hi;
|
---|
| 7421 | REG_D[(word2 >> 12) & 7] = lo;
|
---|
| 7422 | FLAG_N = NFLAG_32(hi);
|
---|
| 7423 | FLAG_Z = hi | lo;
|
---|
| 7424 | FLAG_V = VFLAG_CLEAR;
|
---|
| 7425 | return;
|
---|
| 7426 | }
|
---|
| 7427 |
|
---|
| 7428 | REG_D[(word2 >> 12) & 7] = lo;
|
---|
| 7429 | FLAG_N = NFLAG_32(lo);
|
---|
| 7430 | FLAG_Z = lo;
|
---|
| 7431 | if(BIT_B(word2))
|
---|
| 7432 | FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;
|
---|
| 7433 | else
|
---|
| 7434 | FLAG_V = (hi != 0) << 7;
|
---|
| 7435 | return;
|
---|
| 7436 | }
|
---|
| 7437 | m68ki_exception_illegal();
|
---|
| 7438 |
|
---|
| 7439 | #endif
|
---|
| 7440 | }
|
---|
| 7441 |
|
---|
| 7442 |
|
---|
| 7443 | M68KMAKE_OP(mull, 32, ., .)
|
---|
| 7444 | {
|
---|
| 7445 | #if M68K_USE_64_BIT
|
---|
| 7446 |
|
---|
| 7447 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 7448 | {
|
---|
| 7449 | uint word2 = OPER_I_16();
|
---|
| 7450 | uint64 src = M68KMAKE_GET_OPER_AY_32;
|
---|
| 7451 | uint64 dst = REG_D[(word2 >> 12) & 7];
|
---|
| 7452 | uint64 res;
|
---|
| 7453 |
|
---|
| 7454 | FLAG_C = CFLAG_CLEAR;
|
---|
| 7455 |
|
---|
| 7456 | if(BIT_B(word2)) /* signed */
|
---|
| 7457 | {
|
---|
| 7458 | res = (sint64)((sint32)src) * (sint64)((sint32)dst);
|
---|
| 7459 | if(!BIT_A(word2))
|
---|
| 7460 | {
|
---|
| 7461 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 7462 | FLAG_N = NFLAG_32(res);
|
---|
| 7463 | FLAG_V = ((sint64)res != (sint32)res)<<7;
|
---|
| 7464 | REG_D[(word2 >> 12) & 7] = FLAG_Z;
|
---|
| 7465 | return;
|
---|
| 7466 | }
|
---|
| 7467 | FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
|
---|
| 7468 | FLAG_N = NFLAG_64(res);
|
---|
| 7469 | FLAG_V = VFLAG_CLEAR;
|
---|
| 7470 | REG_D[word2 & 7] = (res >> 32);
|
---|
| 7471 | REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
|
---|
| 7472 | return;
|
---|
| 7473 | }
|
---|
| 7474 |
|
---|
| 7475 | res = src * dst;
|
---|
| 7476 | if(!BIT_A(word2))
|
---|
| 7477 | {
|
---|
| 7478 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 7479 | FLAG_N = NFLAG_32(res);
|
---|
| 7480 | FLAG_V = (res > 0xffffffff)<<7;
|
---|
| 7481 | REG_D[(word2 >> 12) & 7] = FLAG_Z;
|
---|
| 7482 | return;
|
---|
| 7483 | }
|
---|
| 7484 | FLAG_Z = MASK_OUT_ABOVE_32(res) | (res>>32);
|
---|
| 7485 | FLAG_N = NFLAG_64(res);
|
---|
| 7486 | FLAG_V = VFLAG_CLEAR;
|
---|
| 7487 | REG_D[word2 & 7] = (res >> 32);
|
---|
| 7488 | REG_D[(word2 >> 12) & 7] = MASK_OUT_ABOVE_32(res);
|
---|
| 7489 | return;
|
---|
| 7490 | }
|
---|
| 7491 | m68ki_exception_illegal();
|
---|
| 7492 |
|
---|
| 7493 | #else
|
---|
| 7494 |
|
---|
| 7495 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 7496 | {
|
---|
| 7497 | uint word2 = OPER_I_16();
|
---|
| 7498 | uint src = M68KMAKE_GET_OPER_AY_32;
|
---|
| 7499 | uint dst = REG_D[(word2 >> 12) & 7];
|
---|
| 7500 | uint neg = GET_MSB_32(src ^ dst);
|
---|
| 7501 | uint src1;
|
---|
| 7502 | uint src2;
|
---|
| 7503 | uint dst1;
|
---|
| 7504 | uint dst2;
|
---|
| 7505 | uint r1;
|
---|
| 7506 | uint r2;
|
---|
| 7507 | uint r3;
|
---|
| 7508 | uint r4;
|
---|
| 7509 | uint lo;
|
---|
| 7510 | uint hi;
|
---|
| 7511 |
|
---|
| 7512 | FLAG_C = CFLAG_CLEAR;
|
---|
| 7513 |
|
---|
| 7514 | if(BIT_B(word2)) /* signed */
|
---|
| 7515 | {
|
---|
| 7516 | if(GET_MSB_32(src))
|
---|
| 7517 | src = (uint)MASK_OUT_ABOVE_32(-(sint)src);
|
---|
| 7518 | if(GET_MSB_32(dst))
|
---|
| 7519 | dst = (uint)MASK_OUT_ABOVE_32(-(sint)dst);
|
---|
| 7520 | }
|
---|
| 7521 |
|
---|
| 7522 | src1 = MASK_OUT_ABOVE_16(src);
|
---|
| 7523 | src2 = src>>16;
|
---|
| 7524 | dst1 = MASK_OUT_ABOVE_16(dst);
|
---|
| 7525 | dst2 = dst>>16;
|
---|
| 7526 |
|
---|
| 7527 |
|
---|
| 7528 | r1 = src1 * dst1;
|
---|
| 7529 | r2 = src1 * dst2;
|
---|
| 7530 | r3 = src2 * dst1;
|
---|
| 7531 | r4 = src2 * dst2;
|
---|
| 7532 |
|
---|
| 7533 | lo = r1 + (MASK_OUT_ABOVE_16(r2)<<16) + (MASK_OUT_ABOVE_16(r3)<<16);
|
---|
| 7534 | hi = r4 + (r2>>16) + (r3>>16) + (((r1>>16) + MASK_OUT_ABOVE_16(r2) + MASK_OUT_ABOVE_16(r3)) >> 16);
|
---|
| 7535 |
|
---|
| 7536 | if(BIT_B(word2) && neg)
|
---|
| 7537 | {
|
---|
| 7538 | hi = (uint)MASK_OUT_ABOVE_32((-(sint)hi) - (lo != 0));
|
---|
| 7539 | lo = (uint)MASK_OUT_ABOVE_32(-(sint)lo);
|
---|
| 7540 | }
|
---|
| 7541 |
|
---|
| 7542 | if(BIT_A(word2))
|
---|
| 7543 | {
|
---|
| 7544 | REG_D[word2 & 7] = hi;
|
---|
| 7545 | REG_D[(word2 >> 12) & 7] = lo;
|
---|
| 7546 | FLAG_N = NFLAG_32(hi);
|
---|
| 7547 | FLAG_Z = hi | lo;
|
---|
| 7548 | FLAG_V = VFLAG_CLEAR;
|
---|
| 7549 | return;
|
---|
| 7550 | }
|
---|
| 7551 |
|
---|
| 7552 | REG_D[(word2 >> 12) & 7] = lo;
|
---|
| 7553 | FLAG_N = NFLAG_32(lo);
|
---|
| 7554 | FLAG_Z = lo;
|
---|
| 7555 | if(BIT_B(word2))
|
---|
| 7556 | FLAG_V = (!((GET_MSB_32(lo) && hi == 0xffffffff) || (!GET_MSB_32(lo) && !hi)))<<7;
|
---|
| 7557 | else
|
---|
| 7558 | FLAG_V = (hi != 0) << 7;
|
---|
| 7559 | return;
|
---|
| 7560 | }
|
---|
| 7561 | m68ki_exception_illegal();
|
---|
| 7562 |
|
---|
| 7563 | #endif
|
---|
| 7564 | }
|
---|
| 7565 |
|
---|
| 7566 |
|
---|
| 7567 | M68KMAKE_OP(nbcd, 8, ., d)
|
---|
| 7568 | {
|
---|
| 7569 | uint* r_dst = &DY;
|
---|
| 7570 | uint dst = *r_dst;
|
---|
| 7571 | uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
|
---|
| 7572 |
|
---|
| 7573 | if(res != 0x9a)
|
---|
| 7574 | {
|
---|
| 7575 | FLAG_V = ~res; /* Undefined V behavior */
|
---|
| 7576 |
|
---|
| 7577 | if((res & 0x0f) == 0xa)
|
---|
| 7578 | res = (res & 0xf0) + 0x10;
|
---|
| 7579 |
|
---|
| 7580 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 7581 |
|
---|
| 7582 | FLAG_V &= res; /* Undefined V behavior part II */
|
---|
| 7583 |
|
---|
| 7584 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
|
---|
| 7585 |
|
---|
| 7586 | FLAG_Z |= res;
|
---|
| 7587 | FLAG_C = CFLAG_SET;
|
---|
| 7588 | FLAG_X = XFLAG_SET;
|
---|
| 7589 | }
|
---|
| 7590 | else
|
---|
| 7591 | {
|
---|
| 7592 | FLAG_V = VFLAG_CLEAR;
|
---|
| 7593 | FLAG_C = CFLAG_CLEAR;
|
---|
| 7594 | FLAG_X = XFLAG_CLEAR;
|
---|
| 7595 | }
|
---|
| 7596 | FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
---|
| 7597 | }
|
---|
| 7598 |
|
---|
| 7599 |
|
---|
| 7600 | M68KMAKE_OP(nbcd, 8, ., .)
|
---|
| 7601 | {
|
---|
| 7602 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 7603 | uint dst = m68ki_read_8(ea);
|
---|
| 7604 | uint res = MASK_OUT_ABOVE_8(0x9a - dst - XFLAG_AS_1());
|
---|
| 7605 |
|
---|
| 7606 | if(res != 0x9a)
|
---|
| 7607 | {
|
---|
| 7608 | FLAG_V = ~res; /* Undefined V behavior */
|
---|
| 7609 |
|
---|
| 7610 | if((res & 0x0f) == 0xa)
|
---|
| 7611 | res = (res & 0xf0) + 0x10;
|
---|
| 7612 |
|
---|
| 7613 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 7614 |
|
---|
| 7615 | FLAG_V &= res; /* Undefined V behavior part II */
|
---|
| 7616 |
|
---|
| 7617 | m68ki_write_8(ea, MASK_OUT_ABOVE_8(res));
|
---|
| 7618 |
|
---|
| 7619 | FLAG_Z |= res;
|
---|
| 7620 | FLAG_C = CFLAG_SET;
|
---|
| 7621 | FLAG_X = XFLAG_SET;
|
---|
| 7622 | }
|
---|
| 7623 | else
|
---|
| 7624 | {
|
---|
| 7625 | FLAG_V = VFLAG_CLEAR;
|
---|
| 7626 | FLAG_C = CFLAG_CLEAR;
|
---|
| 7627 | FLAG_X = XFLAG_CLEAR;
|
---|
| 7628 | }
|
---|
| 7629 | FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
---|
| 7630 | }
|
---|
| 7631 |
|
---|
| 7632 |
|
---|
| 7633 | M68KMAKE_OP(neg, 8, ., d)
|
---|
| 7634 | {
|
---|
| 7635 | uint* r_dst = &DY;
|
---|
| 7636 | uint res = 0 - MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 7637 |
|
---|
| 7638 | FLAG_N = NFLAG_8(res);
|
---|
| 7639 | FLAG_C = FLAG_X = CFLAG_8(res);
|
---|
| 7640 | FLAG_V = *r_dst & res;
|
---|
| 7641 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 7642 |
|
---|
| 7643 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
|
---|
| 7644 | }
|
---|
| 7645 |
|
---|
| 7646 |
|
---|
| 7647 | M68KMAKE_OP(neg, 8, ., .)
|
---|
| 7648 | {
|
---|
| 7649 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 7650 | uint src = m68ki_read_8(ea);
|
---|
| 7651 | uint res = 0 - src;
|
---|
| 7652 |
|
---|
| 7653 | FLAG_N = NFLAG_8(res);
|
---|
| 7654 | FLAG_C = FLAG_X = CFLAG_8(res);
|
---|
| 7655 | FLAG_V = src & res;
|
---|
| 7656 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 7657 |
|
---|
| 7658 | m68ki_write_8(ea, FLAG_Z);
|
---|
| 7659 | }
|
---|
| 7660 |
|
---|
| 7661 |
|
---|
| 7662 | M68KMAKE_OP(neg, 16, ., d)
|
---|
| 7663 | {
|
---|
| 7664 | uint* r_dst = &DY;
|
---|
| 7665 | uint res = 0 - MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 7666 |
|
---|
| 7667 | FLAG_N = NFLAG_16(res);
|
---|
| 7668 | FLAG_C = FLAG_X = CFLAG_16(res);
|
---|
| 7669 | FLAG_V = (*r_dst & res)>>8;
|
---|
| 7670 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 7671 |
|
---|
| 7672 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
|
---|
| 7673 | }
|
---|
| 7674 |
|
---|
| 7675 |
|
---|
| 7676 | M68KMAKE_OP(neg, 16, ., .)
|
---|
| 7677 | {
|
---|
| 7678 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 7679 | uint src = m68ki_read_16(ea);
|
---|
| 7680 | uint res = 0 - src;
|
---|
| 7681 |
|
---|
| 7682 | FLAG_N = NFLAG_16(res);
|
---|
| 7683 | FLAG_C = FLAG_X = CFLAG_16(res);
|
---|
| 7684 | FLAG_V = (src & res)>>8;
|
---|
| 7685 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 7686 |
|
---|
| 7687 | m68ki_write_16(ea, FLAG_Z);
|
---|
| 7688 | }
|
---|
| 7689 |
|
---|
| 7690 |
|
---|
| 7691 | M68KMAKE_OP(neg, 32, ., d)
|
---|
| 7692 | {
|
---|
| 7693 | uint* r_dst = &DY;
|
---|
| 7694 | uint res = 0 - *r_dst;
|
---|
| 7695 |
|
---|
| 7696 | FLAG_N = NFLAG_32(res);
|
---|
| 7697 | FLAG_C = FLAG_X = CFLAG_SUB_32(*r_dst, 0, res);
|
---|
| 7698 | FLAG_V = (*r_dst & res)>>24;
|
---|
| 7699 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 7700 |
|
---|
| 7701 | *r_dst = FLAG_Z;
|
---|
| 7702 | }
|
---|
| 7703 |
|
---|
| 7704 |
|
---|
| 7705 | M68KMAKE_OP(neg, 32, ., .)
|
---|
| 7706 | {
|
---|
| 7707 | uint ea = M68KMAKE_GET_EA_AY_32;
|
---|
| 7708 | uint src = m68ki_read_32(ea);
|
---|
| 7709 | uint res = 0 - src;
|
---|
| 7710 |
|
---|
| 7711 | FLAG_N = NFLAG_32(res);
|
---|
| 7712 | FLAG_C = FLAG_X = CFLAG_SUB_32(src, 0, res);
|
---|
| 7713 | FLAG_V = (src & res)>>24;
|
---|
| 7714 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 7715 |
|
---|
| 7716 | m68ki_write_32(ea, FLAG_Z);
|
---|
| 7717 | }
|
---|
| 7718 |
|
---|
| 7719 |
|
---|
| 7720 | M68KMAKE_OP(negx, 8, ., d)
|
---|
| 7721 | {
|
---|
| 7722 | uint* r_dst = &DY;
|
---|
| 7723 | uint res = 0 - MASK_OUT_ABOVE_8(*r_dst) - XFLAG_AS_1();
|
---|
| 7724 |
|
---|
| 7725 | FLAG_N = NFLAG_8(res);
|
---|
| 7726 | FLAG_X = FLAG_C = CFLAG_8(res);
|
---|
| 7727 | FLAG_V = *r_dst & res;
|
---|
| 7728 |
|
---|
| 7729 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 7730 | FLAG_Z |= res;
|
---|
| 7731 |
|
---|
| 7732 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
|
---|
| 7733 | }
|
---|
| 7734 |
|
---|
| 7735 |
|
---|
| 7736 | M68KMAKE_OP(negx, 8, ., .)
|
---|
| 7737 | {
|
---|
| 7738 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 7739 | uint src = m68ki_read_8(ea);
|
---|
| 7740 | uint res = 0 - src - XFLAG_AS_1();
|
---|
| 7741 |
|
---|
| 7742 | FLAG_N = NFLAG_8(res);
|
---|
| 7743 | FLAG_X = FLAG_C = CFLAG_8(res);
|
---|
| 7744 | FLAG_V = src & res;
|
---|
| 7745 |
|
---|
| 7746 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 7747 | FLAG_Z |= res;
|
---|
| 7748 |
|
---|
| 7749 | m68ki_write_8(ea, res);
|
---|
| 7750 | }
|
---|
| 7751 |
|
---|
| 7752 |
|
---|
| 7753 | M68KMAKE_OP(negx, 16, ., d)
|
---|
| 7754 | {
|
---|
| 7755 | uint* r_dst = &DY;
|
---|
| 7756 | uint res = 0 - MASK_OUT_ABOVE_16(*r_dst) - XFLAG_AS_1();
|
---|
| 7757 |
|
---|
| 7758 | FLAG_N = NFLAG_16(res);
|
---|
| 7759 | FLAG_X = FLAG_C = CFLAG_16(res);
|
---|
| 7760 | FLAG_V = (*r_dst & res)>>8;
|
---|
| 7761 |
|
---|
| 7762 | res = MASK_OUT_ABOVE_16(res);
|
---|
| 7763 | FLAG_Z |= res;
|
---|
| 7764 |
|
---|
| 7765 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
|
---|
| 7766 | }
|
---|
| 7767 |
|
---|
| 7768 |
|
---|
| 7769 | M68KMAKE_OP(negx, 16, ., .)
|
---|
| 7770 | {
|
---|
| 7771 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 7772 | uint src = m68ki_read_16(ea);
|
---|
| 7773 | uint res = 0 - MASK_OUT_ABOVE_16(src) - XFLAG_AS_1();
|
---|
| 7774 |
|
---|
| 7775 | FLAG_N = NFLAG_16(res);
|
---|
| 7776 | FLAG_X = FLAG_C = CFLAG_16(res);
|
---|
| 7777 | FLAG_V = (src & res)>>8;
|
---|
| 7778 |
|
---|
| 7779 | res = MASK_OUT_ABOVE_16(res);
|
---|
| 7780 | FLAG_Z |= res;
|
---|
| 7781 |
|
---|
| 7782 | m68ki_write_16(ea, res);
|
---|
| 7783 | }
|
---|
| 7784 |
|
---|
| 7785 |
|
---|
| 7786 | M68KMAKE_OP(negx, 32, ., d)
|
---|
| 7787 | {
|
---|
| 7788 | uint* r_dst = &DY;
|
---|
| 7789 | uint res = 0 - MASK_OUT_ABOVE_32(*r_dst) - XFLAG_AS_1();
|
---|
| 7790 |
|
---|
| 7791 | FLAG_N = NFLAG_32(res);
|
---|
| 7792 | FLAG_X = FLAG_C = CFLAG_SUB_32(*r_dst, 0, res);
|
---|
| 7793 | FLAG_V = (*r_dst & res)>>24;
|
---|
| 7794 |
|
---|
| 7795 | res = MASK_OUT_ABOVE_32(res);
|
---|
| 7796 | FLAG_Z |= res;
|
---|
| 7797 |
|
---|
| 7798 | *r_dst = res;
|
---|
| 7799 | }
|
---|
| 7800 |
|
---|
| 7801 |
|
---|
| 7802 | M68KMAKE_OP(negx, 32, ., .)
|
---|
| 7803 | {
|
---|
| 7804 | uint ea = M68KMAKE_GET_EA_AY_32;
|
---|
| 7805 | uint src = m68ki_read_32(ea);
|
---|
| 7806 | uint res = 0 - MASK_OUT_ABOVE_32(src) - XFLAG_AS_1();
|
---|
| 7807 |
|
---|
| 7808 | FLAG_N = NFLAG_32(res);
|
---|
| 7809 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, 0, res);
|
---|
| 7810 | FLAG_V = (src & res)>>24;
|
---|
| 7811 |
|
---|
| 7812 | res = MASK_OUT_ABOVE_32(res);
|
---|
| 7813 | FLAG_Z |= res;
|
---|
| 7814 |
|
---|
| 7815 | m68ki_write_32(ea, res);
|
---|
| 7816 | }
|
---|
| 7817 |
|
---|
| 7818 |
|
---|
| 7819 | M68KMAKE_OP(nop, 0, ., .)
|
---|
| 7820 | {
|
---|
| 7821 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 7822 | }
|
---|
| 7823 |
|
---|
| 7824 |
|
---|
| 7825 | M68KMAKE_OP(not, 8, ., d)
|
---|
| 7826 | {
|
---|
| 7827 | uint* r_dst = &DY;
|
---|
| 7828 | uint res = MASK_OUT_ABOVE_8(~*r_dst);
|
---|
| 7829 |
|
---|
| 7830 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
|
---|
| 7831 |
|
---|
| 7832 | FLAG_N = NFLAG_8(res);
|
---|
| 7833 | FLAG_Z = res;
|
---|
| 7834 | FLAG_C = CFLAG_CLEAR;
|
---|
| 7835 | FLAG_V = VFLAG_CLEAR;
|
---|
| 7836 | }
|
---|
| 7837 |
|
---|
| 7838 |
|
---|
| 7839 | M68KMAKE_OP(not, 8, ., .)
|
---|
| 7840 | {
|
---|
| 7841 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 7842 | uint res = MASK_OUT_ABOVE_8(~m68ki_read_8(ea));
|
---|
| 7843 |
|
---|
| 7844 | m68ki_write_8(ea, res);
|
---|
| 7845 |
|
---|
| 7846 | FLAG_N = NFLAG_8(res);
|
---|
| 7847 | FLAG_Z = res;
|
---|
| 7848 | FLAG_C = CFLAG_CLEAR;
|
---|
| 7849 | FLAG_V = VFLAG_CLEAR;
|
---|
| 7850 | }
|
---|
| 7851 |
|
---|
| 7852 |
|
---|
| 7853 | M68KMAKE_OP(not, 16, ., d)
|
---|
| 7854 | {
|
---|
| 7855 | uint* r_dst = &DY;
|
---|
| 7856 | uint res = MASK_OUT_ABOVE_16(~*r_dst);
|
---|
| 7857 |
|
---|
| 7858 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
|
---|
| 7859 |
|
---|
| 7860 | FLAG_N = NFLAG_16(res);
|
---|
| 7861 | FLAG_Z = res;
|
---|
| 7862 | FLAG_C = CFLAG_CLEAR;
|
---|
| 7863 | FLAG_V = VFLAG_CLEAR;
|
---|
| 7864 | }
|
---|
| 7865 |
|
---|
| 7866 |
|
---|
| 7867 | M68KMAKE_OP(not, 16, ., .)
|
---|
| 7868 | {
|
---|
| 7869 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 7870 | uint res = MASK_OUT_ABOVE_16(~m68ki_read_16(ea));
|
---|
| 7871 |
|
---|
| 7872 | m68ki_write_16(ea, res);
|
---|
| 7873 |
|
---|
| 7874 | FLAG_N = NFLAG_16(res);
|
---|
| 7875 | FLAG_Z = res;
|
---|
| 7876 | FLAG_C = CFLAG_CLEAR;
|
---|
| 7877 | FLAG_V = VFLAG_CLEAR;
|
---|
| 7878 | }
|
---|
| 7879 |
|
---|
| 7880 |
|
---|
| 7881 | M68KMAKE_OP(not, 32, ., d)
|
---|
| 7882 | {
|
---|
| 7883 | uint* r_dst = &DY;
|
---|
| 7884 | uint res = *r_dst = MASK_OUT_ABOVE_32(~*r_dst);
|
---|
| 7885 |
|
---|
| 7886 | FLAG_N = NFLAG_32(res);
|
---|
| 7887 | FLAG_Z = res;
|
---|
| 7888 | FLAG_C = CFLAG_CLEAR;
|
---|
| 7889 | FLAG_V = VFLAG_CLEAR;
|
---|
| 7890 | }
|
---|
| 7891 |
|
---|
| 7892 |
|
---|
| 7893 | M68KMAKE_OP(not, 32, ., .)
|
---|
| 7894 | {
|
---|
| 7895 | uint ea = M68KMAKE_GET_EA_AY_32;
|
---|
| 7896 | uint res = MASK_OUT_ABOVE_32(~m68ki_read_32(ea));
|
---|
| 7897 |
|
---|
| 7898 | m68ki_write_32(ea, res);
|
---|
| 7899 |
|
---|
| 7900 | FLAG_N = NFLAG_32(res);
|
---|
| 7901 | FLAG_Z = res;
|
---|
| 7902 | FLAG_C = CFLAG_CLEAR;
|
---|
| 7903 | FLAG_V = VFLAG_CLEAR;
|
---|
| 7904 | }
|
---|
| 7905 |
|
---|
| 7906 |
|
---|
| 7907 | M68KMAKE_OP(or, 8, er, d)
|
---|
| 7908 | {
|
---|
| 7909 | uint res = MASK_OUT_ABOVE_8((DX |= MASK_OUT_ABOVE_8(DY)));
|
---|
| 7910 |
|
---|
| 7911 | FLAG_N = NFLAG_8(res);
|
---|
| 7912 | FLAG_Z = res;
|
---|
| 7913 | FLAG_C = CFLAG_CLEAR;
|
---|
| 7914 | FLAG_V = VFLAG_CLEAR;
|
---|
| 7915 | }
|
---|
| 7916 |
|
---|
| 7917 |
|
---|
| 7918 | M68KMAKE_OP(or, 8, er, .)
|
---|
| 7919 | {
|
---|
| 7920 | uint res = MASK_OUT_ABOVE_8((DX |= M68KMAKE_GET_OPER_AY_8));
|
---|
| 7921 |
|
---|
| 7922 | FLAG_N = NFLAG_8(res);
|
---|
| 7923 | FLAG_Z = res;
|
---|
| 7924 | FLAG_C = CFLAG_CLEAR;
|
---|
| 7925 | FLAG_V = VFLAG_CLEAR;
|
---|
| 7926 | }
|
---|
| 7927 |
|
---|
| 7928 |
|
---|
| 7929 | M68KMAKE_OP(or, 16, er, d)
|
---|
| 7930 | {
|
---|
| 7931 | uint res = MASK_OUT_ABOVE_16((DX |= MASK_OUT_ABOVE_16(DY)));
|
---|
| 7932 |
|
---|
| 7933 | FLAG_N = NFLAG_16(res);
|
---|
| 7934 | FLAG_Z = res;
|
---|
| 7935 | FLAG_C = CFLAG_CLEAR;
|
---|
| 7936 | FLAG_V = VFLAG_CLEAR;
|
---|
| 7937 | }
|
---|
| 7938 |
|
---|
| 7939 |
|
---|
| 7940 | M68KMAKE_OP(or, 16, er, .)
|
---|
| 7941 | {
|
---|
| 7942 | uint res = MASK_OUT_ABOVE_16((DX |= M68KMAKE_GET_OPER_AY_16));
|
---|
| 7943 |
|
---|
| 7944 | FLAG_N = NFLAG_16(res);
|
---|
| 7945 | FLAG_Z = res;
|
---|
| 7946 | FLAG_C = CFLAG_CLEAR;
|
---|
| 7947 | FLAG_V = VFLAG_CLEAR;
|
---|
| 7948 | }
|
---|
| 7949 |
|
---|
| 7950 |
|
---|
| 7951 | M68KMAKE_OP(or, 32, er, d)
|
---|
| 7952 | {
|
---|
| 7953 | uint res = DX |= DY;
|
---|
| 7954 |
|
---|
| 7955 | FLAG_N = NFLAG_32(res);
|
---|
| 7956 | FLAG_Z = res;
|
---|
| 7957 | FLAG_C = CFLAG_CLEAR;
|
---|
| 7958 | FLAG_V = VFLAG_CLEAR;
|
---|
| 7959 | }
|
---|
| 7960 |
|
---|
| 7961 |
|
---|
| 7962 | M68KMAKE_OP(or, 32, er, .)
|
---|
| 7963 | {
|
---|
| 7964 | uint res = DX |= M68KMAKE_GET_OPER_AY_32;
|
---|
| 7965 |
|
---|
| 7966 | FLAG_N = NFLAG_32(res);
|
---|
| 7967 | FLAG_Z = res;
|
---|
| 7968 | FLAG_C = CFLAG_CLEAR;
|
---|
| 7969 | FLAG_V = VFLAG_CLEAR;
|
---|
| 7970 | }
|
---|
| 7971 |
|
---|
| 7972 |
|
---|
| 7973 | M68KMAKE_OP(or, 8, re, .)
|
---|
| 7974 | {
|
---|
| 7975 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 7976 | uint res = MASK_OUT_ABOVE_8(DX | m68ki_read_8(ea));
|
---|
| 7977 |
|
---|
| 7978 | m68ki_write_8(ea, res);
|
---|
| 7979 |
|
---|
| 7980 | FLAG_N = NFLAG_8(res);
|
---|
| 7981 | FLAG_Z = res;
|
---|
| 7982 | FLAG_C = CFLAG_CLEAR;
|
---|
| 7983 | FLAG_V = VFLAG_CLEAR;
|
---|
| 7984 | }
|
---|
| 7985 |
|
---|
| 7986 |
|
---|
| 7987 | M68KMAKE_OP(or, 16, re, .)
|
---|
| 7988 | {
|
---|
| 7989 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 7990 | uint res = MASK_OUT_ABOVE_16(DX | m68ki_read_16(ea));
|
---|
| 7991 |
|
---|
| 7992 | m68ki_write_16(ea, res);
|
---|
| 7993 |
|
---|
| 7994 | FLAG_N = NFLAG_16(res);
|
---|
| 7995 | FLAG_Z = res;
|
---|
| 7996 | FLAG_C = CFLAG_CLEAR;
|
---|
| 7997 | FLAG_V = VFLAG_CLEAR;
|
---|
| 7998 | }
|
---|
| 7999 |
|
---|
| 8000 |
|
---|
| 8001 | M68KMAKE_OP(or, 32, re, .)
|
---|
| 8002 | {
|
---|
| 8003 | uint ea = M68KMAKE_GET_EA_AY_32;
|
---|
| 8004 | uint res = DX | m68ki_read_32(ea);
|
---|
| 8005 |
|
---|
| 8006 | m68ki_write_32(ea, res);
|
---|
| 8007 |
|
---|
| 8008 | FLAG_N = NFLAG_32(res);
|
---|
| 8009 | FLAG_Z = res;
|
---|
| 8010 | FLAG_C = CFLAG_CLEAR;
|
---|
| 8011 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8012 | }
|
---|
| 8013 |
|
---|
| 8014 |
|
---|
| 8015 | M68KMAKE_OP(ori, 8, ., d)
|
---|
| 8016 | {
|
---|
| 8017 | uint res = MASK_OUT_ABOVE_8((DY |= OPER_I_8()));
|
---|
| 8018 |
|
---|
| 8019 | FLAG_N = NFLAG_8(res);
|
---|
| 8020 | FLAG_Z = res;
|
---|
| 8021 | FLAG_C = CFLAG_CLEAR;
|
---|
| 8022 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8023 | }
|
---|
| 8024 |
|
---|
| 8025 |
|
---|
| 8026 | M68KMAKE_OP(ori, 8, ., .)
|
---|
| 8027 | {
|
---|
| 8028 | uint src = OPER_I_8();
|
---|
| 8029 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 8030 | uint res = MASK_OUT_ABOVE_8(src | m68ki_read_8(ea));
|
---|
| 8031 |
|
---|
| 8032 | m68ki_write_8(ea, res);
|
---|
| 8033 |
|
---|
| 8034 | FLAG_N = NFLAG_8(res);
|
---|
| 8035 | FLAG_Z = res;
|
---|
| 8036 | FLAG_C = CFLAG_CLEAR;
|
---|
| 8037 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8038 | }
|
---|
| 8039 |
|
---|
| 8040 |
|
---|
| 8041 | M68KMAKE_OP(ori, 16, ., d)
|
---|
| 8042 | {
|
---|
| 8043 | uint res = MASK_OUT_ABOVE_16(DY |= OPER_I_16());
|
---|
| 8044 |
|
---|
| 8045 | FLAG_N = NFLAG_16(res);
|
---|
| 8046 | FLAG_Z = res;
|
---|
| 8047 | FLAG_C = CFLAG_CLEAR;
|
---|
| 8048 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8049 | }
|
---|
| 8050 |
|
---|
| 8051 |
|
---|
| 8052 | M68KMAKE_OP(ori, 16, ., .)
|
---|
| 8053 | {
|
---|
| 8054 | uint src = OPER_I_16();
|
---|
| 8055 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 8056 | uint res = MASK_OUT_ABOVE_16(src | m68ki_read_16(ea));
|
---|
| 8057 |
|
---|
| 8058 | m68ki_write_16(ea, res);
|
---|
| 8059 |
|
---|
| 8060 | FLAG_N = NFLAG_16(res);
|
---|
| 8061 | FLAG_Z = res;
|
---|
| 8062 | FLAG_C = CFLAG_CLEAR;
|
---|
| 8063 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8064 | }
|
---|
| 8065 |
|
---|
| 8066 |
|
---|
| 8067 | M68KMAKE_OP(ori, 32, ., d)
|
---|
| 8068 | {
|
---|
| 8069 | uint res = DY |= OPER_I_32();
|
---|
| 8070 |
|
---|
| 8071 | FLAG_N = NFLAG_32(res);
|
---|
| 8072 | FLAG_Z = res;
|
---|
| 8073 | FLAG_C = CFLAG_CLEAR;
|
---|
| 8074 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8075 | }
|
---|
| 8076 |
|
---|
| 8077 |
|
---|
| 8078 | M68KMAKE_OP(ori, 32, ., .)
|
---|
| 8079 | {
|
---|
| 8080 | uint src = OPER_I_32();
|
---|
| 8081 | uint ea = M68KMAKE_GET_EA_AY_32;
|
---|
| 8082 | uint res = src | m68ki_read_32(ea);
|
---|
| 8083 |
|
---|
| 8084 | m68ki_write_32(ea, res);
|
---|
| 8085 |
|
---|
| 8086 | FLAG_N = NFLAG_32(res);
|
---|
| 8087 | FLAG_Z = res;
|
---|
| 8088 | FLAG_C = CFLAG_CLEAR;
|
---|
| 8089 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8090 | }
|
---|
| 8091 |
|
---|
| 8092 |
|
---|
| 8093 | M68KMAKE_OP(ori, 16, toc, .)
|
---|
| 8094 | {
|
---|
| 8095 | m68ki_set_ccr(m68ki_get_ccr() | OPER_I_16());
|
---|
| 8096 | }
|
---|
| 8097 |
|
---|
| 8098 |
|
---|
| 8099 | M68KMAKE_OP(ori, 16, tos, .)
|
---|
| 8100 | {
|
---|
| 8101 | if(FLAG_S)
|
---|
| 8102 | {
|
---|
| 8103 | uint src = OPER_I_16();
|
---|
| 8104 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 8105 | m68ki_set_sr(m68ki_get_sr() | src);
|
---|
| 8106 | return;
|
---|
| 8107 | }
|
---|
| 8108 | m68ki_exception_privilege_violation();
|
---|
| 8109 | }
|
---|
| 8110 |
|
---|
| 8111 |
|
---|
| 8112 | M68KMAKE_OP(pack, 16, rr, .)
|
---|
| 8113 | {
|
---|
| 8114 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 8115 | {
|
---|
| 8116 | /* Note: DX and DY are reversed in Motorola's docs */
|
---|
| 8117 | uint src = DY + OPER_I_16();
|
---|
| 8118 | uint* r_dst = &DX;
|
---|
| 8119 |
|
---|
| 8120 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | ((src >> 4) & 0x00f0) | (src & 0x000f);
|
---|
| 8121 | return;
|
---|
| 8122 | }
|
---|
| 8123 | m68ki_exception_illegal();
|
---|
| 8124 | }
|
---|
| 8125 |
|
---|
| 8126 |
|
---|
| 8127 | M68KMAKE_OP(pack, 16, mm, ax7)
|
---|
| 8128 | {
|
---|
| 8129 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 8130 | {
|
---|
| 8131 | /* Note: AX and AY are reversed in Motorola's docs */
|
---|
| 8132 | uint ea_src = EA_AY_PD_8();
|
---|
| 8133 | uint src = m68ki_read_8(ea_src);
|
---|
| 8134 | ea_src = EA_AY_PD_8();
|
---|
| 8135 | src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16();
|
---|
| 8136 |
|
---|
| 8137 | m68ki_write_8(EA_A7_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f));
|
---|
| 8138 | return;
|
---|
| 8139 | }
|
---|
| 8140 | m68ki_exception_illegal();
|
---|
| 8141 | }
|
---|
| 8142 |
|
---|
| 8143 |
|
---|
| 8144 | M68KMAKE_OP(pack, 16, mm, ay7)
|
---|
| 8145 | {
|
---|
| 8146 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 8147 | {
|
---|
| 8148 | /* Note: AX and AY are reversed in Motorola's docs */
|
---|
| 8149 | uint ea_src = EA_A7_PD_8();
|
---|
| 8150 | uint src = m68ki_read_8(ea_src);
|
---|
| 8151 | ea_src = EA_A7_PD_8();
|
---|
| 8152 | src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16();
|
---|
| 8153 |
|
---|
| 8154 | m68ki_write_8(EA_AX_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f));
|
---|
| 8155 | return;
|
---|
| 8156 | }
|
---|
| 8157 | m68ki_exception_illegal();
|
---|
| 8158 | }
|
---|
| 8159 |
|
---|
| 8160 |
|
---|
| 8161 | M68KMAKE_OP(pack, 16, mm, axy7)
|
---|
| 8162 | {
|
---|
| 8163 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 8164 | {
|
---|
| 8165 | uint ea_src = EA_A7_PD_8();
|
---|
| 8166 | uint src = m68ki_read_8(ea_src);
|
---|
| 8167 | ea_src = EA_A7_PD_8();
|
---|
| 8168 | src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16();
|
---|
| 8169 |
|
---|
| 8170 | m68ki_write_8(EA_A7_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f));
|
---|
| 8171 | return;
|
---|
| 8172 | }
|
---|
| 8173 | m68ki_exception_illegal();
|
---|
| 8174 | }
|
---|
| 8175 |
|
---|
| 8176 |
|
---|
| 8177 | M68KMAKE_OP(pack, 16, mm, .)
|
---|
| 8178 | {
|
---|
| 8179 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 8180 | {
|
---|
| 8181 | /* Note: AX and AY are reversed in Motorola's docs */
|
---|
| 8182 | uint ea_src = EA_AY_PD_8();
|
---|
| 8183 | uint src = m68ki_read_8(ea_src);
|
---|
| 8184 | ea_src = EA_AY_PD_8();
|
---|
| 8185 | src = ((src << 8) | m68ki_read_8(ea_src)) + OPER_I_16();
|
---|
| 8186 |
|
---|
| 8187 | m68ki_write_8(EA_AX_PD_8(), ((src >> 4) & 0x00f0) | (src & 0x000f));
|
---|
| 8188 | return;
|
---|
| 8189 | }
|
---|
| 8190 | m68ki_exception_illegal();
|
---|
| 8191 | }
|
---|
| 8192 |
|
---|
| 8193 |
|
---|
| 8194 | M68KMAKE_OP(pea, 32, ., .)
|
---|
| 8195 | {
|
---|
| 8196 | uint ea = M68KMAKE_GET_EA_AY_32;
|
---|
| 8197 |
|
---|
| 8198 | m68ki_push_32(ea);
|
---|
| 8199 | }
|
---|
| 8200 |
|
---|
| 8201 |
|
---|
| 8202 | M68KMAKE_OP(reset, 0, ., .)
|
---|
| 8203 | {
|
---|
| 8204 | if(FLAG_S)
|
---|
| 8205 | {
|
---|
| 8206 | m68ki_output_reset(); /* auto-disable (see m68kcpu.h) */
|
---|
| 8207 | USE_CYCLES(CYC_RESET);
|
---|
| 8208 | return;
|
---|
| 8209 | }
|
---|
| 8210 | m68ki_exception_privilege_violation();
|
---|
| 8211 | }
|
---|
| 8212 |
|
---|
| 8213 |
|
---|
| 8214 | M68KMAKE_OP(ror, 8, s, .)
|
---|
| 8215 | {
|
---|
| 8216 | uint* r_dst = &DY;
|
---|
| 8217 | uint orig_shift = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 8218 | uint shift = orig_shift & 7;
|
---|
| 8219 | uint src = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 8220 | uint res = ROR_8(src, shift);
|
---|
| 8221 |
|
---|
| 8222 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
|
---|
| 8223 |
|
---|
| 8224 | FLAG_N = NFLAG_8(res);
|
---|
| 8225 | FLAG_Z = res;
|
---|
| 8226 | FLAG_C = src << (9-orig_shift);
|
---|
| 8227 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8228 | }
|
---|
| 8229 |
|
---|
| 8230 |
|
---|
| 8231 | M68KMAKE_OP(ror, 16, s, .)
|
---|
| 8232 | {
|
---|
| 8233 | uint* r_dst = &DY;
|
---|
| 8234 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 8235 | uint src = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 8236 | uint res = ROR_16(src, shift);
|
---|
| 8237 |
|
---|
| 8238 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
|
---|
| 8239 |
|
---|
| 8240 | FLAG_N = NFLAG_16(res);
|
---|
| 8241 | FLAG_Z = res;
|
---|
| 8242 | FLAG_C = src << (9-shift);
|
---|
| 8243 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8244 | }
|
---|
| 8245 |
|
---|
| 8246 |
|
---|
| 8247 | M68KMAKE_OP(ror, 32, s, .)
|
---|
| 8248 | {
|
---|
| 8249 | uint* r_dst = &DY;
|
---|
| 8250 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 8251 | uint64 src = *r_dst;
|
---|
| 8252 | uint res = ROR_32(src, shift);
|
---|
| 8253 |
|
---|
| 8254 | *r_dst = res;
|
---|
| 8255 |
|
---|
| 8256 | FLAG_N = NFLAG_32(res);
|
---|
| 8257 | FLAG_Z = res;
|
---|
| 8258 | FLAG_C = src << (9-shift);
|
---|
| 8259 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8260 | }
|
---|
| 8261 |
|
---|
| 8262 |
|
---|
| 8263 | M68KMAKE_OP(ror, 8, r, .)
|
---|
| 8264 | {
|
---|
| 8265 | uint* r_dst = &DY;
|
---|
| 8266 | uint orig_shift = DX & 0x3f;
|
---|
| 8267 | uint shift = orig_shift & 7;
|
---|
| 8268 | uint src = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 8269 | uint res = ROR_8(src, shift);
|
---|
| 8270 |
|
---|
| 8271 | if(orig_shift != 0)
|
---|
| 8272 | {
|
---|
| 8273 | USE_CYCLES(orig_shift<<CYC_SHIFT);
|
---|
| 8274 |
|
---|
| 8275 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
|
---|
| 8276 | FLAG_C = src << (8-((shift-1)&7));
|
---|
| 8277 | FLAG_N = NFLAG_8(res);
|
---|
| 8278 | FLAG_Z = res;
|
---|
| 8279 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8280 | return;
|
---|
| 8281 | }
|
---|
| 8282 |
|
---|
| 8283 | FLAG_C = CFLAG_CLEAR;
|
---|
| 8284 | FLAG_N = NFLAG_8(src);
|
---|
| 8285 | FLAG_Z = src;
|
---|
| 8286 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8287 | }
|
---|
| 8288 |
|
---|
| 8289 |
|
---|
| 8290 | M68KMAKE_OP(ror, 16, r, .)
|
---|
| 8291 | {
|
---|
| 8292 | uint* r_dst = &DY;
|
---|
| 8293 | uint orig_shift = DX & 0x3f;
|
---|
| 8294 | uint shift = orig_shift & 15;
|
---|
| 8295 | uint src = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 8296 | uint res = ROR_16(src, shift);
|
---|
| 8297 |
|
---|
| 8298 | if(orig_shift != 0)
|
---|
| 8299 | {
|
---|
| 8300 | USE_CYCLES(orig_shift<<CYC_SHIFT);
|
---|
| 8301 |
|
---|
| 8302 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
|
---|
| 8303 | FLAG_C = (src >> ((shift - 1) & 15)) << 8;
|
---|
| 8304 | FLAG_N = NFLAG_16(res);
|
---|
| 8305 | FLAG_Z = res;
|
---|
| 8306 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8307 | return;
|
---|
| 8308 | }
|
---|
| 8309 |
|
---|
| 8310 | FLAG_C = CFLAG_CLEAR;
|
---|
| 8311 | FLAG_N = NFLAG_16(src);
|
---|
| 8312 | FLAG_Z = src;
|
---|
| 8313 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8314 | }
|
---|
| 8315 |
|
---|
| 8316 |
|
---|
| 8317 | M68KMAKE_OP(ror, 32, r, .)
|
---|
| 8318 | {
|
---|
| 8319 | uint* r_dst = &DY;
|
---|
| 8320 | uint orig_shift = DX & 0x3f;
|
---|
| 8321 | uint shift = orig_shift & 31;
|
---|
| 8322 | uint64 src = *r_dst;
|
---|
| 8323 | uint res = ROR_32(src, shift);
|
---|
| 8324 |
|
---|
| 8325 | if(orig_shift != 0)
|
---|
| 8326 | {
|
---|
| 8327 | USE_CYCLES(orig_shift<<CYC_SHIFT);
|
---|
| 8328 |
|
---|
| 8329 | *r_dst = res;
|
---|
| 8330 | FLAG_C = (src >> ((shift - 1) & 31)) << 8;
|
---|
| 8331 | FLAG_N = NFLAG_32(res);
|
---|
| 8332 | FLAG_Z = res;
|
---|
| 8333 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8334 | return;
|
---|
| 8335 | }
|
---|
| 8336 |
|
---|
| 8337 | FLAG_C = CFLAG_CLEAR;
|
---|
| 8338 | FLAG_N = NFLAG_32(src);
|
---|
| 8339 | FLAG_Z = src;
|
---|
| 8340 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8341 | }
|
---|
| 8342 |
|
---|
| 8343 |
|
---|
| 8344 | M68KMAKE_OP(ror, 16, ., .)
|
---|
| 8345 | {
|
---|
| 8346 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 8347 | uint src = m68ki_read_16(ea);
|
---|
| 8348 | uint res = ROR_16(src, 1);
|
---|
| 8349 |
|
---|
| 8350 | m68ki_write_16(ea, res);
|
---|
| 8351 |
|
---|
| 8352 | FLAG_N = NFLAG_16(res);
|
---|
| 8353 | FLAG_Z = res;
|
---|
| 8354 | FLAG_C = src << 8;
|
---|
| 8355 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8356 | }
|
---|
| 8357 |
|
---|
| 8358 |
|
---|
| 8359 | M68KMAKE_OP(rol, 8, s, .)
|
---|
| 8360 | {
|
---|
| 8361 | uint* r_dst = &DY;
|
---|
| 8362 | uint orig_shift = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 8363 | uint shift = orig_shift & 7;
|
---|
| 8364 | uint src = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 8365 | uint res = ROL_8(src, shift);
|
---|
| 8366 |
|
---|
| 8367 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
|
---|
| 8368 |
|
---|
| 8369 | FLAG_N = NFLAG_8(res);
|
---|
| 8370 | FLAG_Z = res;
|
---|
| 8371 | FLAG_C = src << orig_shift;
|
---|
| 8372 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8373 | }
|
---|
| 8374 |
|
---|
| 8375 |
|
---|
| 8376 | M68KMAKE_OP(rol, 16, s, .)
|
---|
| 8377 | {
|
---|
| 8378 | uint* r_dst = &DY;
|
---|
| 8379 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 8380 | uint src = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 8381 | uint res = ROL_16(src, shift);
|
---|
| 8382 |
|
---|
| 8383 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
|
---|
| 8384 |
|
---|
| 8385 | FLAG_N = NFLAG_16(res);
|
---|
| 8386 | FLAG_Z = res;
|
---|
| 8387 | FLAG_C = src >> (8-shift);
|
---|
| 8388 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8389 | }
|
---|
| 8390 |
|
---|
| 8391 |
|
---|
| 8392 | M68KMAKE_OP(rol, 32, s, .)
|
---|
| 8393 | {
|
---|
| 8394 | uint* r_dst = &DY;
|
---|
| 8395 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 8396 | uint64 src = *r_dst;
|
---|
| 8397 | uint res = ROL_32(src, shift);
|
---|
| 8398 |
|
---|
| 8399 | *r_dst = res;
|
---|
| 8400 |
|
---|
| 8401 | FLAG_N = NFLAG_32(res);
|
---|
| 8402 | FLAG_Z = res;
|
---|
| 8403 | FLAG_C = src >> (24-shift);
|
---|
| 8404 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8405 | }
|
---|
| 8406 |
|
---|
| 8407 |
|
---|
| 8408 | M68KMAKE_OP(rol, 8, r, .)
|
---|
| 8409 | {
|
---|
| 8410 | uint* r_dst = &DY;
|
---|
| 8411 | uint orig_shift = DX & 0x3f;
|
---|
| 8412 | uint shift = orig_shift & 7;
|
---|
| 8413 | uint src = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 8414 | uint res = ROL_8(src, shift);
|
---|
| 8415 |
|
---|
| 8416 | if(orig_shift != 0)
|
---|
| 8417 | {
|
---|
| 8418 | USE_CYCLES(orig_shift<<CYC_SHIFT);
|
---|
| 8419 |
|
---|
| 8420 | if(shift != 0)
|
---|
| 8421 | {
|
---|
| 8422 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
|
---|
| 8423 | FLAG_C = src << shift;
|
---|
| 8424 | FLAG_N = NFLAG_8(res);
|
---|
| 8425 | FLAG_Z = res;
|
---|
| 8426 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8427 | return;
|
---|
| 8428 | }
|
---|
| 8429 | FLAG_C = (src & 1)<<8;
|
---|
| 8430 | FLAG_N = NFLAG_8(src);
|
---|
| 8431 | FLAG_Z = src;
|
---|
| 8432 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8433 | return;
|
---|
| 8434 | }
|
---|
| 8435 |
|
---|
| 8436 | FLAG_C = CFLAG_CLEAR;
|
---|
| 8437 | FLAG_N = NFLAG_8(src);
|
---|
| 8438 | FLAG_Z = src;
|
---|
| 8439 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8440 | }
|
---|
| 8441 |
|
---|
| 8442 |
|
---|
| 8443 | M68KMAKE_OP(rol, 16, r, .)
|
---|
| 8444 | {
|
---|
| 8445 | uint* r_dst = &DY;
|
---|
| 8446 | uint orig_shift = DX & 0x3f;
|
---|
| 8447 | uint shift = orig_shift & 15;
|
---|
| 8448 | uint src = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 8449 | uint res = MASK_OUT_ABOVE_16(ROL_16(src, shift));
|
---|
| 8450 |
|
---|
| 8451 | if(orig_shift != 0)
|
---|
| 8452 | {
|
---|
| 8453 | USE_CYCLES(orig_shift<<CYC_SHIFT);
|
---|
| 8454 |
|
---|
| 8455 | if(shift != 0)
|
---|
| 8456 | {
|
---|
| 8457 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
|
---|
| 8458 | FLAG_C = (src << shift) >> 8;
|
---|
| 8459 | FLAG_N = NFLAG_16(res);
|
---|
| 8460 | FLAG_Z = res;
|
---|
| 8461 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8462 | return;
|
---|
| 8463 | }
|
---|
| 8464 | FLAG_C = (src & 1)<<8;
|
---|
| 8465 | FLAG_N = NFLAG_16(src);
|
---|
| 8466 | FLAG_Z = src;
|
---|
| 8467 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8468 | return;
|
---|
| 8469 | }
|
---|
| 8470 |
|
---|
| 8471 | FLAG_C = CFLAG_CLEAR;
|
---|
| 8472 | FLAG_N = NFLAG_16(src);
|
---|
| 8473 | FLAG_Z = src;
|
---|
| 8474 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8475 | }
|
---|
| 8476 |
|
---|
| 8477 |
|
---|
| 8478 | M68KMAKE_OP(rol, 32, r, .)
|
---|
| 8479 | {
|
---|
| 8480 | uint* r_dst = &DY;
|
---|
| 8481 | uint orig_shift = DX & 0x3f;
|
---|
| 8482 | uint shift = orig_shift & 31;
|
---|
| 8483 | uint64 src = *r_dst;
|
---|
| 8484 | uint res = ROL_32(src, shift);
|
---|
| 8485 |
|
---|
| 8486 | if(orig_shift != 0)
|
---|
| 8487 | {
|
---|
| 8488 | USE_CYCLES(orig_shift<<CYC_SHIFT);
|
---|
| 8489 |
|
---|
| 8490 | *r_dst = res;
|
---|
| 8491 |
|
---|
| 8492 | FLAG_C = (src >> (32 - shift)) << 8;
|
---|
| 8493 | FLAG_N = NFLAG_32(res);
|
---|
| 8494 | FLAG_Z = res;
|
---|
| 8495 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8496 | return;
|
---|
| 8497 | }
|
---|
| 8498 |
|
---|
| 8499 | FLAG_C = CFLAG_CLEAR;
|
---|
| 8500 | FLAG_N = NFLAG_32(src);
|
---|
| 8501 | FLAG_Z = src;
|
---|
| 8502 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8503 | }
|
---|
| 8504 |
|
---|
| 8505 |
|
---|
| 8506 | M68KMAKE_OP(rol, 16, ., .)
|
---|
| 8507 | {
|
---|
| 8508 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 8509 | uint src = m68ki_read_16(ea);
|
---|
| 8510 | uint res = MASK_OUT_ABOVE_16(ROL_16(src, 1));
|
---|
| 8511 |
|
---|
| 8512 | m68ki_write_16(ea, res);
|
---|
| 8513 |
|
---|
| 8514 | FLAG_N = NFLAG_16(res);
|
---|
| 8515 | FLAG_Z = res;
|
---|
| 8516 | FLAG_C = src >> 7;
|
---|
| 8517 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8518 | }
|
---|
| 8519 |
|
---|
| 8520 |
|
---|
| 8521 | M68KMAKE_OP(roxr, 8, s, .)
|
---|
| 8522 | {
|
---|
| 8523 | uint* r_dst = &DY;
|
---|
| 8524 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 8525 | uint src = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 8526 | uint res = ROR_9(src | (XFLAG_AS_1() << 8), shift);
|
---|
| 8527 |
|
---|
| 8528 | FLAG_C = FLAG_X = res;
|
---|
| 8529 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 8530 |
|
---|
| 8531 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
|
---|
| 8532 |
|
---|
| 8533 | FLAG_N = NFLAG_8(res);
|
---|
| 8534 | FLAG_Z = res;
|
---|
| 8535 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8536 | }
|
---|
| 8537 |
|
---|
| 8538 |
|
---|
| 8539 | M68KMAKE_OP(roxr, 16, s, .)
|
---|
| 8540 | {
|
---|
| 8541 | uint* r_dst = &DY;
|
---|
| 8542 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 8543 | uint src = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 8544 | uint res = ROR_17(src | (XFLAG_AS_1() << 16), shift);
|
---|
| 8545 |
|
---|
| 8546 | FLAG_C = FLAG_X = res >> 8;
|
---|
| 8547 | res = MASK_OUT_ABOVE_16(res);
|
---|
| 8548 |
|
---|
| 8549 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
|
---|
| 8550 |
|
---|
| 8551 | FLAG_N = NFLAG_16(res);
|
---|
| 8552 | FLAG_Z = res;
|
---|
| 8553 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8554 | }
|
---|
| 8555 |
|
---|
| 8556 |
|
---|
| 8557 | M68KMAKE_OP(roxr, 32, s, .)
|
---|
| 8558 | {
|
---|
| 8559 | #if M68K_USE_64_BIT
|
---|
| 8560 |
|
---|
| 8561 | uint* r_dst = &DY;
|
---|
| 8562 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 8563 | uint64 src = *r_dst;
|
---|
| 8564 | uint64 res = src | (((uint64)XFLAG_AS_1()) << 32);
|
---|
| 8565 |
|
---|
| 8566 | res = ROR_33_64(res, shift);
|
---|
| 8567 |
|
---|
| 8568 | FLAG_C = FLAG_X = res >> 24;
|
---|
| 8569 | res = MASK_OUT_ABOVE_32(res);
|
---|
| 8570 |
|
---|
| 8571 | *r_dst = res;
|
---|
| 8572 |
|
---|
| 8573 | FLAG_N = NFLAG_32(res);
|
---|
| 8574 | FLAG_Z = res;
|
---|
| 8575 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8576 |
|
---|
| 8577 | #else
|
---|
| 8578 |
|
---|
| 8579 | uint* r_dst = &DY;
|
---|
| 8580 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 8581 | uint src = *r_dst;
|
---|
| 8582 | uint res = MASK_OUT_ABOVE_32((ROR_33(src, shift) & ~(1 << (32 - shift))) | (XFLAG_AS_1() << (32 - shift)));
|
---|
| 8583 | uint new_x_flag = src & (1 << (shift - 1));
|
---|
| 8584 |
|
---|
| 8585 | *r_dst = res;
|
---|
| 8586 |
|
---|
| 8587 | FLAG_C = FLAG_X = (new_x_flag != 0)<<8;
|
---|
| 8588 | FLAG_N = NFLAG_32(res);
|
---|
| 8589 | FLAG_Z = res;
|
---|
| 8590 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8591 |
|
---|
| 8592 | #endif
|
---|
| 8593 | }
|
---|
| 8594 |
|
---|
| 8595 |
|
---|
| 8596 | M68KMAKE_OP(roxr, 8, r, .)
|
---|
| 8597 | {
|
---|
| 8598 | uint* r_dst = &DY;
|
---|
| 8599 | uint orig_shift = DX & 0x3f;
|
---|
| 8600 |
|
---|
| 8601 | if(orig_shift != 0)
|
---|
| 8602 | {
|
---|
| 8603 | uint shift = orig_shift % 9;
|
---|
| 8604 | uint src = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 8605 | uint res = ROR_9(src | (XFLAG_AS_1() << 8), shift);
|
---|
| 8606 |
|
---|
| 8607 | USE_CYCLES(orig_shift<<CYC_SHIFT);
|
---|
| 8608 |
|
---|
| 8609 | FLAG_C = FLAG_X = res;
|
---|
| 8610 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 8611 |
|
---|
| 8612 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
|
---|
| 8613 | FLAG_N = NFLAG_8(res);
|
---|
| 8614 | FLAG_Z = res;
|
---|
| 8615 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8616 | return;
|
---|
| 8617 | }
|
---|
| 8618 |
|
---|
| 8619 | FLAG_C = FLAG_X;
|
---|
| 8620 | FLAG_N = NFLAG_8(*r_dst);
|
---|
| 8621 | FLAG_Z = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 8622 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8623 | }
|
---|
| 8624 |
|
---|
| 8625 |
|
---|
| 8626 | M68KMAKE_OP(roxr, 16, r, .)
|
---|
| 8627 | {
|
---|
| 8628 | uint* r_dst = &DY;
|
---|
| 8629 | uint orig_shift = DX & 0x3f;
|
---|
| 8630 |
|
---|
| 8631 | if(orig_shift != 0)
|
---|
| 8632 | {
|
---|
| 8633 | uint shift = orig_shift % 17;
|
---|
| 8634 | uint src = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 8635 | uint res = ROR_17(src | (XFLAG_AS_1() << 16), shift);
|
---|
| 8636 |
|
---|
| 8637 | USE_CYCLES(orig_shift<<CYC_SHIFT);
|
---|
| 8638 |
|
---|
| 8639 | FLAG_C = FLAG_X = res >> 8;
|
---|
| 8640 | res = MASK_OUT_ABOVE_16(res);
|
---|
| 8641 |
|
---|
| 8642 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
|
---|
| 8643 | FLAG_N = NFLAG_16(res);
|
---|
| 8644 | FLAG_Z = res;
|
---|
| 8645 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8646 | return;
|
---|
| 8647 | }
|
---|
| 8648 |
|
---|
| 8649 | FLAG_C = FLAG_X;
|
---|
| 8650 | FLAG_N = NFLAG_16(*r_dst);
|
---|
| 8651 | FLAG_Z = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 8652 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8653 | }
|
---|
| 8654 |
|
---|
| 8655 |
|
---|
| 8656 | M68KMAKE_OP(roxr, 32, r, .)
|
---|
| 8657 | {
|
---|
| 8658 | #if M68K_USE_64_BIT
|
---|
| 8659 |
|
---|
| 8660 | uint* r_dst = &DY;
|
---|
| 8661 | uint orig_shift = DX & 0x3f;
|
---|
| 8662 |
|
---|
| 8663 | if(orig_shift != 0)
|
---|
| 8664 | {
|
---|
| 8665 | uint shift = orig_shift % 33;
|
---|
| 8666 | uint64 src = *r_dst;
|
---|
| 8667 | uint64 res = src | (((uint64)XFLAG_AS_1()) << 32);
|
---|
| 8668 |
|
---|
| 8669 | res = ROR_33_64(res, shift);
|
---|
| 8670 |
|
---|
| 8671 | USE_CYCLES(orig_shift<<CYC_SHIFT);
|
---|
| 8672 |
|
---|
| 8673 | FLAG_C = FLAG_X = res >> 24;
|
---|
| 8674 | res = MASK_OUT_ABOVE_32(res);
|
---|
| 8675 |
|
---|
| 8676 | *r_dst = res;
|
---|
| 8677 | FLAG_N = NFLAG_32(res);
|
---|
| 8678 | FLAG_Z = res;
|
---|
| 8679 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8680 | return;
|
---|
| 8681 | }
|
---|
| 8682 |
|
---|
| 8683 | FLAG_C = FLAG_X;
|
---|
| 8684 | FLAG_N = NFLAG_32(*r_dst);
|
---|
| 8685 | FLAG_Z = *r_dst;
|
---|
| 8686 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8687 |
|
---|
| 8688 | #else
|
---|
| 8689 |
|
---|
| 8690 | uint* r_dst = &DY;
|
---|
| 8691 | uint orig_shift = DX & 0x3f;
|
---|
| 8692 | uint shift = orig_shift % 33;
|
---|
| 8693 | uint src = *r_dst;
|
---|
| 8694 | uint res = MASK_OUT_ABOVE_32((ROR_33(src, shift) & ~(1 << (32 - shift))) | (XFLAG_AS_1() << (32 - shift)));
|
---|
| 8695 | uint new_x_flag = src & (1 << (shift - 1));
|
---|
| 8696 |
|
---|
| 8697 | if(orig_shift != 0)
|
---|
| 8698 | USE_CYCLES(orig_shift<<CYC_SHIFT);
|
---|
| 8699 |
|
---|
| 8700 | if(shift != 0)
|
---|
| 8701 | {
|
---|
| 8702 | *r_dst = res;
|
---|
| 8703 | FLAG_X = (new_x_flag != 0)<<8;
|
---|
| 8704 | }
|
---|
| 8705 | else
|
---|
| 8706 | res = src;
|
---|
| 8707 | FLAG_C = FLAG_X;
|
---|
| 8708 | FLAG_N = NFLAG_32(res);
|
---|
| 8709 | FLAG_Z = res;
|
---|
| 8710 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8711 |
|
---|
| 8712 | #endif
|
---|
| 8713 | }
|
---|
| 8714 |
|
---|
| 8715 |
|
---|
| 8716 | M68KMAKE_OP(roxr, 16, ., .)
|
---|
| 8717 | {
|
---|
| 8718 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 8719 | uint src = m68ki_read_16(ea);
|
---|
| 8720 | uint res = ROR_17(src | (XFLAG_AS_1() << 16), 1);
|
---|
| 8721 |
|
---|
| 8722 | FLAG_C = FLAG_X = res >> 8;
|
---|
| 8723 | res = MASK_OUT_ABOVE_16(res);
|
---|
| 8724 |
|
---|
| 8725 | m68ki_write_16(ea, res);
|
---|
| 8726 |
|
---|
| 8727 | FLAG_N = NFLAG_16(res);
|
---|
| 8728 | FLAG_Z = res;
|
---|
| 8729 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8730 | }
|
---|
| 8731 |
|
---|
| 8732 |
|
---|
| 8733 | M68KMAKE_OP(roxl, 8, s, .)
|
---|
| 8734 | {
|
---|
| 8735 | uint* r_dst = &DY;
|
---|
| 8736 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 8737 | uint src = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 8738 | uint res = ROL_9(src | (XFLAG_AS_1() << 8), shift);
|
---|
| 8739 |
|
---|
| 8740 | FLAG_C = FLAG_X = res;
|
---|
| 8741 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 8742 |
|
---|
| 8743 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
|
---|
| 8744 |
|
---|
| 8745 | FLAG_N = NFLAG_8(res);
|
---|
| 8746 | FLAG_Z = res;
|
---|
| 8747 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8748 | }
|
---|
| 8749 |
|
---|
| 8750 |
|
---|
| 8751 | M68KMAKE_OP(roxl, 16, s, .)
|
---|
| 8752 | {
|
---|
| 8753 | uint* r_dst = &DY;
|
---|
| 8754 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 8755 | uint src = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 8756 | uint res = ROL_17(src | (XFLAG_AS_1() << 16), shift);
|
---|
| 8757 |
|
---|
| 8758 | FLAG_C = FLAG_X = res >> 8;
|
---|
| 8759 | res = MASK_OUT_ABOVE_16(res);
|
---|
| 8760 |
|
---|
| 8761 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
|
---|
| 8762 |
|
---|
| 8763 | FLAG_N = NFLAG_16(res);
|
---|
| 8764 | FLAG_Z = res;
|
---|
| 8765 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8766 | }
|
---|
| 8767 |
|
---|
| 8768 |
|
---|
| 8769 | M68KMAKE_OP(roxl, 32, s, .)
|
---|
| 8770 | {
|
---|
| 8771 | #if M68K_USE_64_BIT
|
---|
| 8772 |
|
---|
| 8773 | uint* r_dst = &DY;
|
---|
| 8774 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 8775 | uint64 src = *r_dst;
|
---|
| 8776 | uint64 res = src | (((uint64)XFLAG_AS_1()) << 32);
|
---|
| 8777 |
|
---|
| 8778 | res = ROL_33_64(res, shift);
|
---|
| 8779 |
|
---|
| 8780 | FLAG_C = FLAG_X = res >> 24;
|
---|
| 8781 | res = MASK_OUT_ABOVE_32(res);
|
---|
| 8782 |
|
---|
| 8783 | *r_dst = res;
|
---|
| 8784 |
|
---|
| 8785 | FLAG_N = NFLAG_32(res);
|
---|
| 8786 | FLAG_Z = res;
|
---|
| 8787 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8788 |
|
---|
| 8789 | #else
|
---|
| 8790 |
|
---|
| 8791 | uint* r_dst = &DY;
|
---|
| 8792 | uint shift = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 8793 | uint src = *r_dst;
|
---|
| 8794 | uint res = MASK_OUT_ABOVE_32((ROL_33(src, shift) & ~(1 << (shift - 1))) | (XFLAG_AS_1() << (shift - 1)));
|
---|
| 8795 | uint new_x_flag = src & (1 << (32 - shift));
|
---|
| 8796 |
|
---|
| 8797 | *r_dst = res;
|
---|
| 8798 |
|
---|
| 8799 | FLAG_C = FLAG_X = (new_x_flag != 0)<<8;
|
---|
| 8800 | FLAG_N = NFLAG_32(res);
|
---|
| 8801 | FLAG_Z = res;
|
---|
| 8802 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8803 |
|
---|
| 8804 | #endif
|
---|
| 8805 | }
|
---|
| 8806 |
|
---|
| 8807 |
|
---|
| 8808 | M68KMAKE_OP(roxl, 8, r, .)
|
---|
| 8809 | {
|
---|
| 8810 | uint* r_dst = &DY;
|
---|
| 8811 | uint orig_shift = DX & 0x3f;
|
---|
| 8812 |
|
---|
| 8813 |
|
---|
| 8814 | if(orig_shift != 0)
|
---|
| 8815 | {
|
---|
| 8816 | uint shift = orig_shift % 9;
|
---|
| 8817 | uint src = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 8818 | uint res = ROL_9(src | (XFLAG_AS_1() << 8), shift);
|
---|
| 8819 |
|
---|
| 8820 | USE_CYCLES(orig_shift<<CYC_SHIFT);
|
---|
| 8821 |
|
---|
| 8822 | FLAG_C = FLAG_X = res;
|
---|
| 8823 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 8824 |
|
---|
| 8825 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
|
---|
| 8826 | FLAG_N = NFLAG_8(res);
|
---|
| 8827 | FLAG_Z = res;
|
---|
| 8828 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8829 | return;
|
---|
| 8830 | }
|
---|
| 8831 |
|
---|
| 8832 | FLAG_C = FLAG_X;
|
---|
| 8833 | FLAG_N = NFLAG_8(*r_dst);
|
---|
| 8834 | FLAG_Z = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 8835 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8836 | }
|
---|
| 8837 |
|
---|
| 8838 |
|
---|
| 8839 | M68KMAKE_OP(roxl, 16, r, .)
|
---|
| 8840 | {
|
---|
| 8841 | uint* r_dst = &DY;
|
---|
| 8842 | uint orig_shift = DX & 0x3f;
|
---|
| 8843 |
|
---|
| 8844 | if(orig_shift != 0)
|
---|
| 8845 | {
|
---|
| 8846 | uint shift = orig_shift % 17;
|
---|
| 8847 | uint src = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 8848 | uint res = ROL_17(src | (XFLAG_AS_1() << 16), shift);
|
---|
| 8849 |
|
---|
| 8850 | USE_CYCLES(orig_shift<<CYC_SHIFT);
|
---|
| 8851 |
|
---|
| 8852 | FLAG_C = FLAG_X = res >> 8;
|
---|
| 8853 | res = MASK_OUT_ABOVE_16(res);
|
---|
| 8854 |
|
---|
| 8855 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
|
---|
| 8856 | FLAG_N = NFLAG_16(res);
|
---|
| 8857 | FLAG_Z = res;
|
---|
| 8858 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8859 | return;
|
---|
| 8860 | }
|
---|
| 8861 |
|
---|
| 8862 | FLAG_C = FLAG_X;
|
---|
| 8863 | FLAG_N = NFLAG_16(*r_dst);
|
---|
| 8864 | FLAG_Z = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 8865 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8866 | }
|
---|
| 8867 |
|
---|
| 8868 |
|
---|
| 8869 | M68KMAKE_OP(roxl, 32, r, .)
|
---|
| 8870 | {
|
---|
| 8871 | #if M68K_USE_64_BIT
|
---|
| 8872 |
|
---|
| 8873 | uint* r_dst = &DY;
|
---|
| 8874 | uint orig_shift = DX & 0x3f;
|
---|
| 8875 |
|
---|
| 8876 | if(orig_shift != 0)
|
---|
| 8877 | {
|
---|
| 8878 | uint shift = orig_shift % 33;
|
---|
| 8879 | uint64 src = *r_dst;
|
---|
| 8880 | uint64 res = src | (((uint64)XFLAG_AS_1()) << 32);
|
---|
| 8881 |
|
---|
| 8882 | res = ROL_33_64(res, shift);
|
---|
| 8883 |
|
---|
| 8884 | USE_CYCLES(orig_shift<<CYC_SHIFT);
|
---|
| 8885 |
|
---|
| 8886 | FLAG_C = FLAG_X = res >> 24;
|
---|
| 8887 | res = MASK_OUT_ABOVE_32(res);
|
---|
| 8888 |
|
---|
| 8889 | *r_dst = res;
|
---|
| 8890 | FLAG_N = NFLAG_32(res);
|
---|
| 8891 | FLAG_Z = res;
|
---|
| 8892 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8893 | return;
|
---|
| 8894 | }
|
---|
| 8895 |
|
---|
| 8896 | FLAG_C = FLAG_X;
|
---|
| 8897 | FLAG_N = NFLAG_32(*r_dst);
|
---|
| 8898 | FLAG_Z = *r_dst;
|
---|
| 8899 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8900 |
|
---|
| 8901 | #else
|
---|
| 8902 |
|
---|
| 8903 | uint* r_dst = &DY;
|
---|
| 8904 | uint orig_shift = DX & 0x3f;
|
---|
| 8905 | uint shift = orig_shift % 33;
|
---|
| 8906 | uint src = *r_dst;
|
---|
| 8907 | uint res = MASK_OUT_ABOVE_32((ROL_33(src, shift) & ~(1 << (shift - 1))) | (XFLAG_AS_1() << (shift - 1)));
|
---|
| 8908 | uint new_x_flag = src & (1 << (32 - shift));
|
---|
| 8909 |
|
---|
| 8910 | if(orig_shift != 0)
|
---|
| 8911 | USE_CYCLES(orig_shift<<CYC_SHIFT);
|
---|
| 8912 |
|
---|
| 8913 | if(shift != 0)
|
---|
| 8914 | {
|
---|
| 8915 | *r_dst = res;
|
---|
| 8916 | FLAG_X = (new_x_flag != 0)<<8;
|
---|
| 8917 | }
|
---|
| 8918 | else
|
---|
| 8919 | res = src;
|
---|
| 8920 | FLAG_C = FLAG_X;
|
---|
| 8921 | FLAG_N = NFLAG_32(res);
|
---|
| 8922 | FLAG_Z = res;
|
---|
| 8923 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8924 |
|
---|
| 8925 | #endif
|
---|
| 8926 | }
|
---|
| 8927 |
|
---|
| 8928 |
|
---|
| 8929 | M68KMAKE_OP(roxl, 16, ., .)
|
---|
| 8930 | {
|
---|
| 8931 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 8932 | uint src = m68ki_read_16(ea);
|
---|
| 8933 | uint res = ROL_17(src | (XFLAG_AS_1() << 16), 1);
|
---|
| 8934 |
|
---|
| 8935 | FLAG_C = FLAG_X = res >> 8;
|
---|
| 8936 | res = MASK_OUT_ABOVE_16(res);
|
---|
| 8937 |
|
---|
| 8938 | m68ki_write_16(ea, res);
|
---|
| 8939 |
|
---|
| 8940 | FLAG_N = NFLAG_16(res);
|
---|
| 8941 | FLAG_Z = res;
|
---|
| 8942 | FLAG_V = VFLAG_CLEAR;
|
---|
| 8943 | }
|
---|
| 8944 |
|
---|
| 8945 |
|
---|
| 8946 | M68KMAKE_OP(rtd, 32, ., .)
|
---|
| 8947 | {
|
---|
| 8948 | if(CPU_TYPE_IS_010_PLUS(CPU_TYPE))
|
---|
| 8949 | {
|
---|
| 8950 | uint new_pc = m68ki_pull_32();
|
---|
| 8951 |
|
---|
| 8952 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 8953 | REG_A[7] = MASK_OUT_ABOVE_32(REG_A[7] + MAKE_INT_16(OPER_I_16()));
|
---|
| 8954 | m68ki_jump(new_pc);
|
---|
| 8955 | return;
|
---|
| 8956 | }
|
---|
| 8957 | m68ki_exception_illegal();
|
---|
| 8958 | }
|
---|
| 8959 |
|
---|
| 8960 |
|
---|
| 8961 | M68KMAKE_OP(rte, 32, ., .)
|
---|
| 8962 | {
|
---|
| 8963 | if(FLAG_S)
|
---|
| 8964 | {
|
---|
| 8965 | uint new_sr;
|
---|
| 8966 | uint new_pc;
|
---|
| 8967 | uint format_word;
|
---|
| 8968 |
|
---|
| 8969 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 8970 |
|
---|
| 8971 | if(CPU_TYPE_IS_000(CPU_TYPE))
|
---|
| 8972 | {
|
---|
| 8973 | new_sr = m68ki_pull_16();
|
---|
| 8974 | new_pc = m68ki_pull_32();
|
---|
| 8975 | m68ki_jump(new_pc);
|
---|
| 8976 | m68ki_set_sr(new_sr);
|
---|
| 8977 |
|
---|
| 8978 | CPU_INSTR_MODE = INSTRUCTION_YES;
|
---|
| 8979 | CPU_RUN_MODE = RUN_MODE_NORMAL;
|
---|
| 8980 |
|
---|
| 8981 | return;
|
---|
| 8982 | }
|
---|
| 8983 |
|
---|
| 8984 | if(CPU_TYPE_IS_010(CPU_TYPE))
|
---|
| 8985 | {
|
---|
| 8986 | format_word = m68ki_read_16(REG_A[7]+6) >> 12;
|
---|
| 8987 | if(format_word == 0)
|
---|
| 8988 | {
|
---|
| 8989 | new_sr = m68ki_pull_16();
|
---|
| 8990 | new_pc = m68ki_pull_32();
|
---|
| 8991 | m68ki_fake_pull_16(); /* format word */
|
---|
| 8992 | m68ki_jump(new_pc);
|
---|
| 8993 | m68ki_set_sr(new_sr);
|
---|
| 8994 | CPU_INSTR_MODE = INSTRUCTION_YES;
|
---|
| 8995 | CPU_RUN_MODE = RUN_MODE_NORMAL;
|
---|
| 8996 | return;
|
---|
| 8997 | }
|
---|
| 8998 | CPU_INSTR_MODE = INSTRUCTION_YES;
|
---|
| 8999 | CPU_RUN_MODE = RUN_MODE_NORMAL;
|
---|
| 9000 | /* Not handling bus fault (9) */
|
---|
| 9001 | m68ki_exception_format_error();
|
---|
| 9002 | return;
|
---|
| 9003 | }
|
---|
| 9004 |
|
---|
| 9005 | /* Otherwise it's 020 */
|
---|
| 9006 | rte_loop:
|
---|
| 9007 | format_word = m68ki_read_16(REG_A[7]+6) >> 12;
|
---|
| 9008 | switch(format_word)
|
---|
| 9009 | {
|
---|
| 9010 | case 0: /* Normal */
|
---|
| 9011 | new_sr = m68ki_pull_16();
|
---|
| 9012 | new_pc = m68ki_pull_32();
|
---|
| 9013 | m68ki_fake_pull_16(); /* format word */
|
---|
| 9014 | m68ki_jump(new_pc);
|
---|
| 9015 | m68ki_set_sr(new_sr);
|
---|
| 9016 | CPU_INSTR_MODE = INSTRUCTION_YES;
|
---|
| 9017 | CPU_RUN_MODE = RUN_MODE_NORMAL;
|
---|
| 9018 | return;
|
---|
| 9019 | case 1: /* Throwaway */
|
---|
| 9020 | new_sr = m68ki_pull_16();
|
---|
| 9021 | m68ki_fake_pull_32(); /* program counter */
|
---|
| 9022 | m68ki_fake_pull_16(); /* format word */
|
---|
| 9023 | m68ki_set_sr_noint(new_sr);
|
---|
| 9024 | goto rte_loop;
|
---|
| 9025 | case 2: /* Trap */
|
---|
| 9026 | new_sr = m68ki_pull_16();
|
---|
| 9027 | new_pc = m68ki_pull_32();
|
---|
| 9028 | m68ki_fake_pull_16(); /* format word */
|
---|
| 9029 | m68ki_fake_pull_32(); /* address */
|
---|
| 9030 | m68ki_jump(new_pc);
|
---|
| 9031 | m68ki_set_sr(new_sr);
|
---|
| 9032 | CPU_INSTR_MODE = INSTRUCTION_YES;
|
---|
| 9033 | CPU_RUN_MODE = RUN_MODE_NORMAL;
|
---|
| 9034 | return;
|
---|
| 9035 | }
|
---|
| 9036 | /* Not handling long or short bus fault */
|
---|
| 9037 | CPU_INSTR_MODE = INSTRUCTION_YES;
|
---|
| 9038 | CPU_RUN_MODE = RUN_MODE_NORMAL;
|
---|
| 9039 | m68ki_exception_format_error();
|
---|
| 9040 | return;
|
---|
| 9041 | }
|
---|
| 9042 | m68ki_exception_privilege_violation();
|
---|
| 9043 | }
|
---|
| 9044 |
|
---|
| 9045 |
|
---|
| 9046 | M68KMAKE_OP(rtm, 32, ., .)
|
---|
| 9047 | {
|
---|
| 9048 | if(CPU_TYPE_IS_020_VARIANT(CPU_TYPE))
|
---|
| 9049 | {
|
---|
| 9050 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 9051 | M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: called unimplemented instruction %04x (%s)\n",
|
---|
| 9052 | m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC - 2), REG_IR,
|
---|
| 9053 | m68k_disassemble_quick(ADDRESS_68K(REG_PC - 2))));
|
---|
| 9054 | return;
|
---|
| 9055 | }
|
---|
| 9056 | m68ki_exception_illegal();
|
---|
| 9057 | }
|
---|
| 9058 |
|
---|
| 9059 |
|
---|
| 9060 | M68KMAKE_OP(rtr, 32, ., .)
|
---|
| 9061 | {
|
---|
| 9062 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 9063 | m68ki_set_ccr(m68ki_pull_16());
|
---|
| 9064 | m68ki_jump(m68ki_pull_32());
|
---|
| 9065 | }
|
---|
| 9066 |
|
---|
| 9067 |
|
---|
| 9068 | M68KMAKE_OP(rts, 32, ., .)
|
---|
| 9069 | {
|
---|
| 9070 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 9071 | m68ki_jump(m68ki_pull_32());
|
---|
| 9072 | }
|
---|
| 9073 |
|
---|
| 9074 |
|
---|
| 9075 | M68KMAKE_OP(sbcd, 8, rr, .)
|
---|
| 9076 | {
|
---|
| 9077 | uint* r_dst = &DX;
|
---|
| 9078 | uint src = DY;
|
---|
| 9079 | uint dst = *r_dst;
|
---|
| 9080 | uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
|
---|
| 9081 |
|
---|
| 9082 | FLAG_V = ~res; /* Undefined V behavior */
|
---|
| 9083 |
|
---|
| 9084 | if(res > 9)
|
---|
| 9085 | res -= 6;
|
---|
| 9086 | res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
|
---|
| 9087 | FLAG_X = FLAG_C = (res > 0x99) << 8;
|
---|
| 9088 | if(FLAG_C)
|
---|
| 9089 | res += 0xa0;
|
---|
| 9090 |
|
---|
| 9091 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 9092 |
|
---|
| 9093 | FLAG_V &= res; /* Undefined V behavior part II */
|
---|
| 9094 | FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
---|
| 9095 | FLAG_Z |= res;
|
---|
| 9096 |
|
---|
| 9097 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
|
---|
| 9098 | }
|
---|
| 9099 |
|
---|
| 9100 |
|
---|
| 9101 | M68KMAKE_OP(sbcd, 8, mm, ax7)
|
---|
| 9102 | {
|
---|
| 9103 | uint src = OPER_AY_PD_8();
|
---|
| 9104 | uint ea = EA_A7_PD_8();
|
---|
| 9105 | uint dst = m68ki_read_8(ea);
|
---|
| 9106 | uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
|
---|
| 9107 |
|
---|
| 9108 | FLAG_V = ~res; /* Undefined V behavior */
|
---|
| 9109 |
|
---|
| 9110 | if(res > 9)
|
---|
| 9111 | res -= 6;
|
---|
| 9112 | res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
|
---|
| 9113 | FLAG_X = FLAG_C = (res > 0x99) << 8;
|
---|
| 9114 | if(FLAG_C)
|
---|
| 9115 | res += 0xa0;
|
---|
| 9116 |
|
---|
| 9117 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 9118 |
|
---|
| 9119 | FLAG_V &= res; /* Undefined V behavior part II */
|
---|
| 9120 | FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
---|
| 9121 | FLAG_Z |= res;
|
---|
| 9122 |
|
---|
| 9123 | m68ki_write_8(ea, res);
|
---|
| 9124 | }
|
---|
| 9125 |
|
---|
| 9126 |
|
---|
| 9127 | M68KMAKE_OP(sbcd, 8, mm, ay7)
|
---|
| 9128 | {
|
---|
| 9129 | uint src = OPER_A7_PD_8();
|
---|
| 9130 | uint ea = EA_AX_PD_8();
|
---|
| 9131 | uint dst = m68ki_read_8(ea);
|
---|
| 9132 | uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
|
---|
| 9133 |
|
---|
| 9134 | FLAG_V = ~res; /* Undefined V behavior */
|
---|
| 9135 |
|
---|
| 9136 | if(res > 9)
|
---|
| 9137 | res -= 6;
|
---|
| 9138 | res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
|
---|
| 9139 | FLAG_X = FLAG_C = (res > 0x99) << 8;
|
---|
| 9140 | if(FLAG_C)
|
---|
| 9141 | res += 0xa0;
|
---|
| 9142 |
|
---|
| 9143 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 9144 |
|
---|
| 9145 | FLAG_V &= res; /* Undefined V behavior part II */
|
---|
| 9146 | FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
---|
| 9147 | FLAG_Z |= res;
|
---|
| 9148 |
|
---|
| 9149 | m68ki_write_8(ea, res);
|
---|
| 9150 | }
|
---|
| 9151 |
|
---|
| 9152 |
|
---|
| 9153 | M68KMAKE_OP(sbcd, 8, mm, axy7)
|
---|
| 9154 | {
|
---|
| 9155 | uint src = OPER_A7_PD_8();
|
---|
| 9156 | uint ea = EA_A7_PD_8();
|
---|
| 9157 | uint dst = m68ki_read_8(ea);
|
---|
| 9158 | uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
|
---|
| 9159 |
|
---|
| 9160 | FLAG_V = ~res; /* Undefined V behavior */
|
---|
| 9161 |
|
---|
| 9162 | if(res > 9)
|
---|
| 9163 | res -= 6;
|
---|
| 9164 | res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
|
---|
| 9165 | FLAG_X = FLAG_C = (res > 0x99) << 8;
|
---|
| 9166 | if(FLAG_C)
|
---|
| 9167 | res += 0xa0;
|
---|
| 9168 |
|
---|
| 9169 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 9170 |
|
---|
| 9171 | FLAG_V &= res; /* Undefined V behavior part II */
|
---|
| 9172 | FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
---|
| 9173 | FLAG_Z |= res;
|
---|
| 9174 |
|
---|
| 9175 | m68ki_write_8(ea, res);
|
---|
| 9176 | }
|
---|
| 9177 |
|
---|
| 9178 |
|
---|
| 9179 | M68KMAKE_OP(sbcd, 8, mm, .)
|
---|
| 9180 | {
|
---|
| 9181 | uint src = OPER_AY_PD_8();
|
---|
| 9182 | uint ea = EA_AX_PD_8();
|
---|
| 9183 | uint dst = m68ki_read_8(ea);
|
---|
| 9184 | uint res = LOW_NIBBLE(dst) - LOW_NIBBLE(src) - XFLAG_AS_1();
|
---|
| 9185 |
|
---|
| 9186 | FLAG_V = ~res; /* Undefined V behavior */
|
---|
| 9187 |
|
---|
| 9188 | if(res > 9)
|
---|
| 9189 | res -= 6;
|
---|
| 9190 | res += HIGH_NIBBLE(dst) - HIGH_NIBBLE(src);
|
---|
| 9191 | FLAG_X = FLAG_C = (res > 0x99) << 8;
|
---|
| 9192 | if(FLAG_C)
|
---|
| 9193 | res += 0xa0;
|
---|
| 9194 |
|
---|
| 9195 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 9196 |
|
---|
| 9197 | FLAG_V &= res; /* Undefined V behavior part II */
|
---|
| 9198 | FLAG_N = NFLAG_8(res); /* Undefined N behavior */
|
---|
| 9199 | FLAG_Z |= res;
|
---|
| 9200 |
|
---|
| 9201 | m68ki_write_8(ea, res);
|
---|
| 9202 | }
|
---|
| 9203 |
|
---|
| 9204 |
|
---|
| 9205 | M68KMAKE_OP(st, 8, ., d)
|
---|
| 9206 | {
|
---|
| 9207 | DY |= 0xff;
|
---|
| 9208 | }
|
---|
| 9209 |
|
---|
| 9210 |
|
---|
| 9211 | M68KMAKE_OP(st, 8, ., .)
|
---|
| 9212 | {
|
---|
| 9213 | m68ki_write_8(M68KMAKE_GET_EA_AY_8, 0xff);
|
---|
| 9214 | }
|
---|
| 9215 |
|
---|
| 9216 |
|
---|
| 9217 | M68KMAKE_OP(sf, 8, ., d)
|
---|
| 9218 | {
|
---|
| 9219 | DY &= 0xffffff00;
|
---|
| 9220 | }
|
---|
| 9221 |
|
---|
| 9222 |
|
---|
| 9223 | M68KMAKE_OP(sf, 8, ., .)
|
---|
| 9224 | {
|
---|
| 9225 | m68ki_write_8(M68KMAKE_GET_EA_AY_8, 0);
|
---|
| 9226 | }
|
---|
| 9227 |
|
---|
| 9228 |
|
---|
| 9229 | M68KMAKE_OP(scc, 8, ., d)
|
---|
| 9230 | {
|
---|
| 9231 | if(M68KMAKE_CC)
|
---|
| 9232 | {
|
---|
| 9233 | DY |= 0xff;
|
---|
| 9234 | USE_CYCLES(CYC_SCC_R_TRUE);
|
---|
| 9235 | return;
|
---|
| 9236 | }
|
---|
| 9237 | DY &= 0xffffff00;
|
---|
| 9238 | }
|
---|
| 9239 |
|
---|
| 9240 |
|
---|
| 9241 | M68KMAKE_OP(scc, 8, ., .)
|
---|
| 9242 | {
|
---|
| 9243 | m68ki_write_8(M68KMAKE_GET_EA_AY_8, M68KMAKE_CC ? 0xff : 0);
|
---|
| 9244 | }
|
---|
| 9245 |
|
---|
| 9246 |
|
---|
| 9247 | M68KMAKE_OP(stop, 0, ., .)
|
---|
| 9248 | {
|
---|
| 9249 | if(FLAG_S)
|
---|
| 9250 | {
|
---|
| 9251 | uint new_sr = OPER_I_16();
|
---|
| 9252 | m68ki_trace_t0(); /* auto-disable (see m68kcpu.h) */
|
---|
| 9253 | CPU_STOPPED |= STOP_LEVEL_STOP;
|
---|
| 9254 | m68ki_set_sr(new_sr);
|
---|
| 9255 | if(m68ki_remaining_cycles >= CYC_INSTRUCTION[REG_IR])
|
---|
| 9256 | m68ki_remaining_cycles = CYC_INSTRUCTION[REG_IR];
|
---|
| 9257 | else
|
---|
| 9258 | USE_ALL_CYCLES();
|
---|
| 9259 | return;
|
---|
| 9260 | }
|
---|
| 9261 | m68ki_exception_privilege_violation();
|
---|
| 9262 | }
|
---|
| 9263 |
|
---|
| 9264 |
|
---|
| 9265 | M68KMAKE_OP(sub, 8, er, d)
|
---|
| 9266 | {
|
---|
| 9267 | uint* r_dst = &DX;
|
---|
| 9268 | uint src = MASK_OUT_ABOVE_8(DY);
|
---|
| 9269 | uint dst = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 9270 | uint res = dst - src;
|
---|
| 9271 |
|
---|
| 9272 | FLAG_N = NFLAG_8(res);
|
---|
| 9273 | FLAG_X = FLAG_C = CFLAG_8(res);
|
---|
| 9274 | FLAG_V = VFLAG_SUB_8(src, dst, res);
|
---|
| 9275 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 9276 |
|
---|
| 9277 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
|
---|
| 9278 | }
|
---|
| 9279 |
|
---|
| 9280 |
|
---|
| 9281 | M68KMAKE_OP(sub, 8, er, .)
|
---|
| 9282 | {
|
---|
| 9283 | uint* r_dst = &DX;
|
---|
| 9284 | uint src = M68KMAKE_GET_OPER_AY_8;
|
---|
| 9285 | uint dst = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 9286 | uint res = dst - src;
|
---|
| 9287 |
|
---|
| 9288 | FLAG_N = NFLAG_8(res);
|
---|
| 9289 | FLAG_X = FLAG_C = CFLAG_8(res);
|
---|
| 9290 | FLAG_V = VFLAG_SUB_8(src, dst, res);
|
---|
| 9291 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 9292 |
|
---|
| 9293 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
|
---|
| 9294 | }
|
---|
| 9295 |
|
---|
| 9296 |
|
---|
| 9297 | M68KMAKE_OP(sub, 16, er, d)
|
---|
| 9298 | {
|
---|
| 9299 | uint* r_dst = &DX;
|
---|
| 9300 | uint src = MASK_OUT_ABOVE_16(DY);
|
---|
| 9301 | uint dst = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 9302 | uint res = dst - src;
|
---|
| 9303 |
|
---|
| 9304 | FLAG_N = NFLAG_16(res);
|
---|
| 9305 | FLAG_X = FLAG_C = CFLAG_16(res);
|
---|
| 9306 | FLAG_V = VFLAG_SUB_16(src, dst, res);
|
---|
| 9307 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 9308 |
|
---|
| 9309 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
|
---|
| 9310 | }
|
---|
| 9311 |
|
---|
| 9312 |
|
---|
| 9313 | M68KMAKE_OP(sub, 16, er, a)
|
---|
| 9314 | {
|
---|
| 9315 | uint* r_dst = &DX;
|
---|
| 9316 | uint src = MASK_OUT_ABOVE_16(AY);
|
---|
| 9317 | uint dst = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 9318 | uint res = dst - src;
|
---|
| 9319 |
|
---|
| 9320 | FLAG_N = NFLAG_16(res);
|
---|
| 9321 | FLAG_X = FLAG_C = CFLAG_16(res);
|
---|
| 9322 | FLAG_V = VFLAG_SUB_16(src, dst, res);
|
---|
| 9323 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 9324 |
|
---|
| 9325 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
|
---|
| 9326 | }
|
---|
| 9327 |
|
---|
| 9328 |
|
---|
| 9329 | M68KMAKE_OP(sub, 16, er, .)
|
---|
| 9330 | {
|
---|
| 9331 | uint* r_dst = &DX;
|
---|
| 9332 | uint src = M68KMAKE_GET_OPER_AY_16;
|
---|
| 9333 | uint dst = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 9334 | uint res = dst - src;
|
---|
| 9335 |
|
---|
| 9336 | FLAG_N = NFLAG_16(res);
|
---|
| 9337 | FLAG_X = FLAG_C = CFLAG_16(res);
|
---|
| 9338 | FLAG_V = VFLAG_SUB_16(src, dst, res);
|
---|
| 9339 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 9340 |
|
---|
| 9341 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
|
---|
| 9342 | }
|
---|
| 9343 |
|
---|
| 9344 |
|
---|
| 9345 | M68KMAKE_OP(sub, 32, er, d)
|
---|
| 9346 | {
|
---|
| 9347 | uint* r_dst = &DX;
|
---|
| 9348 | uint src = DY;
|
---|
| 9349 | uint dst = *r_dst;
|
---|
| 9350 | uint res = dst - src;
|
---|
| 9351 |
|
---|
| 9352 | FLAG_N = NFLAG_32(res);
|
---|
| 9353 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
|
---|
| 9354 | FLAG_V = VFLAG_SUB_32(src, dst, res);
|
---|
| 9355 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 9356 |
|
---|
| 9357 | *r_dst = FLAG_Z;
|
---|
| 9358 | }
|
---|
| 9359 |
|
---|
| 9360 |
|
---|
| 9361 | M68KMAKE_OP(sub, 32, er, a)
|
---|
| 9362 | {
|
---|
| 9363 | uint* r_dst = &DX;
|
---|
| 9364 | uint src = AY;
|
---|
| 9365 | uint dst = *r_dst;
|
---|
| 9366 | uint res = dst - src;
|
---|
| 9367 |
|
---|
| 9368 | FLAG_N = NFLAG_32(res);
|
---|
| 9369 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
|
---|
| 9370 | FLAG_V = VFLAG_SUB_32(src, dst, res);
|
---|
| 9371 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 9372 |
|
---|
| 9373 | *r_dst = FLAG_Z;
|
---|
| 9374 | }
|
---|
| 9375 |
|
---|
| 9376 |
|
---|
| 9377 | M68KMAKE_OP(sub, 32, er, .)
|
---|
| 9378 | {
|
---|
| 9379 | uint* r_dst = &DX;
|
---|
| 9380 | uint src = M68KMAKE_GET_OPER_AY_32;
|
---|
| 9381 | uint dst = *r_dst;
|
---|
| 9382 | uint res = dst - src;
|
---|
| 9383 |
|
---|
| 9384 | FLAG_N = NFLAG_32(res);
|
---|
| 9385 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
|
---|
| 9386 | FLAG_V = VFLAG_SUB_32(src, dst, res);
|
---|
| 9387 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 9388 |
|
---|
| 9389 | *r_dst = FLAG_Z;
|
---|
| 9390 | }
|
---|
| 9391 |
|
---|
| 9392 |
|
---|
| 9393 | M68KMAKE_OP(sub, 8, re, .)
|
---|
| 9394 | {
|
---|
| 9395 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 9396 | uint src = MASK_OUT_ABOVE_8(DX);
|
---|
| 9397 | uint dst = m68ki_read_8(ea);
|
---|
| 9398 | uint res = dst - src;
|
---|
| 9399 |
|
---|
| 9400 | FLAG_N = NFLAG_8(res);
|
---|
| 9401 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 9402 | FLAG_X = FLAG_C = CFLAG_8(res);
|
---|
| 9403 | FLAG_V = VFLAG_SUB_8(src, dst, res);
|
---|
| 9404 |
|
---|
| 9405 | m68ki_write_8(ea, FLAG_Z);
|
---|
| 9406 | }
|
---|
| 9407 |
|
---|
| 9408 |
|
---|
| 9409 | M68KMAKE_OP(sub, 16, re, .)
|
---|
| 9410 | {
|
---|
| 9411 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 9412 | uint src = MASK_OUT_ABOVE_16(DX);
|
---|
| 9413 | uint dst = m68ki_read_16(ea);
|
---|
| 9414 | uint res = dst - src;
|
---|
| 9415 |
|
---|
| 9416 | FLAG_N = NFLAG_16(res);
|
---|
| 9417 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 9418 | FLAG_X = FLAG_C = CFLAG_16(res);
|
---|
| 9419 | FLAG_V = VFLAG_SUB_16(src, dst, res);
|
---|
| 9420 |
|
---|
| 9421 | m68ki_write_16(ea, FLAG_Z);
|
---|
| 9422 | }
|
---|
| 9423 |
|
---|
| 9424 |
|
---|
| 9425 | M68KMAKE_OP(sub, 32, re, .)
|
---|
| 9426 | {
|
---|
| 9427 | uint ea = M68KMAKE_GET_EA_AY_32;
|
---|
| 9428 | uint src = DX;
|
---|
| 9429 | uint dst = m68ki_read_32(ea);
|
---|
| 9430 | uint res = dst - src;
|
---|
| 9431 |
|
---|
| 9432 | FLAG_N = NFLAG_32(res);
|
---|
| 9433 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 9434 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
|
---|
| 9435 | FLAG_V = VFLAG_SUB_32(src, dst, res);
|
---|
| 9436 |
|
---|
| 9437 | m68ki_write_32(ea, FLAG_Z);
|
---|
| 9438 | }
|
---|
| 9439 |
|
---|
| 9440 |
|
---|
| 9441 | M68KMAKE_OP(suba, 16, ., d)
|
---|
| 9442 | {
|
---|
| 9443 | uint* r_dst = &AX;
|
---|
| 9444 |
|
---|
| 9445 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(DY));
|
---|
| 9446 | }
|
---|
| 9447 |
|
---|
| 9448 |
|
---|
| 9449 | M68KMAKE_OP(suba, 16, ., a)
|
---|
| 9450 | {
|
---|
| 9451 | uint* r_dst = &AX;
|
---|
| 9452 |
|
---|
| 9453 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - MAKE_INT_16(AY));
|
---|
| 9454 | }
|
---|
| 9455 |
|
---|
| 9456 |
|
---|
| 9457 | M68KMAKE_OP(suba, 16, ., .)
|
---|
| 9458 | {
|
---|
| 9459 | signed short src = MAKE_INT_16(M68KMAKE_GET_OPER_AY_16);
|
---|
| 9460 | uint* r_dst = &AX;
|
---|
| 9461 |
|
---|
| 9462 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - src);
|
---|
| 9463 | }
|
---|
| 9464 |
|
---|
| 9465 |
|
---|
| 9466 | M68KMAKE_OP(suba, 32, ., d)
|
---|
| 9467 | {
|
---|
| 9468 | uint* r_dst = &AX;
|
---|
| 9469 |
|
---|
| 9470 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - DY);
|
---|
| 9471 | }
|
---|
| 9472 |
|
---|
| 9473 |
|
---|
| 9474 | M68KMAKE_OP(suba, 32, ., a)
|
---|
| 9475 | {
|
---|
| 9476 | uint* r_dst = &AX;
|
---|
| 9477 |
|
---|
| 9478 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - AY);
|
---|
| 9479 | }
|
---|
| 9480 |
|
---|
| 9481 |
|
---|
| 9482 | M68KMAKE_OP(suba, 32, ., .)
|
---|
| 9483 | {
|
---|
| 9484 | uint src = M68KMAKE_GET_OPER_AY_32;
|
---|
| 9485 | uint* r_dst = &AX;
|
---|
| 9486 |
|
---|
| 9487 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - src);
|
---|
| 9488 | }
|
---|
| 9489 |
|
---|
| 9490 |
|
---|
| 9491 | M68KMAKE_OP(subi, 8, ., d)
|
---|
| 9492 | {
|
---|
| 9493 | uint* r_dst = &DY;
|
---|
| 9494 | uint src = OPER_I_8();
|
---|
| 9495 | uint dst = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 9496 | uint res = dst - src;
|
---|
| 9497 |
|
---|
| 9498 | FLAG_N = NFLAG_8(res);
|
---|
| 9499 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 9500 | FLAG_X = FLAG_C = CFLAG_8(res);
|
---|
| 9501 | FLAG_V = VFLAG_SUB_8(src, dst, res);
|
---|
| 9502 |
|
---|
| 9503 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
|
---|
| 9504 | }
|
---|
| 9505 |
|
---|
| 9506 |
|
---|
| 9507 | M68KMAKE_OP(subi, 8, ., .)
|
---|
| 9508 | {
|
---|
| 9509 | uint src = OPER_I_8();
|
---|
| 9510 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 9511 | uint dst = m68ki_read_8(ea);
|
---|
| 9512 | uint res = dst - src;
|
---|
| 9513 |
|
---|
| 9514 | FLAG_N = NFLAG_8(res);
|
---|
| 9515 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 9516 | FLAG_X = FLAG_C = CFLAG_8(res);
|
---|
| 9517 | FLAG_V = VFLAG_SUB_8(src, dst, res);
|
---|
| 9518 |
|
---|
| 9519 | m68ki_write_8(ea, FLAG_Z);
|
---|
| 9520 | }
|
---|
| 9521 |
|
---|
| 9522 |
|
---|
| 9523 | M68KMAKE_OP(subi, 16, ., d)
|
---|
| 9524 | {
|
---|
| 9525 | uint* r_dst = &DY;
|
---|
| 9526 | uint src = OPER_I_16();
|
---|
| 9527 | uint dst = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 9528 | uint res = dst - src;
|
---|
| 9529 |
|
---|
| 9530 | FLAG_N = NFLAG_16(res);
|
---|
| 9531 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 9532 | FLAG_X = FLAG_C = CFLAG_16(res);
|
---|
| 9533 | FLAG_V = VFLAG_SUB_16(src, dst, res);
|
---|
| 9534 |
|
---|
| 9535 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
|
---|
| 9536 | }
|
---|
| 9537 |
|
---|
| 9538 |
|
---|
| 9539 | M68KMAKE_OP(subi, 16, ., .)
|
---|
| 9540 | {
|
---|
| 9541 | uint src = OPER_I_16();
|
---|
| 9542 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 9543 | uint dst = m68ki_read_16(ea);
|
---|
| 9544 | uint res = dst - src;
|
---|
| 9545 |
|
---|
| 9546 | FLAG_N = NFLAG_16(res);
|
---|
| 9547 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 9548 | FLAG_X = FLAG_C = CFLAG_16(res);
|
---|
| 9549 | FLAG_V = VFLAG_SUB_16(src, dst, res);
|
---|
| 9550 |
|
---|
| 9551 | m68ki_write_16(ea, FLAG_Z);
|
---|
| 9552 | }
|
---|
| 9553 |
|
---|
| 9554 |
|
---|
| 9555 | M68KMAKE_OP(subi, 32, ., d)
|
---|
| 9556 | {
|
---|
| 9557 | uint* r_dst = &DY;
|
---|
| 9558 | uint src = OPER_I_32();
|
---|
| 9559 | uint dst = *r_dst;
|
---|
| 9560 | uint res = dst - src;
|
---|
| 9561 |
|
---|
| 9562 | FLAG_N = NFLAG_32(res);
|
---|
| 9563 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 9564 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
|
---|
| 9565 | FLAG_V = VFLAG_SUB_32(src, dst, res);
|
---|
| 9566 |
|
---|
| 9567 | *r_dst = FLAG_Z;
|
---|
| 9568 | }
|
---|
| 9569 |
|
---|
| 9570 |
|
---|
| 9571 | M68KMAKE_OP(subi, 32, ., .)
|
---|
| 9572 | {
|
---|
| 9573 | uint src = OPER_I_32();
|
---|
| 9574 | uint ea = M68KMAKE_GET_EA_AY_32;
|
---|
| 9575 | uint dst = m68ki_read_32(ea);
|
---|
| 9576 | uint res = dst - src;
|
---|
| 9577 |
|
---|
| 9578 | FLAG_N = NFLAG_32(res);
|
---|
| 9579 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 9580 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
|
---|
| 9581 | FLAG_V = VFLAG_SUB_32(src, dst, res);
|
---|
| 9582 |
|
---|
| 9583 | m68ki_write_32(ea, FLAG_Z);
|
---|
| 9584 | }
|
---|
| 9585 |
|
---|
| 9586 |
|
---|
| 9587 | M68KMAKE_OP(subq, 8, ., d)
|
---|
| 9588 | {
|
---|
| 9589 | uint* r_dst = &DY;
|
---|
| 9590 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 9591 | uint dst = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 9592 | uint res = dst - src;
|
---|
| 9593 |
|
---|
| 9594 | FLAG_N = NFLAG_8(res);
|
---|
| 9595 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 9596 | FLAG_X = FLAG_C = CFLAG_8(res);
|
---|
| 9597 | FLAG_V = VFLAG_SUB_8(src, dst, res);
|
---|
| 9598 |
|
---|
| 9599 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | FLAG_Z;
|
---|
| 9600 | }
|
---|
| 9601 |
|
---|
| 9602 |
|
---|
| 9603 | M68KMAKE_OP(subq, 8, ., .)
|
---|
| 9604 | {
|
---|
| 9605 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 9606 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 9607 | uint dst = m68ki_read_8(ea);
|
---|
| 9608 | uint res = dst - src;
|
---|
| 9609 |
|
---|
| 9610 | FLAG_N = NFLAG_8(res);
|
---|
| 9611 | FLAG_Z = MASK_OUT_ABOVE_8(res);
|
---|
| 9612 | FLAG_X = FLAG_C = CFLAG_8(res);
|
---|
| 9613 | FLAG_V = VFLAG_SUB_8(src, dst, res);
|
---|
| 9614 |
|
---|
| 9615 | m68ki_write_8(ea, FLAG_Z);
|
---|
| 9616 | }
|
---|
| 9617 |
|
---|
| 9618 |
|
---|
| 9619 | M68KMAKE_OP(subq, 16, ., d)
|
---|
| 9620 | {
|
---|
| 9621 | uint* r_dst = &DY;
|
---|
| 9622 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 9623 | uint dst = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 9624 | uint res = dst - src;
|
---|
| 9625 |
|
---|
| 9626 | FLAG_N = NFLAG_16(res);
|
---|
| 9627 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 9628 | FLAG_X = FLAG_C = CFLAG_16(res);
|
---|
| 9629 | FLAG_V = VFLAG_SUB_16(src, dst, res);
|
---|
| 9630 |
|
---|
| 9631 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | FLAG_Z;
|
---|
| 9632 | }
|
---|
| 9633 |
|
---|
| 9634 |
|
---|
| 9635 | M68KMAKE_OP(subq, 16, ., a)
|
---|
| 9636 | {
|
---|
| 9637 | uint* r_dst = &AY;
|
---|
| 9638 |
|
---|
| 9639 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - ((((REG_IR >> 9) - 1) & 7) + 1));
|
---|
| 9640 | }
|
---|
| 9641 |
|
---|
| 9642 |
|
---|
| 9643 | M68KMAKE_OP(subq, 16, ., .)
|
---|
| 9644 | {
|
---|
| 9645 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 9646 | uint ea = M68KMAKE_GET_EA_AY_16;
|
---|
| 9647 | uint dst = m68ki_read_16(ea);
|
---|
| 9648 | uint res = dst - src;
|
---|
| 9649 |
|
---|
| 9650 | FLAG_N = NFLAG_16(res);
|
---|
| 9651 | FLAG_Z = MASK_OUT_ABOVE_16(res);
|
---|
| 9652 | FLAG_X = FLAG_C = CFLAG_16(res);
|
---|
| 9653 | FLAG_V = VFLAG_SUB_16(src, dst, res);
|
---|
| 9654 |
|
---|
| 9655 | m68ki_write_16(ea, FLAG_Z);
|
---|
| 9656 | }
|
---|
| 9657 |
|
---|
| 9658 |
|
---|
| 9659 | M68KMAKE_OP(subq, 32, ., d)
|
---|
| 9660 | {
|
---|
| 9661 | uint* r_dst = &DY;
|
---|
| 9662 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 9663 | uint dst = *r_dst;
|
---|
| 9664 | uint res = dst - src;
|
---|
| 9665 |
|
---|
| 9666 | FLAG_N = NFLAG_32(res);
|
---|
| 9667 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 9668 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
|
---|
| 9669 | FLAG_V = VFLAG_SUB_32(src, dst, res);
|
---|
| 9670 |
|
---|
| 9671 | *r_dst = FLAG_Z;
|
---|
| 9672 | }
|
---|
| 9673 |
|
---|
| 9674 |
|
---|
| 9675 | M68KMAKE_OP(subq, 32, ., a)
|
---|
| 9676 | {
|
---|
| 9677 | uint* r_dst = &AY;
|
---|
| 9678 |
|
---|
| 9679 | *r_dst = MASK_OUT_ABOVE_32(*r_dst - ((((REG_IR >> 9) - 1) & 7) + 1));
|
---|
| 9680 | }
|
---|
| 9681 |
|
---|
| 9682 |
|
---|
| 9683 | M68KMAKE_OP(subq, 32, ., .)
|
---|
| 9684 | {
|
---|
| 9685 | uint src = (((REG_IR >> 9) - 1) & 7) + 1;
|
---|
| 9686 | uint ea = M68KMAKE_GET_EA_AY_32;
|
---|
| 9687 | uint dst = m68ki_read_32(ea);
|
---|
| 9688 | uint res = dst - src;
|
---|
| 9689 |
|
---|
| 9690 | FLAG_N = NFLAG_32(res);
|
---|
| 9691 | FLAG_Z = MASK_OUT_ABOVE_32(res);
|
---|
| 9692 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
|
---|
| 9693 | FLAG_V = VFLAG_SUB_32(src, dst, res);
|
---|
| 9694 |
|
---|
| 9695 | m68ki_write_32(ea, FLAG_Z);
|
---|
| 9696 | }
|
---|
| 9697 |
|
---|
| 9698 |
|
---|
| 9699 | M68KMAKE_OP(subx, 8, rr, .)
|
---|
| 9700 | {
|
---|
| 9701 | uint* r_dst = &DX;
|
---|
| 9702 | uint src = MASK_OUT_ABOVE_8(DY);
|
---|
| 9703 | uint dst = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 9704 | uint res = dst - src - XFLAG_AS_1();
|
---|
| 9705 |
|
---|
| 9706 | FLAG_N = NFLAG_8(res);
|
---|
| 9707 | FLAG_X = FLAG_C = CFLAG_8(res);
|
---|
| 9708 | FLAG_V = VFLAG_SUB_8(src, dst, res);
|
---|
| 9709 |
|
---|
| 9710 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 9711 | FLAG_Z |= res;
|
---|
| 9712 |
|
---|
| 9713 | *r_dst = MASK_OUT_BELOW_8(*r_dst) | res;
|
---|
| 9714 | }
|
---|
| 9715 |
|
---|
| 9716 |
|
---|
| 9717 | M68KMAKE_OP(subx, 16, rr, .)
|
---|
| 9718 | {
|
---|
| 9719 | uint* r_dst = &DX;
|
---|
| 9720 | uint src = MASK_OUT_ABOVE_16(DY);
|
---|
| 9721 | uint dst = MASK_OUT_ABOVE_16(*r_dst);
|
---|
| 9722 | uint res = dst - src - XFLAG_AS_1();
|
---|
| 9723 |
|
---|
| 9724 | FLAG_N = NFLAG_16(res);
|
---|
| 9725 | FLAG_X = FLAG_C = CFLAG_16(res);
|
---|
| 9726 | FLAG_V = VFLAG_SUB_16(src, dst, res);
|
---|
| 9727 |
|
---|
| 9728 | res = MASK_OUT_ABOVE_16(res);
|
---|
| 9729 | FLAG_Z |= res;
|
---|
| 9730 |
|
---|
| 9731 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | res;
|
---|
| 9732 | }
|
---|
| 9733 |
|
---|
| 9734 |
|
---|
| 9735 | M68KMAKE_OP(subx, 32, rr, .)
|
---|
| 9736 | {
|
---|
| 9737 | uint* r_dst = &DX;
|
---|
| 9738 | uint src = DY;
|
---|
| 9739 | uint dst = *r_dst;
|
---|
| 9740 | uint res = dst - src - XFLAG_AS_1();
|
---|
| 9741 |
|
---|
| 9742 | FLAG_N = NFLAG_32(res);
|
---|
| 9743 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
|
---|
| 9744 | FLAG_V = VFLAG_SUB_32(src, dst, res);
|
---|
| 9745 |
|
---|
| 9746 | res = MASK_OUT_ABOVE_32(res);
|
---|
| 9747 | FLAG_Z |= res;
|
---|
| 9748 |
|
---|
| 9749 | *r_dst = res;
|
---|
| 9750 | }
|
---|
| 9751 |
|
---|
| 9752 |
|
---|
| 9753 | M68KMAKE_OP(subx, 8, mm, ax7)
|
---|
| 9754 | {
|
---|
| 9755 | uint src = OPER_AY_PD_8();
|
---|
| 9756 | uint ea = EA_A7_PD_8();
|
---|
| 9757 | uint dst = m68ki_read_8(ea);
|
---|
| 9758 | uint res = dst - src - XFLAG_AS_1();
|
---|
| 9759 |
|
---|
| 9760 | FLAG_N = NFLAG_8(res);
|
---|
| 9761 | FLAG_X = FLAG_C = CFLAG_8(res);
|
---|
| 9762 | FLAG_V = VFLAG_SUB_8(src, dst, res);
|
---|
| 9763 |
|
---|
| 9764 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 9765 | FLAG_Z |= res;
|
---|
| 9766 |
|
---|
| 9767 | m68ki_write_8(ea, res);
|
---|
| 9768 | }
|
---|
| 9769 |
|
---|
| 9770 |
|
---|
| 9771 | M68KMAKE_OP(subx, 8, mm, ay7)
|
---|
| 9772 | {
|
---|
| 9773 | uint src = OPER_A7_PD_8();
|
---|
| 9774 | uint ea = EA_AX_PD_8();
|
---|
| 9775 | uint dst = m68ki_read_8(ea);
|
---|
| 9776 | uint res = dst - src - XFLAG_AS_1();
|
---|
| 9777 |
|
---|
| 9778 | FLAG_N = NFLAG_8(res);
|
---|
| 9779 | FLAG_X = FLAG_C = CFLAG_8(res);
|
---|
| 9780 | FLAG_V = VFLAG_SUB_8(src, dst, res);
|
---|
| 9781 |
|
---|
| 9782 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 9783 | FLAG_Z |= res;
|
---|
| 9784 |
|
---|
| 9785 | m68ki_write_8(ea, res);
|
---|
| 9786 | }
|
---|
| 9787 |
|
---|
| 9788 |
|
---|
| 9789 | M68KMAKE_OP(subx, 8, mm, axy7)
|
---|
| 9790 | {
|
---|
| 9791 | uint src = OPER_A7_PD_8();
|
---|
| 9792 | uint ea = EA_A7_PD_8();
|
---|
| 9793 | uint dst = m68ki_read_8(ea);
|
---|
| 9794 | uint res = dst - src - XFLAG_AS_1();
|
---|
| 9795 |
|
---|
| 9796 | FLAG_N = NFLAG_8(res);
|
---|
| 9797 | FLAG_X = FLAG_C = CFLAG_8(res);
|
---|
| 9798 | FLAG_V = VFLAG_SUB_8(src, dst, res);
|
---|
| 9799 |
|
---|
| 9800 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 9801 | FLAG_Z |= res;
|
---|
| 9802 |
|
---|
| 9803 | m68ki_write_8(ea, res);
|
---|
| 9804 | }
|
---|
| 9805 |
|
---|
| 9806 |
|
---|
| 9807 | M68KMAKE_OP(subx, 8, mm, .)
|
---|
| 9808 | {
|
---|
| 9809 | uint src = OPER_AY_PD_8();
|
---|
| 9810 | uint ea = EA_AX_PD_8();
|
---|
| 9811 | uint dst = m68ki_read_8(ea);
|
---|
| 9812 | uint res = dst - src - XFLAG_AS_1();
|
---|
| 9813 |
|
---|
| 9814 | FLAG_N = NFLAG_8(res);
|
---|
| 9815 | FLAG_X = FLAG_C = CFLAG_8(res);
|
---|
| 9816 | FLAG_V = VFLAG_SUB_8(src, dst, res);
|
---|
| 9817 |
|
---|
| 9818 | res = MASK_OUT_ABOVE_8(res);
|
---|
| 9819 | FLAG_Z |= res;
|
---|
| 9820 |
|
---|
| 9821 | m68ki_write_8(ea, res);
|
---|
| 9822 | }
|
---|
| 9823 |
|
---|
| 9824 |
|
---|
| 9825 | M68KMAKE_OP(subx, 16, mm, .)
|
---|
| 9826 | {
|
---|
| 9827 | uint src = OPER_AY_PD_16();
|
---|
| 9828 | uint ea = EA_AX_PD_16();
|
---|
| 9829 | uint dst = m68ki_read_16(ea);
|
---|
| 9830 | uint res = dst - src - XFLAG_AS_1();
|
---|
| 9831 |
|
---|
| 9832 | FLAG_N = NFLAG_16(res);
|
---|
| 9833 | FLAG_X = FLAG_C = CFLAG_16(res);
|
---|
| 9834 | FLAG_V = VFLAG_SUB_16(src, dst, res);
|
---|
| 9835 |
|
---|
| 9836 | res = MASK_OUT_ABOVE_16(res);
|
---|
| 9837 | FLAG_Z |= res;
|
---|
| 9838 |
|
---|
| 9839 | m68ki_write_16(ea, res);
|
---|
| 9840 | }
|
---|
| 9841 |
|
---|
| 9842 |
|
---|
| 9843 | M68KMAKE_OP(subx, 32, mm, .)
|
---|
| 9844 | {
|
---|
| 9845 | uint src = OPER_AY_PD_32();
|
---|
| 9846 | uint ea = EA_AX_PD_32();
|
---|
| 9847 | uint dst = m68ki_read_32(ea);
|
---|
| 9848 | uint res = dst - src - XFLAG_AS_1();
|
---|
| 9849 |
|
---|
| 9850 | FLAG_N = NFLAG_32(res);
|
---|
| 9851 | FLAG_X = FLAG_C = CFLAG_SUB_32(src, dst, res);
|
---|
| 9852 | FLAG_V = VFLAG_SUB_32(src, dst, res);
|
---|
| 9853 |
|
---|
| 9854 | res = MASK_OUT_ABOVE_32(res);
|
---|
| 9855 | FLAG_Z |= res;
|
---|
| 9856 |
|
---|
| 9857 | m68ki_write_32(ea, res);
|
---|
| 9858 | }
|
---|
| 9859 |
|
---|
| 9860 |
|
---|
| 9861 | M68KMAKE_OP(swap, 32, ., .)
|
---|
| 9862 | {
|
---|
| 9863 | uint* r_dst = &DY;
|
---|
| 9864 |
|
---|
| 9865 | FLAG_Z = MASK_OUT_ABOVE_32(*r_dst<<16);
|
---|
| 9866 | *r_dst = (*r_dst>>16) | FLAG_Z;
|
---|
| 9867 |
|
---|
| 9868 | FLAG_Z = *r_dst;
|
---|
| 9869 | FLAG_N = NFLAG_32(*r_dst);
|
---|
| 9870 | FLAG_C = CFLAG_CLEAR;
|
---|
| 9871 | FLAG_V = VFLAG_CLEAR;
|
---|
| 9872 | }
|
---|
| 9873 |
|
---|
| 9874 |
|
---|
| 9875 | M68KMAKE_OP(tas, 8, ., d)
|
---|
| 9876 | {
|
---|
| 9877 | uint* r_dst = &DY;
|
---|
| 9878 |
|
---|
| 9879 | FLAG_Z = MASK_OUT_ABOVE_8(*r_dst);
|
---|
| 9880 | FLAG_N = NFLAG_8(*r_dst);
|
---|
| 9881 | FLAG_V = VFLAG_CLEAR;
|
---|
| 9882 | FLAG_C = CFLAG_CLEAR;
|
---|
| 9883 | *r_dst |= 0x80;
|
---|
| 9884 | }
|
---|
| 9885 |
|
---|
| 9886 |
|
---|
| 9887 | M68KMAKE_OP(tas, 8, ., .)
|
---|
| 9888 | {
|
---|
| 9889 | uint ea = M68KMAKE_GET_EA_AY_8;
|
---|
| 9890 | uint dst = m68ki_read_8(ea);
|
---|
| 9891 |
|
---|
| 9892 | FLAG_Z = dst;
|
---|
| 9893 | FLAG_N = NFLAG_8(dst);
|
---|
| 9894 | FLAG_V = VFLAG_CLEAR;
|
---|
| 9895 | FLAG_C = CFLAG_CLEAR;
|
---|
| 9896 | m68ki_write_8(ea, dst | 0x80);
|
---|
| 9897 | }
|
---|
| 9898 |
|
---|
| 9899 |
|
---|
| 9900 | M68KMAKE_OP(trap, 0, ., .)
|
---|
| 9901 | {
|
---|
| 9902 | /* Trap#n stacks exception frame type 0 */
|
---|
| 9903 | m68ki_exception_trapN(EXCEPTION_TRAP_BASE + (REG_IR & 0xf)); /* HJB 990403 */
|
---|
| 9904 | }
|
---|
| 9905 |
|
---|
| 9906 |
|
---|
| 9907 | M68KMAKE_OP(trapt, 0, ., .)
|
---|
| 9908 | {
|
---|
| 9909 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 9910 | {
|
---|
| 9911 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
|
---|
| 9912 | return;
|
---|
| 9913 | }
|
---|
| 9914 | m68ki_exception_illegal();
|
---|
| 9915 | }
|
---|
| 9916 |
|
---|
| 9917 |
|
---|
| 9918 | M68KMAKE_OP(trapt, 16, ., .)
|
---|
| 9919 | {
|
---|
| 9920 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 9921 | {
|
---|
| 9922 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
|
---|
| 9923 | return;
|
---|
| 9924 | }
|
---|
| 9925 | m68ki_exception_illegal();
|
---|
| 9926 | }
|
---|
| 9927 |
|
---|
| 9928 |
|
---|
| 9929 | M68KMAKE_OP(trapt, 32, ., .)
|
---|
| 9930 | {
|
---|
| 9931 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 9932 | {
|
---|
| 9933 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
|
---|
| 9934 | return;
|
---|
| 9935 | }
|
---|
| 9936 | m68ki_exception_illegal();
|
---|
| 9937 | }
|
---|
| 9938 |
|
---|
| 9939 |
|
---|
| 9940 | M68KMAKE_OP(trapf, 0, ., .)
|
---|
| 9941 | {
|
---|
| 9942 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 9943 | {
|
---|
| 9944 | return;
|
---|
| 9945 | }
|
---|
| 9946 | m68ki_exception_illegal();
|
---|
| 9947 | }
|
---|
| 9948 |
|
---|
| 9949 |
|
---|
| 9950 | M68KMAKE_OP(trapf, 16, ., .)
|
---|
| 9951 | {
|
---|
| 9952 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 9953 | {
|
---|
| 9954 | REG_PC += 2;
|
---|
| 9955 | return;
|
---|
| 9956 | }
|
---|
| 9957 | m68ki_exception_illegal();
|
---|
| 9958 | }
|
---|
| 9959 |
|
---|
| 9960 |
|
---|
| 9961 | M68KMAKE_OP(trapf, 32, ., .)
|
---|
| 9962 | {
|
---|
| 9963 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 9964 | {
|
---|
| 9965 | REG_PC += 4;
|
---|
| 9966 | return;
|
---|
| 9967 | }
|
---|
| 9968 | m68ki_exception_illegal();
|
---|
| 9969 | }
|
---|
| 9970 |
|
---|
| 9971 |
|
---|
| 9972 | M68KMAKE_OP(trapcc, 0, ., .)
|
---|
| 9973 | {
|
---|
| 9974 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 9975 | {
|
---|
| 9976 | if(M68KMAKE_CC)
|
---|
| 9977 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
|
---|
| 9978 | return;
|
---|
| 9979 | }
|
---|
| 9980 | m68ki_exception_illegal();
|
---|
| 9981 | }
|
---|
| 9982 |
|
---|
| 9983 |
|
---|
| 9984 | M68KMAKE_OP(trapcc, 16, ., .)
|
---|
| 9985 | {
|
---|
| 9986 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 9987 | {
|
---|
| 9988 | if(M68KMAKE_CC)
|
---|
| 9989 | {
|
---|
| 9990 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
|
---|
| 9991 | return;
|
---|
| 9992 | }
|
---|
| 9993 | REG_PC += 2;
|
---|
| 9994 | return;
|
---|
| 9995 | }
|
---|
| 9996 | m68ki_exception_illegal();
|
---|
| 9997 | }
|
---|
| 9998 |
|
---|
| 9999 |
|
---|
| 10000 | M68KMAKE_OP(trapcc, 32, ., .)
|
---|
| 10001 | {
|
---|
| 10002 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 10003 | {
|
---|
| 10004 | if(M68KMAKE_CC)
|
---|
| 10005 | {
|
---|
| 10006 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
|
---|
| 10007 | return;
|
---|
| 10008 | }
|
---|
| 10009 | REG_PC += 4;
|
---|
| 10010 | return;
|
---|
| 10011 | }
|
---|
| 10012 | m68ki_exception_illegal();
|
---|
| 10013 | }
|
---|
| 10014 |
|
---|
| 10015 |
|
---|
| 10016 | M68KMAKE_OP(trapv, 0, ., .)
|
---|
| 10017 | {
|
---|
| 10018 | if(COND_VC())
|
---|
| 10019 | {
|
---|
| 10020 | return;
|
---|
| 10021 | }
|
---|
| 10022 | m68ki_exception_trap(EXCEPTION_TRAPV); /* HJB 990403 */
|
---|
| 10023 | }
|
---|
| 10024 |
|
---|
| 10025 |
|
---|
| 10026 | M68KMAKE_OP(tst, 8, ., d)
|
---|
| 10027 | {
|
---|
| 10028 | uint res = MASK_OUT_ABOVE_8(DY);
|
---|
| 10029 |
|
---|
| 10030 | FLAG_N = NFLAG_8(res);
|
---|
| 10031 | FLAG_Z = res;
|
---|
| 10032 | FLAG_V = VFLAG_CLEAR;
|
---|
| 10033 | FLAG_C = CFLAG_CLEAR;
|
---|
| 10034 | }
|
---|
| 10035 |
|
---|
| 10036 |
|
---|
| 10037 | M68KMAKE_OP(tst, 8, ., .)
|
---|
| 10038 | {
|
---|
| 10039 | uint res = M68KMAKE_GET_OPER_AY_8;
|
---|
| 10040 |
|
---|
| 10041 | FLAG_N = NFLAG_8(res);
|
---|
| 10042 | FLAG_Z = res;
|
---|
| 10043 | FLAG_V = VFLAG_CLEAR;
|
---|
| 10044 | FLAG_C = CFLAG_CLEAR;
|
---|
| 10045 | }
|
---|
| 10046 |
|
---|
| 10047 |
|
---|
| 10048 | M68KMAKE_OP(tst, 8, ., pcdi)
|
---|
| 10049 | {
|
---|
| 10050 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 10051 | {
|
---|
| 10052 | uint res = OPER_PCDI_8();
|
---|
| 10053 |
|
---|
| 10054 | FLAG_N = NFLAG_8(res);
|
---|
| 10055 | FLAG_Z = res;
|
---|
| 10056 | FLAG_V = VFLAG_CLEAR;
|
---|
| 10057 | FLAG_C = CFLAG_CLEAR;
|
---|
| 10058 | return;
|
---|
| 10059 | }
|
---|
| 10060 | m68ki_exception_illegal();
|
---|
| 10061 | }
|
---|
| 10062 |
|
---|
| 10063 |
|
---|
| 10064 | M68KMAKE_OP(tst, 8, ., pcix)
|
---|
| 10065 | {
|
---|
| 10066 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 10067 | {
|
---|
| 10068 | uint res = OPER_PCIX_8();
|
---|
| 10069 |
|
---|
| 10070 | FLAG_N = NFLAG_8(res);
|
---|
| 10071 | FLAG_Z = res;
|
---|
| 10072 | FLAG_V = VFLAG_CLEAR;
|
---|
| 10073 | FLAG_C = CFLAG_CLEAR;
|
---|
| 10074 | return;
|
---|
| 10075 | }
|
---|
| 10076 | m68ki_exception_illegal();
|
---|
| 10077 | }
|
---|
| 10078 |
|
---|
| 10079 |
|
---|
| 10080 | M68KMAKE_OP(tst, 8, ., i)
|
---|
| 10081 | {
|
---|
| 10082 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 10083 | {
|
---|
| 10084 | uint res = OPER_I_8();
|
---|
| 10085 |
|
---|
| 10086 | FLAG_N = NFLAG_8(res);
|
---|
| 10087 | FLAG_Z = res;
|
---|
| 10088 | FLAG_V = VFLAG_CLEAR;
|
---|
| 10089 | FLAG_C = CFLAG_CLEAR;
|
---|
| 10090 | return;
|
---|
| 10091 | }
|
---|
| 10092 | m68ki_exception_illegal();
|
---|
| 10093 | }
|
---|
| 10094 |
|
---|
| 10095 |
|
---|
| 10096 | M68KMAKE_OP(tst, 16, ., d)
|
---|
| 10097 | {
|
---|
| 10098 | uint res = MASK_OUT_ABOVE_16(DY);
|
---|
| 10099 |
|
---|
| 10100 | FLAG_N = NFLAG_16(res);
|
---|
| 10101 | FLAG_Z = res;
|
---|
| 10102 | FLAG_V = VFLAG_CLEAR;
|
---|
| 10103 | FLAG_C = CFLAG_CLEAR;
|
---|
| 10104 | }
|
---|
| 10105 |
|
---|
| 10106 |
|
---|
| 10107 | M68KMAKE_OP(tst, 16, ., a)
|
---|
| 10108 | {
|
---|
| 10109 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 10110 | {
|
---|
| 10111 | uint res = MAKE_INT_16(AY);
|
---|
| 10112 |
|
---|
| 10113 | FLAG_N = NFLAG_16(res);
|
---|
| 10114 | FLAG_Z = res;
|
---|
| 10115 | FLAG_V = VFLAG_CLEAR;
|
---|
| 10116 | FLAG_C = CFLAG_CLEAR;
|
---|
| 10117 | return;
|
---|
| 10118 | }
|
---|
| 10119 | m68ki_exception_illegal();
|
---|
| 10120 | }
|
---|
| 10121 |
|
---|
| 10122 |
|
---|
| 10123 | M68KMAKE_OP(tst, 16, ., .)
|
---|
| 10124 | {
|
---|
| 10125 | uint res = M68KMAKE_GET_OPER_AY_16;
|
---|
| 10126 |
|
---|
| 10127 | FLAG_N = NFLAG_16(res);
|
---|
| 10128 | FLAG_Z = res;
|
---|
| 10129 | FLAG_V = VFLAG_CLEAR;
|
---|
| 10130 | FLAG_C = CFLAG_CLEAR;
|
---|
| 10131 | }
|
---|
| 10132 |
|
---|
| 10133 |
|
---|
| 10134 | M68KMAKE_OP(tst, 16, ., pcdi)
|
---|
| 10135 | {
|
---|
| 10136 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 10137 | {
|
---|
| 10138 | uint res = OPER_PCDI_16();
|
---|
| 10139 |
|
---|
| 10140 | FLAG_N = NFLAG_16(res);
|
---|
| 10141 | FLAG_Z = res;
|
---|
| 10142 | FLAG_V = VFLAG_CLEAR;
|
---|
| 10143 | FLAG_C = CFLAG_CLEAR;
|
---|
| 10144 | return;
|
---|
| 10145 | }
|
---|
| 10146 | m68ki_exception_illegal();
|
---|
| 10147 | }
|
---|
| 10148 |
|
---|
| 10149 |
|
---|
| 10150 | M68KMAKE_OP(tst, 16, ., pcix)
|
---|
| 10151 | {
|
---|
| 10152 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 10153 | {
|
---|
| 10154 | uint res = OPER_PCIX_16();
|
---|
| 10155 |
|
---|
| 10156 | FLAG_N = NFLAG_16(res);
|
---|
| 10157 | FLAG_Z = res;
|
---|
| 10158 | FLAG_V = VFLAG_CLEAR;
|
---|
| 10159 | FLAG_C = CFLAG_CLEAR;
|
---|
| 10160 | return;
|
---|
| 10161 | }
|
---|
| 10162 | m68ki_exception_illegal();
|
---|
| 10163 | }
|
---|
| 10164 |
|
---|
| 10165 |
|
---|
| 10166 | M68KMAKE_OP(tst, 16, ., i)
|
---|
| 10167 | {
|
---|
| 10168 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 10169 | {
|
---|
| 10170 | uint res = OPER_I_16();
|
---|
| 10171 |
|
---|
| 10172 | FLAG_N = NFLAG_16(res);
|
---|
| 10173 | FLAG_Z = res;
|
---|
| 10174 | FLAG_V = VFLAG_CLEAR;
|
---|
| 10175 | FLAG_C = CFLAG_CLEAR;
|
---|
| 10176 | return;
|
---|
| 10177 | }
|
---|
| 10178 | m68ki_exception_illegal();
|
---|
| 10179 | }
|
---|
| 10180 |
|
---|
| 10181 |
|
---|
| 10182 | M68KMAKE_OP(tst, 32, ., d)
|
---|
| 10183 | {
|
---|
| 10184 | uint res = DY;
|
---|
| 10185 |
|
---|
| 10186 | FLAG_N = NFLAG_32(res);
|
---|
| 10187 | FLAG_Z = res;
|
---|
| 10188 | FLAG_V = VFLAG_CLEAR;
|
---|
| 10189 | FLAG_C = CFLAG_CLEAR;
|
---|
| 10190 | }
|
---|
| 10191 |
|
---|
| 10192 |
|
---|
| 10193 | M68KMAKE_OP(tst, 32, ., a)
|
---|
| 10194 | {
|
---|
| 10195 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 10196 | {
|
---|
| 10197 | uint res = AY;
|
---|
| 10198 |
|
---|
| 10199 | FLAG_N = NFLAG_32(res);
|
---|
| 10200 | FLAG_Z = res;
|
---|
| 10201 | FLAG_V = VFLAG_CLEAR;
|
---|
| 10202 | FLAG_C = CFLAG_CLEAR;
|
---|
| 10203 | return;
|
---|
| 10204 | }
|
---|
| 10205 | m68ki_exception_illegal();
|
---|
| 10206 | }
|
---|
| 10207 |
|
---|
| 10208 |
|
---|
| 10209 | M68KMAKE_OP(tst, 32, ., .)
|
---|
| 10210 | {
|
---|
| 10211 | uint res = M68KMAKE_GET_OPER_AY_32;
|
---|
| 10212 |
|
---|
| 10213 | FLAG_N = NFLAG_32(res);
|
---|
| 10214 | FLAG_Z = res;
|
---|
| 10215 | FLAG_V = VFLAG_CLEAR;
|
---|
| 10216 | FLAG_C = CFLAG_CLEAR;
|
---|
| 10217 | }
|
---|
| 10218 |
|
---|
| 10219 |
|
---|
| 10220 | M68KMAKE_OP(tst, 32, ., pcdi)
|
---|
| 10221 | {
|
---|
| 10222 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 10223 | {
|
---|
| 10224 | uint res = OPER_PCDI_32();
|
---|
| 10225 |
|
---|
| 10226 | FLAG_N = NFLAG_32(res);
|
---|
| 10227 | FLAG_Z = res;
|
---|
| 10228 | FLAG_V = VFLAG_CLEAR;
|
---|
| 10229 | FLAG_C = CFLAG_CLEAR;
|
---|
| 10230 | return;
|
---|
| 10231 | }
|
---|
| 10232 | m68ki_exception_illegal();
|
---|
| 10233 | }
|
---|
| 10234 |
|
---|
| 10235 |
|
---|
| 10236 | M68KMAKE_OP(tst, 32, ., pcix)
|
---|
| 10237 | {
|
---|
| 10238 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 10239 | {
|
---|
| 10240 | uint res = OPER_PCIX_32();
|
---|
| 10241 |
|
---|
| 10242 | FLAG_N = NFLAG_32(res);
|
---|
| 10243 | FLAG_Z = res;
|
---|
| 10244 | FLAG_V = VFLAG_CLEAR;
|
---|
| 10245 | FLAG_C = CFLAG_CLEAR;
|
---|
| 10246 | return;
|
---|
| 10247 | }
|
---|
| 10248 | m68ki_exception_illegal();
|
---|
| 10249 | }
|
---|
| 10250 |
|
---|
| 10251 |
|
---|
| 10252 | M68KMAKE_OP(tst, 32, ., i)
|
---|
| 10253 | {
|
---|
| 10254 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 10255 | {
|
---|
| 10256 | uint res = OPER_I_32();
|
---|
| 10257 |
|
---|
| 10258 | FLAG_N = NFLAG_32(res);
|
---|
| 10259 | FLAG_Z = res;
|
---|
| 10260 | FLAG_V = VFLAG_CLEAR;
|
---|
| 10261 | FLAG_C = CFLAG_CLEAR;
|
---|
| 10262 | return;
|
---|
| 10263 | }
|
---|
| 10264 | m68ki_exception_illegal();
|
---|
| 10265 | }
|
---|
| 10266 |
|
---|
| 10267 |
|
---|
| 10268 | M68KMAKE_OP(unlk, 32, ., a7)
|
---|
| 10269 | {
|
---|
| 10270 | REG_A[7] = m68ki_read_32(REG_A[7]);
|
---|
| 10271 | }
|
---|
| 10272 |
|
---|
| 10273 |
|
---|
| 10274 | M68KMAKE_OP(unlk, 32, ., .)
|
---|
| 10275 | {
|
---|
| 10276 | uint* r_dst = &AY;
|
---|
| 10277 |
|
---|
| 10278 | REG_A[7] = *r_dst;
|
---|
| 10279 | *r_dst = m68ki_pull_32();
|
---|
| 10280 | }
|
---|
| 10281 |
|
---|
| 10282 |
|
---|
| 10283 | M68KMAKE_OP(unpk, 16, rr, .)
|
---|
| 10284 | {
|
---|
| 10285 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 10286 | {
|
---|
| 10287 | /* Note: DX and DY are reversed in Motorola's docs */
|
---|
| 10288 | uint src = DY;
|
---|
| 10289 | uint* r_dst = &DX;
|
---|
| 10290 |
|
---|
| 10291 | *r_dst = MASK_OUT_BELOW_16(*r_dst) | (((((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16()) & 0xffff);
|
---|
| 10292 | return;
|
---|
| 10293 | }
|
---|
| 10294 | m68ki_exception_illegal();
|
---|
| 10295 | }
|
---|
| 10296 |
|
---|
| 10297 |
|
---|
| 10298 | M68KMAKE_OP(unpk, 16, mm, ax7)
|
---|
| 10299 | {
|
---|
| 10300 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 10301 | {
|
---|
| 10302 | /* Note: AX and AY are reversed in Motorola's docs */
|
---|
| 10303 | uint src = OPER_AY_PD_8();
|
---|
| 10304 | uint ea_dst;
|
---|
| 10305 |
|
---|
| 10306 | src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();
|
---|
| 10307 | ea_dst = EA_A7_PD_8();
|
---|
| 10308 | m68ki_write_8(ea_dst, (src >> 8) & 0xff);
|
---|
| 10309 | ea_dst = EA_A7_PD_8();
|
---|
| 10310 | m68ki_write_8(ea_dst, src & 0xff);
|
---|
| 10311 | return;
|
---|
| 10312 | }
|
---|
| 10313 | m68ki_exception_illegal();
|
---|
| 10314 | }
|
---|
| 10315 |
|
---|
| 10316 |
|
---|
| 10317 | M68KMAKE_OP(unpk, 16, mm, ay7)
|
---|
| 10318 | {
|
---|
| 10319 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 10320 | {
|
---|
| 10321 | /* Note: AX and AY are reversed in Motorola's docs */
|
---|
| 10322 | uint src = OPER_A7_PD_8();
|
---|
| 10323 | uint ea_dst;
|
---|
| 10324 |
|
---|
| 10325 | src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();
|
---|
| 10326 | ea_dst = EA_AX_PD_8();
|
---|
| 10327 | m68ki_write_8(ea_dst, (src >> 8) & 0xff);
|
---|
| 10328 | ea_dst = EA_AX_PD_8();
|
---|
| 10329 | m68ki_write_8(ea_dst, src & 0xff);
|
---|
| 10330 | return;
|
---|
| 10331 | }
|
---|
| 10332 | m68ki_exception_illegal();
|
---|
| 10333 | }
|
---|
| 10334 |
|
---|
| 10335 |
|
---|
| 10336 | M68KMAKE_OP(unpk, 16, mm, axy7)
|
---|
| 10337 | {
|
---|
| 10338 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 10339 | {
|
---|
| 10340 | uint src = OPER_A7_PD_8();
|
---|
| 10341 | uint ea_dst;
|
---|
| 10342 |
|
---|
| 10343 | src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();
|
---|
| 10344 | ea_dst = EA_A7_PD_8();
|
---|
| 10345 | m68ki_write_8(ea_dst, (src >> 8) & 0xff);
|
---|
| 10346 | ea_dst = EA_A7_PD_8();
|
---|
| 10347 | m68ki_write_8(ea_dst, src & 0xff);
|
---|
| 10348 | return;
|
---|
| 10349 | }
|
---|
| 10350 | m68ki_exception_illegal();
|
---|
| 10351 | }
|
---|
| 10352 |
|
---|
| 10353 |
|
---|
| 10354 | M68KMAKE_OP(unpk, 16, mm, .)
|
---|
| 10355 | {
|
---|
| 10356 | if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
|
---|
| 10357 | {
|
---|
| 10358 | /* Note: AX and AY are reversed in Motorola's docs */
|
---|
| 10359 | uint src = OPER_AY_PD_8();
|
---|
| 10360 | uint ea_dst;
|
---|
| 10361 |
|
---|
| 10362 | src = (((src << 4) & 0x0f00) | (src & 0x000f)) + OPER_I_16();
|
---|
| 10363 | ea_dst = EA_AX_PD_8();
|
---|
| 10364 | m68ki_write_8(ea_dst, (src >> 8) & 0xff);
|
---|
| 10365 | ea_dst = EA_AX_PD_8();
|
---|
| 10366 | m68ki_write_8(ea_dst, src & 0xff);
|
---|
| 10367 | return;
|
---|
| 10368 | }
|
---|
| 10369 | m68ki_exception_illegal();
|
---|
| 10370 | }
|
---|
| 10371 |
|
---|
| 10372 |
|
---|
| 10373 |
|
---|
| 10374 | XXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXXX
|
---|
| 10375 | M68KMAKE_END
|
---|