source: buchla-emu/cpu/m68kcpu.h@ 4edbd1c

Last change on this file since 4edbd1c was 93280c2, checked in by Thomas Lopatic <thomas@…>, 7 years ago

Added Musashi CPU emulator.
  • Property mode set to 100755
File size: 62.2 KB
Line 
1/* ======================================================================== */
2/* ========================= LICENSING & COPYRIGHT ======================== */
3/* ======================================================================== */
4/*
5 * MUSASHI
6 * Version 3.4
7 *
8 * A portable Motorola M680x0 processor emulation engine.
9 * Copyright 1998-2001 Karl Stenerud. All rights reserved.
10 *
11 * Permission is hereby granted, free of charge, to any person obtaining a copy
12 * of this software and associated documentation files (the "Software"), to deal
13 * in the Software without restriction, including without limitation the rights
14 * to use, copy, modify, merge, publish, distribute, sublicense, and/or sell
15 * copies of the Software, and to permit persons to whom the Software is
16 * furnished to do so, subject to the following conditions:
17 *
18 * The above copyright notice and this permission notice shall be included in
19 * all copies or substantial portions of the Software.
20
21 * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
22 * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
23 * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT. IN NO EVENT SHALL THE
24 * AUTHORS OR COPYRIGHT HOLDERS BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER
25 * LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM,
26 * OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN
27 * THE SOFTWARE.
28 */
29
30
31
32
33#ifndef M68KCPU__HEADER
34#define M68KCPU__HEADER
35
36#include "m68k.h"
37#include <limits.h>
38
39#if M68K_EMULATE_ADDRESS_ERROR
40#include <setjmp.h>
41#endif /* M68K_EMULATE_ADDRESS_ERROR */
42
43/* ======================================================================== */
44/* ==================== ARCHITECTURE-DEPENDANT DEFINES ==================== */
45/* ======================================================================== */
46
47/* Check for > 32bit sizes */
48#if UINT_MAX > 0xffffffff
49 #define M68K_INT_GT_32_BIT 1
50#else
51 #define M68K_INT_GT_32_BIT 0
52#endif
53
54/* Data types used in this emulation core */
55#undef sint8
56#undef sint16
57#undef sint32
58#undef sint64
59#undef uint8
60#undef uint16
61#undef uint32
62#undef uint64
63#undef sint
64#undef uint
65
66#define sint8 signed char /* ASG: changed from char to signed char */
67#define sint16 signed short
68#define sint32 signed long
69#define uint8 unsigned char
70#define uint16 unsigned short
71#define uint32 unsigned long
72
73/* signed and unsigned int must be at least 32 bits wide */
74#define sint signed int
75#define uint unsigned int
76
77
78#if M68K_USE_64_BIT
79#define sint64 signed long long
80#define uint64 unsigned long long
81#else
82#define sint64 sint32
83#define uint64 uint32
84#endif /* M68K_USE_64_BIT */
85
86
87
88/* Allow for architectures that don't have 8-bit sizes */
89#if UCHAR_MAX == 0xff
90 #define MAKE_INT_8(A) (sint8)(A)
91#else
92 #undef sint8
93 #define sint8 signed int
94 #undef uint8
95 #define uint8 unsigned int
96 INLINE sint MAKE_INT_8(uint value)
97 {
98 return (value & 0x80) ? value | ~0xff : value & 0xff;
99 }
100#endif /* UCHAR_MAX == 0xff */
101
102
103/* Allow for architectures that don't have 16-bit sizes */
104#if USHRT_MAX == 0xffff
105 #define MAKE_INT_16(A) (sint16)(A)
106#else
107 #undef sint16
108 #define sint16 signed int
109 #undef uint16
110 #define uint16 unsigned int
111 INLINE sint MAKE_INT_16(uint value)
112 {
113 return (value & 0x8000) ? value | ~0xffff : value & 0xffff;
114 }
115#endif /* USHRT_MAX == 0xffff */
116
117
118/* Allow for architectures that don't have 32-bit sizes */
119#if ULONG_MAX == 0xffffffff
120 #define MAKE_INT_32(A) (sint32)(A)
121#else
122 #undef sint32
123 #define sint32 signed int
124 #undef uint32
125 #define uint32 unsigned int
126 INLINE sint MAKE_INT_32(uint value)
127 {
128 return (value & 0x80000000) ? value | ~0xffffffff : value & 0xffffffff;
129 }
130#endif /* ULONG_MAX == 0xffffffff */
131
132
133
134
135/* ======================================================================== */
136/* ============================ GENERAL DEFINES =========================== */
137/* ======================================================================== */
138
139/* Exception Vectors handled by emulation */
140#define EXCEPTION_BUS_ERROR 2 /* This one is not emulated! */
141#define EXCEPTION_ADDRESS_ERROR 3 /* This one is partially emulated (doesn't stack a proper frame yet) */
142#define EXCEPTION_ILLEGAL_INSTRUCTION 4
143#define EXCEPTION_ZERO_DIVIDE 5
144#define EXCEPTION_CHK 6
145#define EXCEPTION_TRAPV 7
146#define EXCEPTION_PRIVILEGE_VIOLATION 8
147#define EXCEPTION_TRACE 9
148#define EXCEPTION_1010 10
149#define EXCEPTION_1111 11
150#define EXCEPTION_FORMAT_ERROR 14
151#define EXCEPTION_UNINITIALIZED_INTERRUPT 15
152#define EXCEPTION_SPURIOUS_INTERRUPT 24
153#define EXCEPTION_INTERRUPT_AUTOVECTOR 24
154#define EXCEPTION_TRAP_BASE 32
155
156/* Function codes set by CPU during data/address bus activity */
157#define FUNCTION_CODE_USER_DATA 1
158#define FUNCTION_CODE_USER_PROGRAM 2
159#define FUNCTION_CODE_SUPERVISOR_DATA 5
160#define FUNCTION_CODE_SUPERVISOR_PROGRAM 6
161#define FUNCTION_CODE_CPU_SPACE 7
162
163/* CPU types for deciding what to emulate */
164#define CPU_TYPE_000 1
165#define CPU_TYPE_010 2
166#define CPU_TYPE_EC020 4
167#define CPU_TYPE_020 8
168
169/* Different ways to stop the CPU */
170#define STOP_LEVEL_STOP 1
171#define STOP_LEVEL_HALT 2
172
173/* Used for 68000 address error processing */
174#define INSTRUCTION_YES 0
175#define INSTRUCTION_NO 0x08
176#define MODE_READ 0x10
177#define MODE_WRITE 0
178
179#define RUN_MODE_NORMAL 0
180#define RUN_MODE_BERR_AERR_RESET 1
181
182#ifndef NULL
183#define NULL ((void*)0)
184#endif
185
186/* ======================================================================== */
187/* ================================ MACROS ================================ */
188/* ======================================================================== */
189
190
191/* ---------------------------- General Macros ---------------------------- */
192
193/* Bit Isolation Macros */
194#define BIT_0(A) ((A) & 0x00000001)
195#define BIT_1(A) ((A) & 0x00000002)
196#define BIT_2(A) ((A) & 0x00000004)
197#define BIT_3(A) ((A) & 0x00000008)
198#define BIT_4(A) ((A) & 0x00000010)
199#define BIT_5(A) ((A) & 0x00000020)
200#define BIT_6(A) ((A) & 0x00000040)
201#define BIT_7(A) ((A) & 0x00000080)
202#define BIT_8(A) ((A) & 0x00000100)
203#define BIT_9(A) ((A) & 0x00000200)
204#define BIT_A(A) ((A) & 0x00000400)
205#define BIT_B(A) ((A) & 0x00000800)
206#define BIT_C(A) ((A) & 0x00001000)
207#define BIT_D(A) ((A) & 0x00002000)
208#define BIT_E(A) ((A) & 0x00004000)
209#define BIT_F(A) ((A) & 0x00008000)
210#define BIT_10(A) ((A) & 0x00010000)
211#define BIT_11(A) ((A) & 0x00020000)
212#define BIT_12(A) ((A) & 0x00040000)
213#define BIT_13(A) ((A) & 0x00080000)
214#define BIT_14(A) ((A) & 0x00100000)
215#define BIT_15(A) ((A) & 0x00200000)
216#define BIT_16(A) ((A) & 0x00400000)
217#define BIT_17(A) ((A) & 0x00800000)
218#define BIT_18(A) ((A) & 0x01000000)
219#define BIT_19(A) ((A) & 0x02000000)
220#define BIT_1A(A) ((A) & 0x04000000)
221#define BIT_1B(A) ((A) & 0x08000000)
222#define BIT_1C(A) ((A) & 0x10000000)
223#define BIT_1D(A) ((A) & 0x20000000)
224#define BIT_1E(A) ((A) & 0x40000000)
225#define BIT_1F(A) ((A) & 0x80000000)
226
227/* Get the most significant bit for specific sizes */
228#define GET_MSB_8(A) ((A) & 0x80)
229#define GET_MSB_9(A) ((A) & 0x100)
230#define GET_MSB_16(A) ((A) & 0x8000)
231#define GET_MSB_17(A) ((A) & 0x10000)
232#define GET_MSB_32(A) ((A) & 0x80000000)
233#if M68K_USE_64_BIT
234#define GET_MSB_33(A) ((A) & 0x100000000)
235#endif /* M68K_USE_64_BIT */
236
237/* Isolate nibbles */
238#define LOW_NIBBLE(A) ((A) & 0x0f)
239#define HIGH_NIBBLE(A) ((A) & 0xf0)
240
241/* These are used to isolate 8, 16, and 32 bit sizes */
242#define MASK_OUT_ABOVE_2(A) ((A) & 3)
243#define MASK_OUT_ABOVE_8(A) ((A) & 0xff)
244#define MASK_OUT_ABOVE_16(A) ((A) & 0xffff)
245#define MASK_OUT_BELOW_2(A) ((A) & ~3)
246#define MASK_OUT_BELOW_8(A) ((A) & ~0xff)
247#define MASK_OUT_BELOW_16(A) ((A) & ~0xffff)
248
249/* No need to mask if we are 32 bit */
250#if M68K_INT_GT_32_BIT || M68K_USE_64_BIT
251 #define MASK_OUT_ABOVE_32(A) ((A) & 0xffffffff)
252 #define MASK_OUT_BELOW_32(A) ((A) & ~0xffffffff)
253#else
254 #define MASK_OUT_ABOVE_32(A) (A)
255 #define MASK_OUT_BELOW_32(A) 0
256#endif /* M68K_INT_GT_32_BIT || M68K_USE_64_BIT */
257
258/* Simulate address lines of 68k family */
259#define ADDRESS_68K(A) ((A)&CPU_ADDRESS_MASK)
260
261
262/* Shift & Rotate Macros. */
263#define LSL(A, C) ((A) << (C))
264#define LSR(A, C) ((A) >> (C))
265
266/* Some > 32-bit optimizations */
267#if M68K_INT_GT_32_BIT
268 /* Shift left and right */
269 #define LSR_32(A, C) ((A) >> (C))
270 #define LSL_32(A, C) ((A) << (C))
271#else
272 /* We have to do this because the morons at ANSI decided that shifts
273 * by >= data size are undefined.
274 */
275 #define LSR_32(A, C) ((C) < 32 ? (A) >> (C) : 0)
276 #define LSL_32(A, C) ((C) < 32 ? (A) << (C) : 0)
277#endif /* M68K_INT_GT_32_BIT */
278
279#if M68K_USE_64_BIT
280 #define LSL_32_64(A, C) ((A) << (C))
281 #define LSR_32_64(A, C) ((A) >> (C))
282 #define ROL_33_64(A, C) (LSL_32_64(A, C) | LSR_32_64(A, 33-(C)))
283 #define ROR_33_64(A, C) (LSR_32_64(A, C) | LSL_32_64(A, 33-(C)))
284#endif /* M68K_USE_64_BIT */
285
286#define ROL_8(A, C) MASK_OUT_ABOVE_8(LSL(A, C) | LSR(A, 8-(C)))
287#define ROL_9(A, C) (LSL(A, C) | LSR(A, 9-(C)))
288#define ROL_16(A, C) MASK_OUT_ABOVE_16(LSL(A, C) | LSR(A, 16-(C)))
289#define ROL_17(A, C) (LSL(A, C) | LSR(A, 17-(C)))
290#define ROL_32(A, C) MASK_OUT_ABOVE_32(LSL_32(A, C) | LSR_32(A, 32-(C)))
291#define ROL_33(A, C) (LSL_32(A, C) | LSR_32(A, 33-(C)))
292
293#define ROR_8(A, C) MASK_OUT_ABOVE_8(LSR(A, C) | LSL(A, 8-(C)))
294#define ROR_9(A, C) (LSR(A, C) | LSL(A, 9-(C)))
295#define ROR_16(A, C) MASK_OUT_ABOVE_16(LSR(A, C) | LSL(A, 16-(C)))
296#define ROR_17(A, C) (LSR(A, C) | LSL(A, 17-(C)))
297#define ROR_32(A, C) MASK_OUT_ABOVE_32(LSR_32(A, C) | LSL_32(A, 32-(C)))
298#define ROR_33(A, C) (LSR_32(A, C) | LSL_32(A, 33-(C)))
299
300
301
302/* ------------------------------ CPU Access ------------------------------ */
303
304/* Access the CPU registers */
305#define CPU_TYPE m68ki_cpu.cpu_type
306
307#define REG_DA m68ki_cpu.dar /* easy access to data and address regs */
308#define REG_D m68ki_cpu.dar
309#define REG_A (m68ki_cpu.dar+8)
310#define REG_PPC m68ki_cpu.ppc
311#define REG_PC m68ki_cpu.pc
312#define REG_SP_BASE m68ki_cpu.sp
313#define REG_USP m68ki_cpu.sp[0]
314#define REG_ISP m68ki_cpu.sp[4]
315#define REG_MSP m68ki_cpu.sp[6]
316#define REG_SP m68ki_cpu.dar[15]
317#define REG_VBR m68ki_cpu.vbr
318#define REG_SFC m68ki_cpu.sfc
319#define REG_DFC m68ki_cpu.dfc
320#define REG_CACR m68ki_cpu.cacr
321#define REG_CAAR m68ki_cpu.caar
322#define REG_IR m68ki_cpu.ir
323
324#define FLAG_T1 m68ki_cpu.t1_flag
325#define FLAG_T0 m68ki_cpu.t0_flag
326#define FLAG_S m68ki_cpu.s_flag
327#define FLAG_M m68ki_cpu.m_flag
328#define FLAG_X m68ki_cpu.x_flag
329#define FLAG_N m68ki_cpu.n_flag
330#define FLAG_Z m68ki_cpu.not_z_flag
331#define FLAG_V m68ki_cpu.v_flag
332#define FLAG_C m68ki_cpu.c_flag
333#define FLAG_INT_MASK m68ki_cpu.int_mask
334
335#define CPU_INT_LEVEL m68ki_cpu.int_level /* ASG: changed from CPU_INTS_PENDING */
336#define CPU_INT_CYCLES m68ki_cpu.int_cycles /* ASG */
337#define CPU_STOPPED m68ki_cpu.stopped
338#define CPU_PREF_ADDR m68ki_cpu.pref_addr
339#define CPU_PREF_DATA m68ki_cpu.pref_data
340#define CPU_ADDRESS_MASK m68ki_cpu.address_mask
341#define CPU_SR_MASK m68ki_cpu.sr_mask
342#define CPU_INSTR_MODE m68ki_cpu.instr_mode
343#define CPU_RUN_MODE m68ki_cpu.run_mode
344
345#define CYC_INSTRUCTION m68ki_cpu.cyc_instruction
346#define CYC_EXCEPTION m68ki_cpu.cyc_exception
347#define CYC_BCC_NOTAKE_B m68ki_cpu.cyc_bcc_notake_b
348#define CYC_BCC_NOTAKE_W m68ki_cpu.cyc_bcc_notake_w
349#define CYC_DBCC_F_NOEXP m68ki_cpu.cyc_dbcc_f_noexp
350#define CYC_DBCC_F_EXP m68ki_cpu.cyc_dbcc_f_exp
351#define CYC_SCC_R_TRUE m68ki_cpu.cyc_scc_r_true
352#define CYC_MOVEM_W m68ki_cpu.cyc_movem_w
353#define CYC_MOVEM_L m68ki_cpu.cyc_movem_l
354#define CYC_SHIFT m68ki_cpu.cyc_shift
355#define CYC_RESET m68ki_cpu.cyc_reset
356
357
358#define CALLBACK_INT_ACK m68ki_cpu.int_ack_callback
359#define CALLBACK_BKPT_ACK m68ki_cpu.bkpt_ack_callback
360#define CALLBACK_RESET_INSTR m68ki_cpu.reset_instr_callback
361#define CALLBACK_PC_CHANGED m68ki_cpu.pc_changed_callback
362#define CALLBACK_SET_FC m68ki_cpu.set_fc_callback
363#define CALLBACK_INSTR_HOOK m68ki_cpu.instr_hook_callback
364
365
366
367/* ----------------------------- Configuration ---------------------------- */
368
369/* These defines are dependant on the configuration defines in m68kconf.h */
370
371/* Disable certain comparisons if we're not using all CPU types */
372#if M68K_EMULATE_020
373 #define CPU_TYPE_IS_020_PLUS(A) ((A) & CPU_TYPE_020)
374 #define CPU_TYPE_IS_020_LESS(A) 1
375#else
376 #define CPU_TYPE_IS_020_PLUS(A) 0
377 #define CPU_TYPE_IS_020_LESS(A) 1
378#endif
379
380#if M68K_EMULATE_EC020
381 #define CPU_TYPE_IS_EC020_PLUS(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020))
382 #define CPU_TYPE_IS_EC020_LESS(A) ((A) & (CPU_TYPE_000 | CPU_TYPE_010 | CPU_TYPE_EC020))
383#else
384 #define CPU_TYPE_IS_EC020_PLUS(A) CPU_TYPE_IS_020_PLUS(A)
385 #define CPU_TYPE_IS_EC020_LESS(A) CPU_TYPE_IS_020_LESS(A)
386#endif
387
388#if M68K_EMULATE_010
389 #define CPU_TYPE_IS_010(A) ((A) == CPU_TYPE_010)
390 #define CPU_TYPE_IS_010_PLUS(A) ((A) & (CPU_TYPE_010 | CPU_TYPE_EC020 | CPU_TYPE_020))
391 #define CPU_TYPE_IS_010_LESS(A) ((A) & (CPU_TYPE_000 | CPU_TYPE_010))
392#else
393 #define CPU_TYPE_IS_010(A) 0
394 #define CPU_TYPE_IS_010_PLUS(A) CPU_TYPE_IS_EC020_PLUS(A)
395 #define CPU_TYPE_IS_010_LESS(A) CPU_TYPE_IS_EC020_LESS(A)
396#endif
397
398#if M68K_EMULATE_020 || M68K_EMULATE_EC020
399 #define CPU_TYPE_IS_020_VARIANT(A) ((A) & (CPU_TYPE_EC020 | CPU_TYPE_020))
400#else
401 #define CPU_TYPE_IS_020_VARIANT(A) 0
402#endif
403
404#if M68K_EMULATE_020 || M68K_EMULATE_EC020 || M68K_EMULATE_010
405 #define CPU_TYPE_IS_000(A) ((A) == CPU_TYPE_000)
406#else
407 #define CPU_TYPE_IS_000(A) 1
408#endif
409
410
411#if !M68K_SEPARATE_READS
412#define m68k_read_immediate_16(A) m68ki_read_program_16(A)
413#define m68k_read_immediate_32(A) m68ki_read_program_32(A)
414
415#define m68k_read_pcrelative_8(A) m68ki_read_program_8(A)
416#define m68k_read_pcrelative_16(A) m68ki_read_program_16(A)
417#define m68k_read_pcrelative_32(A) m68ki_read_program_32(A)
418#endif /* M68K_SEPARATE_READS */
419
420
421/* Enable or disable callback functions */
422#if M68K_EMULATE_INT_ACK
423 #if M68K_EMULATE_INT_ACK == OPT_SPECIFY_HANDLER
424 #define m68ki_int_ack(A) M68K_INT_ACK_CALLBACK(A)
425 #else
426 #define m68ki_int_ack(A) CALLBACK_INT_ACK(A)
427 #endif
428#else
429 /* Default action is to used autovector mode, which is most common */
430 #define m68ki_int_ack(A) M68K_INT_ACK_AUTOVECTOR
431#endif /* M68K_EMULATE_INT_ACK */
432
433#if M68K_EMULATE_BKPT_ACK
434 #if M68K_EMULATE_BKPT_ACK == OPT_SPECIFY_HANDLER
435 #define m68ki_bkpt_ack(A) M68K_BKPT_ACK_CALLBACK(A)
436 #else
437 #define m68ki_bkpt_ack(A) CALLBACK_BKPT_ACK(A)
438 #endif
439#else
440 #define m68ki_bkpt_ack(A)
441#endif /* M68K_EMULATE_BKPT_ACK */
442
443#if M68K_EMULATE_RESET
444 #if M68K_EMULATE_RESET == OPT_SPECIFY_HANDLER
445 #define m68ki_output_reset() M68K_RESET_CALLBACK()
446 #else
447 #define m68ki_output_reset() CALLBACK_RESET_INSTR()
448 #endif
449#else
450 #define m68ki_output_reset()
451#endif /* M68K_EMULATE_RESET */
452
453#if M68K_INSTRUCTION_HOOK
454 #if M68K_INSTRUCTION_HOOK == OPT_SPECIFY_HANDLER
455 #define m68ki_instr_hook() M68K_INSTRUCTION_CALLBACK()
456 #else
457 #define m68ki_instr_hook() CALLBACK_INSTR_HOOK()
458 #endif
459#else
460 #define m68ki_instr_hook()
461#endif /* M68K_INSTRUCTION_HOOK */
462
463#if M68K_MONITOR_PC
464 #if M68K_MONITOR_PC == OPT_SPECIFY_HANDLER
465 #define m68ki_pc_changed(A) M68K_SET_PC_CALLBACK(ADDRESS_68K(A))
466 #else
467 #define m68ki_pc_changed(A) CALLBACK_PC_CHANGED(ADDRESS_68K(A))
468 #endif
469#else
470 #define m68ki_pc_changed(A)
471#endif /* M68K_MONITOR_PC */
472
473
474/* Enable or disable function code emulation */
475#if M68K_EMULATE_FC
476 #if M68K_EMULATE_FC == OPT_SPECIFY_HANDLER
477 #define m68ki_set_fc(A) M68K_SET_FC_CALLBACK(A)
478 #else
479 #define m68ki_set_fc(A) CALLBACK_SET_FC(A)
480 #endif
481 #define m68ki_use_data_space() m68ki_address_space = FUNCTION_CODE_USER_DATA
482 #define m68ki_use_program_space() m68ki_address_space = FUNCTION_CODE_USER_PROGRAM
483 #define m68ki_get_address_space() m68ki_address_space
484#else
485 #define m68ki_set_fc(A)
486 #define m68ki_use_data_space()
487 #define m68ki_use_program_space()
488 #define m68ki_get_address_space() FUNCTION_CODE_USER_DATA
489#endif /* M68K_EMULATE_FC */
490
491
492/* Enable or disable trace emulation */
493#if M68K_EMULATE_TRACE
494 /* Initiates trace checking before each instruction (t1) */
495 #define m68ki_trace_t1() m68ki_tracing = FLAG_T1
496 /* adds t0 to trace checking if we encounter change of flow */
497 #define m68ki_trace_t0() m68ki_tracing |= FLAG_T0
498 /* Clear all tracing */
499 #define m68ki_clear_trace() m68ki_tracing = 0
500 /* Cause a trace exception if we are tracing */
501 #define m68ki_exception_if_trace() if(m68ki_tracing) m68ki_exception_trace()
502#else
503 #define m68ki_trace_t1()
504 #define m68ki_trace_t0()
505 #define m68ki_clear_trace()
506 #define m68ki_exception_if_trace()
507#endif /* M68K_EMULATE_TRACE */
508
509
510
511/* Address error */
512#if M68K_EMULATE_ADDRESS_ERROR
513 #include <setjmp.h>
514 extern jmp_buf m68ki_aerr_trap;
515
516 #define m68ki_set_address_error_trap() \
517 if(setjmp(m68ki_aerr_trap) != 0) \
518 { \
519 m68ki_exception_address_error(); \
520 if(CPU_STOPPED) \
521 { \
522 SET_CYCLES(0); \
523 CPU_INT_CYCLES = 0; \
524 return m68ki_initial_cycles; \
525 } \
526 /* ensure we don't re-enter execution loop after an
527 address error if there's no more cycles remaining */ \
528 if(GET_CYCLES() <= 0) \
529 { \
530 /* return how many clocks we used */ \
531 return m68ki_initial_cycles - GET_CYCLES(); \
532 } \
533 }
534
535 #define m68ki_check_address_error(ADDR, WRITE_MODE, FC) \
536 if((ADDR)&1) \
537 { \
538 m68ki_aerr_address = ADDR; \
539 m68ki_aerr_write_mode = WRITE_MODE; \
540 m68ki_aerr_fc = FC; \
541 longjmp(m68ki_aerr_trap, 1); \
542 }
543#else
544 #define m68ki_set_address_error_trap()
545 #define m68ki_check_address_error(ADDR, WRITE_MODE, FC)
546#endif /* M68K_ADDRESS_ERROR */
547
548/* Logging */
549#if M68K_LOG_ENABLE
550 #include <stdio.h>
551 extern FILE* M68K_LOG_FILEHANDLE
552 extern char* m68ki_cpu_names[];
553
554 #define M68K_DO_LOG(A) if(M68K_LOG_FILEHANDLE) fprintf A
555 #if M68K_LOG_1010_1111
556 #define M68K_DO_LOG_EMU(A) if(M68K_LOG_FILEHANDLE) fprintf A
557 #else
558 #define M68K_DO_LOG_EMU(A)
559 #endif
560#else
561 #define M68K_DO_LOG(A)
562 #define M68K_DO_LOG_EMU(A)
563#endif
564
565
566
567/* -------------------------- EA / Operand Access ------------------------- */
568
569/*
570 * The general instruction format follows this pattern:
571 * .... XXX. .... .YYY
572 * where XXX is register X and YYY is register Y
573 */
574/* Data Register Isolation */
575#define DX (REG_D[(REG_IR >> 9) & 7])
576#define DY (REG_D[REG_IR & 7])
577/* Address Register Isolation */
578#define AX (REG_A[(REG_IR >> 9) & 7])
579#define AY (REG_A[REG_IR & 7])
580
581
582/* Effective Address Calculations */
583#define EA_AY_AI_8() AY /* address register indirect */
584#define EA_AY_AI_16() EA_AY_AI_8()
585#define EA_AY_AI_32() EA_AY_AI_8()
586#define EA_AY_PI_8() (AY++) /* postincrement (size = byte) */
587#define EA_AY_PI_16() ((AY+=2)-2) /* postincrement (size = word) */
588#define EA_AY_PI_32() ((AY+=4)-4) /* postincrement (size = long) */
589#define EA_AY_PD_8() (--AY) /* predecrement (size = byte) */
590#define EA_AY_PD_16() (AY-=2) /* predecrement (size = word) */
591#define EA_AY_PD_32() (AY-=4) /* predecrement (size = long) */
592#define EA_AY_DI_8() (AY+MAKE_INT_16(m68ki_read_imm_16())) /* displacement */
593#define EA_AY_DI_16() EA_AY_DI_8()
594#define EA_AY_DI_32() EA_AY_DI_8()
595#define EA_AY_IX_8() m68ki_get_ea_ix(AY) /* indirect + index */
596#define EA_AY_IX_16() EA_AY_IX_8()
597#define EA_AY_IX_32() EA_AY_IX_8()
598
599#define EA_AX_AI_8() AX
600#define EA_AX_AI_16() EA_AX_AI_8()
601#define EA_AX_AI_32() EA_AX_AI_8()
602#define EA_AX_PI_8() (AX++)
603#define EA_AX_PI_16() ((AX+=2)-2)
604#define EA_AX_PI_32() ((AX+=4)-4)
605#define EA_AX_PD_8() (--AX)
606#define EA_AX_PD_16() (AX-=2)
607#define EA_AX_PD_32() (AX-=4)
608#define EA_AX_DI_8() (AX+MAKE_INT_16(m68ki_read_imm_16()))
609#define EA_AX_DI_16() EA_AX_DI_8()
610#define EA_AX_DI_32() EA_AX_DI_8()
611#define EA_AX_IX_8() m68ki_get_ea_ix(AX)
612#define EA_AX_IX_16() EA_AX_IX_8()
613#define EA_AX_IX_32() EA_AX_IX_8()
614
615#define EA_A7_PI_8() ((REG_A[7]+=2)-2)
616#define EA_A7_PD_8() (REG_A[7]-=2)
617
618#define EA_AW_8() MAKE_INT_16(m68ki_read_imm_16()) /* absolute word */
619#define EA_AW_16() EA_AW_8()
620#define EA_AW_32() EA_AW_8()
621#define EA_AL_8() m68ki_read_imm_32() /* absolute long */
622#define EA_AL_16() EA_AL_8()
623#define EA_AL_32() EA_AL_8()
624#define EA_PCDI_8() m68ki_get_ea_pcdi() /* pc indirect + displacement */
625#define EA_PCDI_16() EA_PCDI_8()
626#define EA_PCDI_32() EA_PCDI_8()
627#define EA_PCIX_8() m68ki_get_ea_pcix() /* pc indirect + index */
628#define EA_PCIX_16() EA_PCIX_8()
629#define EA_PCIX_32() EA_PCIX_8()
630
631
632#define OPER_I_8() m68ki_read_imm_8()
633#define OPER_I_16() m68ki_read_imm_16()
634#define OPER_I_32() m68ki_read_imm_32()
635
636
637
638/* --------------------------- Status Register ---------------------------- */
639
640/* Flag Calculation Macros */
641#define CFLAG_8(A) (A)
642#define CFLAG_16(A) ((A)>>8)
643
644#if M68K_INT_GT_32_BIT
645 #define CFLAG_ADD_32(S, D, R) ((R)>>24)
646 #define CFLAG_SUB_32(S, D, R) ((R)>>24)
647#else
648 #define CFLAG_ADD_32(S, D, R) (((S & D) | (~R & (S | D)))>>23)
649 #define CFLAG_SUB_32(S, D, R) (((S & R) | (~D & (S | R)))>>23)
650#endif /* M68K_INT_GT_32_BIT */
651
652#define VFLAG_ADD_8(S, D, R) ((S^R) & (D^R))
653#define VFLAG_ADD_16(S, D, R) (((S^R) & (D^R))>>8)
654#define VFLAG_ADD_32(S, D, R) (((S^R) & (D^R))>>24)
655
656#define VFLAG_SUB_8(S, D, R) ((S^D) & (R^D))
657#define VFLAG_SUB_16(S, D, R) (((S^D) & (R^D))>>8)
658#define VFLAG_SUB_32(S, D, R) (((S^D) & (R^D))>>24)
659
660#define NFLAG_8(A) (A)
661#define NFLAG_16(A) ((A)>>8)
662#define NFLAG_32(A) ((A)>>24)
663#define NFLAG_64(A) ((A)>>56)
664
665#define ZFLAG_8(A) MASK_OUT_ABOVE_8(A)
666#define ZFLAG_16(A) MASK_OUT_ABOVE_16(A)
667#define ZFLAG_32(A) MASK_OUT_ABOVE_32(A)
668
669
670/* Flag values */
671#define NFLAG_SET 0x80
672#define NFLAG_CLEAR 0
673#define CFLAG_SET 0x100
674#define CFLAG_CLEAR 0
675#define XFLAG_SET 0x100
676#define XFLAG_CLEAR 0
677#define VFLAG_SET 0x80
678#define VFLAG_CLEAR 0
679#define ZFLAG_SET 0
680#define ZFLAG_CLEAR 0xffffffff
681
682#define SFLAG_SET 4
683#define SFLAG_CLEAR 0
684#define MFLAG_SET 2
685#define MFLAG_CLEAR 0
686
687/* Turn flag values into 1 or 0 */
688#define XFLAG_AS_1() ((FLAG_X>>8)&1)
689#define NFLAG_AS_1() ((FLAG_N>>7)&1)
690#define VFLAG_AS_1() ((FLAG_V>>7)&1)
691#define ZFLAG_AS_1() (!FLAG_Z)
692#define CFLAG_AS_1() ((FLAG_C>>8)&1)
693
694
695/* Conditions */
696#define COND_CS() (FLAG_C&0x100)
697#define COND_CC() (!COND_CS())
698#define COND_VS() (FLAG_V&0x80)
699#define COND_VC() (!COND_VS())
700#define COND_NE() FLAG_Z
701#define COND_EQ() (!COND_NE())
702#define COND_MI() (FLAG_N&0x80)
703#define COND_PL() (!COND_MI())
704#define COND_LT() ((FLAG_N^FLAG_V)&0x80)
705#define COND_GE() (!COND_LT())
706#define COND_HI() (COND_CC() && COND_NE())
707#define COND_LS() (COND_CS() || COND_EQ())
708#define COND_GT() (COND_GE() && COND_NE())
709#define COND_LE() (COND_LT() || COND_EQ())
710
711/* Reversed conditions */
712#define COND_NOT_CS() COND_CC()
713#define COND_NOT_CC() COND_CS()
714#define COND_NOT_VS() COND_VC()
715#define COND_NOT_VC() COND_VS()
716#define COND_NOT_NE() COND_EQ()
717#define COND_NOT_EQ() COND_NE()
718#define COND_NOT_MI() COND_PL()
719#define COND_NOT_PL() COND_MI()
720#define COND_NOT_LT() COND_GE()
721#define COND_NOT_GE() COND_LT()
722#define COND_NOT_HI() COND_LS()
723#define COND_NOT_LS() COND_HI()
724#define COND_NOT_GT() COND_LE()
725#define COND_NOT_LE() COND_GT()
726
727/* Not real conditions, but here for convenience */
728#define COND_XS() (FLAG_X&0x100)
729#define COND_XC() (!COND_XS)
730
731
732/* Get the condition code register */
733#define m68ki_get_ccr() ((COND_XS() >> 4) | \
734 (COND_MI() >> 4) | \
735 (COND_EQ() << 2) | \
736 (COND_VS() >> 6) | \
737 (COND_CS() >> 8))
738
739/* Get the status register */
740#define m68ki_get_sr() ( FLAG_T1 | \
741 FLAG_T0 | \
742 (FLAG_S << 11) | \
743 (FLAG_M << 11) | \
744 FLAG_INT_MASK | \
745 m68ki_get_ccr())
746
747
748
749/* ---------------------------- Cycle Counting ---------------------------- */
750
751#define ADD_CYCLES(A) m68ki_remaining_cycles += (A)
752#define USE_CYCLES(A) m68ki_remaining_cycles -= (A)
753#define SET_CYCLES(A) m68ki_remaining_cycles = A
754#define GET_CYCLES() m68ki_remaining_cycles
755#define USE_ALL_CYCLES() m68ki_remaining_cycles %= CYC_INSTRUCTION[REG_IR]
756
757
758
759/* ----------------------------- Read / Write ----------------------------- */
760
761/* Read from the current address space */
762#define m68ki_read_8(A) m68ki_read_8_fc (A, FLAG_S | m68ki_get_address_space())
763#define m68ki_read_16(A) m68ki_read_16_fc(A, FLAG_S | m68ki_get_address_space())
764#define m68ki_read_32(A) m68ki_read_32_fc(A, FLAG_S | m68ki_get_address_space())
765
766/* Write to the current data space */
767#define m68ki_write_8(A, V) m68ki_write_8_fc (A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
768#define m68ki_write_16(A, V) m68ki_write_16_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
769#define m68ki_write_32(A, V) m68ki_write_32_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
770
771#if M68K_SIMULATE_PD_WRITES
772#define m68ki_write_32_pd(A, V) m68ki_write_32_pd_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
773#else
774#define m68ki_write_32_pd(A, V) m68ki_write_32_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA, V)
775#endif
776
777/* map read immediate 8 to read immediate 16 */
778#define m68ki_read_imm_8() MASK_OUT_ABOVE_8(m68ki_read_imm_16())
779
780/* Map PC-relative reads */
781#define m68ki_read_pcrel_8(A) m68k_read_pcrelative_8(A)
782#define m68ki_read_pcrel_16(A) m68k_read_pcrelative_16(A)
783#define m68ki_read_pcrel_32(A) m68k_read_pcrelative_32(A)
784
785/* Read from the program space */
786#define m68ki_read_program_8(A) m68ki_read_8_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM)
787#define m68ki_read_program_16(A) m68ki_read_16_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM)
788#define m68ki_read_program_32(A) m68ki_read_32_fc(A, FLAG_S | FUNCTION_CODE_USER_PROGRAM)
789
790/* Read from the data space */
791#define m68ki_read_data_8(A) m68ki_read_8_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA)
792#define m68ki_read_data_16(A) m68ki_read_16_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA)
793#define m68ki_read_data_32(A) m68ki_read_32_fc(A, FLAG_S | FUNCTION_CODE_USER_DATA)
794
795
796
797/* ======================================================================== */
798/* =============================== PROTOTYPES ============================= */
799/* ======================================================================== */
800
801typedef struct
802{
803 uint cpu_type; /* CPU Type: 68000, 68010, 68EC020, or 68020 */
804 uint dar[16]; /* Data and Address Registers */
805 uint ppc; /* Previous program counter */
806 uint pc; /* Program Counter */
807 uint sp[7]; /* User, Interrupt, and Master Stack Pointers */
808 uint vbr; /* Vector Base Register (m68010+) */
809 uint sfc; /* Source Function Code Register (m68010+) */
810 uint dfc; /* Destination Function Code Register (m68010+) */
811 uint cacr; /* Cache Control Register (m68020, unemulated) */
812 uint caar; /* Cache Address Register (m68020, unemulated) */
813 uint ir; /* Instruction Register */
814 uint t1_flag; /* Trace 1 */
815 uint t0_flag; /* Trace 0 */
816 uint s_flag; /* Supervisor */
817 uint m_flag; /* Master/Interrupt state */
818 uint x_flag; /* Extend */
819 uint n_flag; /* Negative */
820 uint not_z_flag; /* Zero, inverted for speedups */
821 uint v_flag; /* Overflow */
822 uint c_flag; /* Carry */
823 uint int_mask; /* I0-I2 */
824 uint int_level; /* State of interrupt pins IPL0-IPL2 -- ASG: changed from ints_pending */
825 uint int_cycles; /* ASG: extra cycles from generated interrupts */
826 uint stopped; /* Stopped state */
827 uint pref_addr; /* Last prefetch address */
828 uint pref_data; /* Data in the prefetch queue */
829 uint address_mask; /* Available address pins */
830 uint sr_mask; /* Implemented status register bits */
831 uint instr_mode; /* Stores whether we are in instruction mode or group 0/1 exception mode */
832 uint run_mode; /* Stores whether we are processing a reset, bus error, address error, or something else */
833
834 /* Clocks required for instructions / exceptions */
835 uint cyc_bcc_notake_b;
836 uint cyc_bcc_notake_w;
837 uint cyc_dbcc_f_noexp;
838 uint cyc_dbcc_f_exp;
839 uint cyc_scc_r_true;
840 uint cyc_movem_w;
841 uint cyc_movem_l;
842 uint cyc_shift;
843 uint cyc_reset;
844 uint8* cyc_instruction;
845 uint8* cyc_exception;
846
847 /* Callbacks to host */
848 int (*int_ack_callback)(int int_line); /* Interrupt Acknowledge */
849 void (*bkpt_ack_callback)(unsigned int data); /* Breakpoint Acknowledge */
850 void (*reset_instr_callback)(void); /* Called when a RESET instruction is encountered */
851 void (*pc_changed_callback)(unsigned int new_pc); /* Called when the PC changes by a large amount */
852 void (*set_fc_callback)(unsigned int new_fc); /* Called when the CPU function code changes */
853 void (*instr_hook_callback)(void); /* Called every instruction cycle prior to execution */
854
855} m68ki_cpu_core;
856
857
858extern m68ki_cpu_core m68ki_cpu;
859extern sint m68ki_remaining_cycles;
860extern uint m68ki_tracing;
861extern uint8 m68ki_shift_8_table[];
862extern uint16 m68ki_shift_16_table[];
863extern uint m68ki_shift_32_table[];
864extern uint8 m68ki_exception_cycle_table[][256];
865extern uint m68ki_address_space;
866extern uint8 m68ki_ea_idx_cycle_table[];
867
868extern uint m68ki_aerr_address;
869extern uint m68ki_aerr_write_mode;
870extern uint m68ki_aerr_fc;
871
872/* Read data immediately after the program counter */
873INLINE uint m68ki_read_imm_16(void);
874INLINE uint m68ki_read_imm_32(void);
875
876/* Read data with specific function code */
877INLINE uint m68ki_read_8_fc (uint address, uint fc);
878INLINE uint m68ki_read_16_fc (uint address, uint fc);
879INLINE uint m68ki_read_32_fc (uint address, uint fc);
880
881/* Write data with specific function code */
882INLINE void m68ki_write_8_fc (uint address, uint fc, uint value);
883INLINE void m68ki_write_16_fc(uint address, uint fc, uint value);
884INLINE void m68ki_write_32_fc(uint address, uint fc, uint value);
885#if M68K_SIMULATE_PD_WRITES
886INLINE void m68ki_write_32_pd_fc(uint address, uint fc, uint value);
887#endif /* M68K_SIMULATE_PD_WRITES */
888
889/* Indexed and PC-relative ea fetching */
890INLINE uint m68ki_get_ea_pcdi(void);
891INLINE uint m68ki_get_ea_pcix(void);
892INLINE uint m68ki_get_ea_ix(uint An);
893
894/* Operand fetching */
895INLINE uint OPER_AY_AI_8(void);
896INLINE uint OPER_AY_AI_16(void);
897INLINE uint OPER_AY_AI_32(void);
898INLINE uint OPER_AY_PI_8(void);
899INLINE uint OPER_AY_PI_16(void);
900INLINE uint OPER_AY_PI_32(void);
901INLINE uint OPER_AY_PD_8(void);
902INLINE uint OPER_AY_PD_16(void);
903INLINE uint OPER_AY_PD_32(void);
904INLINE uint OPER_AY_DI_8(void);
905INLINE uint OPER_AY_DI_16(void);
906INLINE uint OPER_AY_DI_32(void);
907INLINE uint OPER_AY_IX_8(void);
908INLINE uint OPER_AY_IX_16(void);
909INLINE uint OPER_AY_IX_32(void);
910
911INLINE uint OPER_AX_AI_8(void);
912INLINE uint OPER_AX_AI_16(void);
913INLINE uint OPER_AX_AI_32(void);
914INLINE uint OPER_AX_PI_8(void);
915INLINE uint OPER_AX_PI_16(void);
916INLINE uint OPER_AX_PI_32(void);
917INLINE uint OPER_AX_PD_8(void);
918INLINE uint OPER_AX_PD_16(void);
919INLINE uint OPER_AX_PD_32(void);
920INLINE uint OPER_AX_DI_8(void);
921INLINE uint OPER_AX_DI_16(void);
922INLINE uint OPER_AX_DI_32(void);
923INLINE uint OPER_AX_IX_8(void);
924INLINE uint OPER_AX_IX_16(void);
925INLINE uint OPER_AX_IX_32(void);
926
927INLINE uint OPER_A7_PI_8(void);
928INLINE uint OPER_A7_PD_8(void);
929
930INLINE uint OPER_AW_8(void);
931INLINE uint OPER_AW_16(void);
932INLINE uint OPER_AW_32(void);
933INLINE uint OPER_AL_8(void);
934INLINE uint OPER_AL_16(void);
935INLINE uint OPER_AL_32(void);
936INLINE uint OPER_PCDI_8(void);
937INLINE uint OPER_PCDI_16(void);
938INLINE uint OPER_PCDI_32(void);
939INLINE uint OPER_PCIX_8(void);
940INLINE uint OPER_PCIX_16(void);
941INLINE uint OPER_PCIX_32(void);
942
943/* Stack operations */
944INLINE void m68ki_push_16(uint value);
945INLINE void m68ki_push_32(uint value);
946INLINE uint m68ki_pull_16(void);
947INLINE uint m68ki_pull_32(void);
948
949/* Program flow operations */
950INLINE void m68ki_jump(uint new_pc);
951INLINE void m68ki_jump_vector(uint vector);
952INLINE void m68ki_branch_8(uint offset);
953INLINE void m68ki_branch_16(uint offset);
954INLINE void m68ki_branch_32(uint offset);
955
956/* Status register operations. */
957INLINE void m68ki_set_s_flag(uint value); /* Only bit 2 of value should be set (i.e. 4 or 0) */
958INLINE void m68ki_set_sm_flag(uint value); /* only bits 1 and 2 of value should be set */
959INLINE void m68ki_set_ccr(uint value); /* set the condition code register */
960INLINE void m68ki_set_sr(uint value); /* set the status register */
961INLINE void m68ki_set_sr_noint(uint value); /* set the status register */
962
963/* Exception processing */
964INLINE uint m68ki_init_exception(void); /* Initial exception processing */
965
966INLINE void m68ki_stack_frame_3word(uint pc, uint sr); /* Stack various frame types */
967INLINE void m68ki_stack_frame_buserr(uint sr);
968
969INLINE void m68ki_stack_frame_0000(uint pc, uint sr, uint vector);
970INLINE void m68ki_stack_frame_0001(uint pc, uint sr, uint vector);
971INLINE void m68ki_stack_frame_0010(uint sr, uint vector);
972INLINE void m68ki_stack_frame_1000(uint pc, uint sr, uint vector);
973INLINE void m68ki_stack_frame_1010(uint sr, uint vector, uint pc);
974INLINE void m68ki_stack_frame_1011(uint sr, uint vector, uint pc);
975
976INLINE void m68ki_exception_trap(uint vector);
977INLINE void m68ki_exception_trapN(uint vector);
978INLINE void m68ki_exception_trace(void);
979INLINE void m68ki_exception_privilege_violation(void);
980INLINE void m68ki_exception_1010(void);
981INLINE void m68ki_exception_1111(void);
982INLINE void m68ki_exception_illegal(void);
983INLINE void m68ki_exception_format_error(void);
984INLINE void m68ki_exception_address_error(void);
985INLINE void m68ki_exception_interrupt(uint int_level);
986INLINE void m68ki_check_interrupts(void); /* ASG: check for interrupts */
987
988/* quick disassembly (used for logging) */
989char* m68ki_disassemble_quick(unsigned int pc, unsigned int cpu_type);
990
991
992/* ======================================================================== */
993/* =========================== UTILITY FUNCTIONS ========================== */
994/* ======================================================================== */
995
996
997/* ---------------------------- Read Immediate ---------------------------- */
998
999/* Handles all immediate reads, does address error check, function code setting,
1000 * and prefetching if they are enabled in m68kconf.h
1001 */
1002INLINE uint m68ki_read_imm_16(void)
1003{
1004 m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
1005 m68ki_check_address_error(REG_PC, MODE_READ, FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
1006#if M68K_EMULATE_PREFETCH
1007 if(MASK_OUT_BELOW_2(REG_PC) != CPU_PREF_ADDR)
1008 {
1009 CPU_PREF_ADDR = MASK_OUT_BELOW_2(REG_PC);
1010 CPU_PREF_DATA = m68k_read_immediate_32(ADDRESS_68K(CPU_PREF_ADDR));
1011 }
1012 REG_PC += 2;
1013 return MASK_OUT_ABOVE_16(CPU_PREF_DATA >> ((2-((REG_PC-2)&2))<<3));
1014#else
1015 REG_PC += 2;
1016 return m68k_read_immediate_16(ADDRESS_68K(REG_PC-2));
1017#endif /* M68K_EMULATE_PREFETCH */
1018}
1019INLINE uint m68ki_read_imm_32(void)
1020{
1021#if M68K_EMULATE_PREFETCH
1022 uint temp_val;
1023
1024 m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
1025 m68ki_check_address_error(REG_PC, MODE_READ, FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
1026 if(MASK_OUT_BELOW_2(REG_PC) != CPU_PREF_ADDR)
1027 {
1028 CPU_PREF_ADDR = MASK_OUT_BELOW_2(REG_PC);
1029 CPU_PREF_DATA = m68k_read_immediate_32(ADDRESS_68K(CPU_PREF_ADDR));
1030 }
1031 temp_val = CPU_PREF_DATA;
1032 REG_PC += 2;
1033 if(MASK_OUT_BELOW_2(REG_PC) != CPU_PREF_ADDR)
1034 {
1035 CPU_PREF_ADDR = MASK_OUT_BELOW_2(REG_PC);
1036 CPU_PREF_DATA = m68k_read_immediate_32(ADDRESS_68K(CPU_PREF_ADDR));
1037 temp_val = MASK_OUT_ABOVE_32((temp_val << 16) | (CPU_PREF_DATA >> 16));
1038 }
1039 REG_PC += 2;
1040
1041 return temp_val;
1042#else
1043 m68ki_set_fc(FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
1044 m68ki_check_address_error(REG_PC, MODE_READ, FLAG_S | FUNCTION_CODE_USER_PROGRAM); /* auto-disable (see m68kcpu.h) */
1045 REG_PC += 4;
1046 return m68k_read_immediate_32(ADDRESS_68K(REG_PC-4));
1047#endif /* M68K_EMULATE_PREFETCH */
1048}
1049
1050
1051
1052/* ------------------------- Top level read/write ------------------------- */
1053
1054/* Handles all memory accesses (except for immediate reads if they are
1055 * configured to use separate functions in m68kconf.h).
1056 * All memory accesses must go through these top level functions.
1057 * These functions will also check for address error and set the function
1058 * code if they are enabled in m68kconf.h.
1059 */
1060INLINE uint m68ki_read_8_fc(uint address, uint fc)
1061{
1062 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1063 return m68k_read_memory_8(ADDRESS_68K(address));
1064}
1065INLINE uint m68ki_read_16_fc(uint address, uint fc)
1066{
1067 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1068 m68ki_check_address_error(address, MODE_READ, fc); /* auto-disable (see m68kcpu.h) */
1069 return m68k_read_memory_16(ADDRESS_68K(address));
1070}
1071INLINE uint m68ki_read_32_fc(uint address, uint fc)
1072{
1073 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1074 m68ki_check_address_error(address, MODE_READ, fc); /* auto-disable (see m68kcpu.h) */
1075 return m68k_read_memory_32(ADDRESS_68K(address));
1076}
1077
1078INLINE void m68ki_write_8_fc(uint address, uint fc, uint value)
1079{
1080 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1081 m68k_write_memory_8(ADDRESS_68K(address), value);
1082}
1083INLINE void m68ki_write_16_fc(uint address, uint fc, uint value)
1084{
1085 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1086 m68ki_check_address_error(address, MODE_WRITE, fc); /* auto-disable (see m68kcpu.h) */
1087 m68k_write_memory_16(ADDRESS_68K(address), value);
1088}
1089INLINE void m68ki_write_32_fc(uint address, uint fc, uint value)
1090{
1091 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1092 m68ki_check_address_error(address, MODE_WRITE, fc); /* auto-disable (see m68kcpu.h) */
1093 m68k_write_memory_32(ADDRESS_68K(address), value);
1094}
1095
1096#if M68K_SIMULATE_PD_WRITES
1097INLINE void m68ki_write_32_pd_fc(uint address, uint fc, uint value)
1098{
1099 m68ki_set_fc(fc); /* auto-disable (see m68kcpu.h) */
1100 m68ki_check_address_error(address, MODE_WRITE, fc); /* auto-disable (see m68kcpu.h) */
1101 m68k_write_memory_32_pd(ADDRESS_68K(address), value);
1102}
1103#endif
1104
1105
1106/* --------------------- Effective Address Calculation -------------------- */
1107
1108/* The program counter relative addressing modes cause operands to be
1109 * retrieved from program space, not data space.
1110 */
1111INLINE uint m68ki_get_ea_pcdi(void)
1112{
1113 uint old_pc = REG_PC;
1114 m68ki_use_program_space(); /* auto-disable */
1115 return old_pc + MAKE_INT_16(m68ki_read_imm_16());
1116}
1117
1118
1119INLINE uint m68ki_get_ea_pcix(void)
1120{
1121 m68ki_use_program_space(); /* auto-disable */
1122 return m68ki_get_ea_ix(REG_PC);
1123}
1124
1125/* Indexed addressing modes are encoded as follows:
1126 *
1127 * Base instruction format:
1128 * F E D C B A 9 8 7 6 | 5 4 3 | 2 1 0
1129 * x x x x x x x x x x | 1 1 0 | BASE REGISTER (An)
1130 *
1131 * Base instruction format for destination EA in move instructions:
1132 * F E D C | B A 9 | 8 7 6 | 5 4 3 2 1 0
1133 * x x x x | BASE REG | 1 1 0 | X X X X X X (An)
1134 *
1135 * Brief extension format:
1136 * F | E D C | B | A 9 | 8 | 7 6 5 4 3 2 1 0
1137 * D/A | REGISTER | W/L | SCALE | 0 | DISPLACEMENT
1138 *
1139 * Full extension format:
1140 * F E D C B A 9 8 7 6 5 4 3 2 1 0
1141 * D/A | REGISTER | W/L | SCALE | 1 | BS | IS | BD SIZE | 0 | I/IS
1142 * BASE DISPLACEMENT (0, 16, 32 bit) (bd)
1143 * OUTER DISPLACEMENT (0, 16, 32 bit) (od)
1144 *
1145 * D/A: 0 = Dn, 1 = An (Xn)
1146 * W/L: 0 = W (sign extend), 1 = L (.SIZE)
1147 * SCALE: 00=1, 01=2, 10=4, 11=8 (*SCALE)
1148 * BS: 0=add base reg, 1=suppress base reg (An suppressed)
1149 * IS: 0=add index, 1=suppress index (Xn suppressed)
1150 * BD SIZE: 00=reserved, 01=NULL, 10=Word, 11=Long (size of bd)
1151 *
1152 * IS I/IS Operation
1153 * 0 000 No Memory Indirect
1154 * 0 001 indir prex with null outer
1155 * 0 010 indir prex with word outer
1156 * 0 011 indir prex with long outer
1157 * 0 100 reserved
1158 * 0 101 indir postx with null outer
1159 * 0 110 indir postx with word outer
1160 * 0 111 indir postx with long outer
1161 * 1 000 no memory indirect
1162 * 1 001 mem indir with null outer
1163 * 1 010 mem indir with word outer
1164 * 1 011 mem indir with long outer
1165 * 1 100-111 reserved
1166 */
1167INLINE uint m68ki_get_ea_ix(uint An)
1168{
1169 /* An = base register */
1170 uint extension = m68ki_read_imm_16();
1171 uint Xn = 0; /* Index register */
1172 uint bd = 0; /* Base Displacement */
1173 uint od = 0; /* Outer Displacement */
1174
1175 if(CPU_TYPE_IS_010_LESS(CPU_TYPE))
1176 {
1177 /* Calculate index */
1178 Xn = REG_DA[extension>>12]; /* Xn */
1179 if(!BIT_B(extension)) /* W/L */
1180 Xn = MAKE_INT_16(Xn);
1181
1182 /* Add base register and displacement and return */
1183 return An + Xn + MAKE_INT_8(extension);
1184 }
1185
1186 /* Brief extension format */
1187 if(!BIT_8(extension))
1188 {
1189 /* Calculate index */
1190 Xn = REG_DA[extension>>12]; /* Xn */
1191 if(!BIT_B(extension)) /* W/L */
1192 Xn = MAKE_INT_16(Xn);
1193 /* Add scale if proper CPU type */
1194 if(CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
1195 Xn <<= (extension>>9) & 3; /* SCALE */
1196
1197 /* Add base register and displacement and return */
1198 return An + Xn + MAKE_INT_8(extension);
1199 }
1200
1201 /* Full extension format */
1202
1203 USE_CYCLES(m68ki_ea_idx_cycle_table[extension&0x3f]);
1204
1205 /* Check if base register is present */
1206 if(BIT_7(extension)) /* BS */
1207 An = 0; /* An */
1208
1209 /* Check if index is present */
1210 if(!BIT_6(extension)) /* IS */
1211 {
1212 Xn = REG_DA[extension>>12]; /* Xn */
1213 if(!BIT_B(extension)) /* W/L */
1214 Xn = MAKE_INT_16(Xn);
1215 Xn <<= (extension>>9) & 3; /* SCALE */
1216 }
1217
1218 /* Check if base displacement is present */
1219 if(BIT_5(extension)) /* BD SIZE */
1220 bd = BIT_4(extension) ? m68ki_read_imm_32() : MAKE_INT_16(m68ki_read_imm_16());
1221
1222 /* If no indirect action, we are done */
1223 if(!(extension&7)) /* No Memory Indirect */
1224 return An + bd + Xn;
1225
1226 /* Check if outer displacement is present */
1227 if(BIT_1(extension)) /* I/IS: od */
1228 od = BIT_0(extension) ? m68ki_read_imm_32() : MAKE_INT_16(m68ki_read_imm_16());
1229
1230 /* Postindex */
1231 if(BIT_2(extension)) /* I/IS: 0 = preindex, 1 = postindex */
1232 return m68ki_read_32(An + bd) + Xn + od;
1233
1234 /* Preindex */
1235 return m68ki_read_32(An + bd + Xn) + od;
1236}
1237
1238
1239/* Fetch operands */
1240INLINE uint OPER_AY_AI_8(void) {uint ea = EA_AY_AI_8(); return m68ki_read_8(ea); }
1241INLINE uint OPER_AY_AI_16(void) {uint ea = EA_AY_AI_16(); return m68ki_read_16(ea);}
1242INLINE uint OPER_AY_AI_32(void) {uint ea = EA_AY_AI_32(); return m68ki_read_32(ea);}
1243INLINE uint OPER_AY_PI_8(void) {uint ea = EA_AY_PI_8(); return m68ki_read_8(ea); }
1244INLINE uint OPER_AY_PI_16(void) {uint ea = EA_AY_PI_16(); return m68ki_read_16(ea);}
1245INLINE uint OPER_AY_PI_32(void) {uint ea = EA_AY_PI_32(); return m68ki_read_32(ea);}
1246INLINE uint OPER_AY_PD_8(void) {uint ea = EA_AY_PD_8(); return m68ki_read_8(ea); }
1247INLINE uint OPER_AY_PD_16(void) {uint ea = EA_AY_PD_16(); return m68ki_read_16(ea);}
1248INLINE uint OPER_AY_PD_32(void) {uint ea = EA_AY_PD_32(); return m68ki_read_32(ea);}
1249INLINE uint OPER_AY_DI_8(void) {uint ea = EA_AY_DI_8(); return m68ki_read_8(ea); }
1250INLINE uint OPER_AY_DI_16(void) {uint ea = EA_AY_DI_16(); return m68ki_read_16(ea);}
1251INLINE uint OPER_AY_DI_32(void) {uint ea = EA_AY_DI_32(); return m68ki_read_32(ea);}
1252INLINE uint OPER_AY_IX_8(void) {uint ea = EA_AY_IX_8(); return m68ki_read_8(ea); }
1253INLINE uint OPER_AY_IX_16(void) {uint ea = EA_AY_IX_16(); return m68ki_read_16(ea);}
1254INLINE uint OPER_AY_IX_32(void) {uint ea = EA_AY_IX_32(); return m68ki_read_32(ea);}
1255
1256INLINE uint OPER_AX_AI_8(void) {uint ea = EA_AX_AI_8(); return m68ki_read_8(ea); }
1257INLINE uint OPER_AX_AI_16(void) {uint ea = EA_AX_AI_16(); return m68ki_read_16(ea);}
1258INLINE uint OPER_AX_AI_32(void) {uint ea = EA_AX_AI_32(); return m68ki_read_32(ea);}
1259INLINE uint OPER_AX_PI_8(void) {uint ea = EA_AX_PI_8(); return m68ki_read_8(ea); }
1260INLINE uint OPER_AX_PI_16(void) {uint ea = EA_AX_PI_16(); return m68ki_read_16(ea);}
1261INLINE uint OPER_AX_PI_32(void) {uint ea = EA_AX_PI_32(); return m68ki_read_32(ea);}
1262INLINE uint OPER_AX_PD_8(void) {uint ea = EA_AX_PD_8(); return m68ki_read_8(ea); }
1263INLINE uint OPER_AX_PD_16(void) {uint ea = EA_AX_PD_16(); return m68ki_read_16(ea);}
1264INLINE uint OPER_AX_PD_32(void) {uint ea = EA_AX_PD_32(); return m68ki_read_32(ea);}
1265INLINE uint OPER_AX_DI_8(void) {uint ea = EA_AX_DI_8(); return m68ki_read_8(ea); }
1266INLINE uint OPER_AX_DI_16(void) {uint ea = EA_AX_DI_16(); return m68ki_read_16(ea);}
1267INLINE uint OPER_AX_DI_32(void) {uint ea = EA_AX_DI_32(); return m68ki_read_32(ea);}
1268INLINE uint OPER_AX_IX_8(void) {uint ea = EA_AX_IX_8(); return m68ki_read_8(ea); }
1269INLINE uint OPER_AX_IX_16(void) {uint ea = EA_AX_IX_16(); return m68ki_read_16(ea);}
1270INLINE uint OPER_AX_IX_32(void) {uint ea = EA_AX_IX_32(); return m68ki_read_32(ea);}
1271
1272INLINE uint OPER_A7_PI_8(void) {uint ea = EA_A7_PI_8(); return m68ki_read_8(ea); }
1273INLINE uint OPER_A7_PD_8(void) {uint ea = EA_A7_PD_8(); return m68ki_read_8(ea); }
1274
1275INLINE uint OPER_AW_8(void) {uint ea = EA_AW_8(); return m68ki_read_8(ea); }
1276INLINE uint OPER_AW_16(void) {uint ea = EA_AW_16(); return m68ki_read_16(ea);}
1277INLINE uint OPER_AW_32(void) {uint ea = EA_AW_32(); return m68ki_read_32(ea);}
1278INLINE uint OPER_AL_8(void) {uint ea = EA_AL_8(); return m68ki_read_8(ea); }
1279INLINE uint OPER_AL_16(void) {uint ea = EA_AL_16(); return m68ki_read_16(ea);}
1280INLINE uint OPER_AL_32(void) {uint ea = EA_AL_32(); return m68ki_read_32(ea);}
1281INLINE uint OPER_PCDI_8(void) {uint ea = EA_PCDI_8(); return m68ki_read_pcrel_8(ea); }
1282INLINE uint OPER_PCDI_16(void) {uint ea = EA_PCDI_16(); return m68ki_read_pcrel_16(ea);}
1283INLINE uint OPER_PCDI_32(void) {uint ea = EA_PCDI_32(); return m68ki_read_pcrel_32(ea);}
1284INLINE uint OPER_PCIX_8(void) {uint ea = EA_PCIX_8(); return m68ki_read_pcrel_8(ea); }
1285INLINE uint OPER_PCIX_16(void) {uint ea = EA_PCIX_16(); return m68ki_read_pcrel_16(ea);}
1286INLINE uint OPER_PCIX_32(void) {uint ea = EA_PCIX_32(); return m68ki_read_pcrel_32(ea);}
1287
1288
1289
1290/* ---------------------------- Stack Functions --------------------------- */
1291
1292/* Push/pull data from the stack */
1293INLINE void m68ki_push_16(uint value)
1294{
1295 REG_SP = MASK_OUT_ABOVE_32(REG_SP - 2);
1296 m68ki_write_16(REG_SP, value);
1297}
1298
1299INLINE void m68ki_push_32(uint value)
1300{
1301 REG_SP = MASK_OUT_ABOVE_32(REG_SP - 4);
1302 m68ki_write_32(REG_SP, value);
1303}
1304
1305INLINE uint m68ki_pull_16(void)
1306{
1307 REG_SP = MASK_OUT_ABOVE_32(REG_SP + 2);
1308 return m68ki_read_16(REG_SP-2);
1309}
1310
1311INLINE uint m68ki_pull_32(void)
1312{
1313 REG_SP = MASK_OUT_ABOVE_32(REG_SP + 4);
1314 return m68ki_read_32(REG_SP-4);
1315}
1316
1317
1318/* Increment/decrement the stack as if doing a push/pull but
1319 * don't do any memory access.
1320 */
1321INLINE void m68ki_fake_push_16(void)
1322{
1323 REG_SP = MASK_OUT_ABOVE_32(REG_SP - 2);
1324}
1325
1326INLINE void m68ki_fake_push_32(void)
1327{
1328 REG_SP = MASK_OUT_ABOVE_32(REG_SP - 4);
1329}
1330
1331INLINE void m68ki_fake_pull_16(void)
1332{
1333 REG_SP = MASK_OUT_ABOVE_32(REG_SP + 2);
1334}
1335
1336INLINE void m68ki_fake_pull_32(void)
1337{
1338 REG_SP = MASK_OUT_ABOVE_32(REG_SP + 4);
1339}
1340
1341
1342/* ----------------------------- Program Flow ----------------------------- */
1343
1344/* Jump to a new program location or vector.
1345 * These functions will also call the pc_changed callback if it was enabled
1346 * in m68kconf.h.
1347 */
1348INLINE void m68ki_jump(uint new_pc)
1349{
1350 REG_PC = new_pc;
1351 m68ki_pc_changed(REG_PC);
1352}
1353
1354INLINE void m68ki_jump_vector(uint vector)
1355{
1356 REG_PC = (vector<<2) + REG_VBR;
1357 REG_PC = m68ki_read_data_32(REG_PC);
1358 m68ki_pc_changed(REG_PC);
1359}
1360
1361
1362/* Branch to a new memory location.
1363 * The 32-bit branch will call pc_changed if it was enabled in m68kconf.h.
1364 * So far I've found no problems with not calling pc_changed for 8 or 16
1365 * bit branches.
1366 */
1367INLINE void m68ki_branch_8(uint offset)
1368{
1369 REG_PC += MAKE_INT_8(offset);
1370}
1371
1372INLINE void m68ki_branch_16(uint offset)
1373{
1374 REG_PC += MAKE_INT_16(offset);
1375}
1376
1377INLINE void m68ki_branch_32(uint offset)
1378{
1379 REG_PC += offset;
1380 m68ki_pc_changed(REG_PC);
1381}
1382
1383
1384
1385/* ---------------------------- Status Register --------------------------- */
1386
1387/* Set the S flag and change the active stack pointer.
1388 * Note that value MUST be 4 or 0.
1389 */
1390INLINE void m68ki_set_s_flag(uint value)
1391{
1392 /* Backup the old stack pointer */
1393 REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)] = REG_SP;
1394 /* Set the S flag */
1395 FLAG_S = value;
1396 /* Set the new stack pointer */
1397 REG_SP = REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)];
1398}
1399
1400/* Set the S and M flags and change the active stack pointer.
1401 * Note that value MUST be 0, 2, 4, or 6 (bit2 = S, bit1 = M).
1402 */
1403INLINE void m68ki_set_sm_flag(uint value)
1404{
1405 /* Backup the old stack pointer */
1406 REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)] = REG_SP;
1407 /* Set the S and M flags */
1408 FLAG_S = value & SFLAG_SET;
1409 FLAG_M = value & MFLAG_SET;
1410 /* Set the new stack pointer */
1411 REG_SP = REG_SP_BASE[FLAG_S | ((FLAG_S>>1) & FLAG_M)];
1412}
1413
1414/* Set the S and M flags. Don't touch the stack pointer. */
1415INLINE void m68ki_set_sm_flag_nosp(uint value)
1416{
1417 /* Set the S and M flags */
1418 FLAG_S = value & SFLAG_SET;
1419 FLAG_M = value & MFLAG_SET;
1420}
1421
1422
1423/* Set the condition code register */
1424INLINE void m68ki_set_ccr(uint value)
1425{
1426 FLAG_X = BIT_4(value) << 4;
1427 FLAG_N = BIT_3(value) << 4;
1428 FLAG_Z = !BIT_2(value);
1429 FLAG_V = BIT_1(value) << 6;
1430 FLAG_C = BIT_0(value) << 8;
1431}
1432
1433/* Set the status register but don't check for interrupts */
1434INLINE void m68ki_set_sr_noint(uint value)
1435{
1436 /* Mask out the "unimplemented" bits */
1437 value &= CPU_SR_MASK;
1438
1439 /* Now set the status register */
1440 FLAG_T1 = BIT_F(value);
1441 FLAG_T0 = BIT_E(value);
1442 FLAG_INT_MASK = value & 0x0700;
1443 m68ki_set_ccr(value);
1444 m68ki_set_sm_flag((value >> 11) & 6);
1445}
1446
1447/* Set the status register but don't check for interrupts nor
1448 * change the stack pointer
1449 */
1450INLINE void m68ki_set_sr_noint_nosp(uint value)
1451{
1452 /* Mask out the "unimplemented" bits */
1453 value &= CPU_SR_MASK;
1454
1455 /* Now set the status register */
1456 FLAG_T1 = BIT_F(value);
1457 FLAG_T0 = BIT_E(value);
1458 FLAG_INT_MASK = value & 0x0700;
1459 m68ki_set_ccr(value);
1460 m68ki_set_sm_flag_nosp((value >> 11) & 6);
1461}
1462
1463/* Set the status register and check for interrupts */
1464INLINE void m68ki_set_sr(uint value)
1465{
1466 m68ki_set_sr_noint(value);
1467 m68ki_check_interrupts();
1468}
1469
1470
1471/* ------------------------- Exception Processing ------------------------- */
1472
1473/* Initiate exception processing */
1474INLINE uint m68ki_init_exception(void)
1475{
1476 /* Save the old status register */
1477 uint sr = m68ki_get_sr();
1478
1479 /* Turn off trace flag, clear pending traces */
1480 FLAG_T1 = FLAG_T0 = 0;
1481 m68ki_clear_trace();
1482 /* Enter supervisor mode */
1483 m68ki_set_s_flag(SFLAG_SET);
1484
1485 return sr;
1486}
1487
1488/* 3 word stack frame (68000 only) */
1489INLINE void m68ki_stack_frame_3word(uint pc, uint sr)
1490{
1491 m68ki_push_32(pc);
1492 m68ki_push_16(sr);
1493}
1494
1495/* Format 0 stack frame.
1496 * This is the standard stack frame for 68010+.
1497 */
1498INLINE void m68ki_stack_frame_0000(uint pc, uint sr, uint vector)
1499{
1500 /* Stack a 3-word frame if we are 68000 */
1501 if(CPU_TYPE == CPU_TYPE_000)
1502 {
1503 m68ki_stack_frame_3word(pc, sr);
1504 return;
1505 }
1506 m68ki_push_16(vector<<2);
1507 m68ki_push_32(pc);
1508 m68ki_push_16(sr);
1509}
1510
1511/* Format 1 stack frame (68020).
1512 * For 68020, this is the 4 word throwaway frame.
1513 */
1514INLINE void m68ki_stack_frame_0001(uint pc, uint sr, uint vector)
1515{
1516 m68ki_push_16(0x1000 | (vector<<2));
1517 m68ki_push_32(pc);
1518 m68ki_push_16(sr);
1519}
1520
1521/* Format 2 stack frame.
1522 * This is used only by 68020 for trap exceptions.
1523 */
1524INLINE void m68ki_stack_frame_0010(uint sr, uint vector)
1525{
1526 m68ki_push_32(REG_PPC);
1527 m68ki_push_16(0x2000 | (vector<<2));
1528 m68ki_push_32(REG_PC);
1529 m68ki_push_16(sr);
1530}
1531
1532
1533/* Bus error stack frame (68000 only).
1534 */
1535INLINE void m68ki_stack_frame_buserr(uint sr)
1536{
1537 m68ki_push_32(REG_PC);
1538 m68ki_push_16(sr);
1539 m68ki_push_16(REG_IR);
1540 m68ki_push_32(m68ki_aerr_address); /* access address */
1541 /* 0 0 0 0 0 0 0 0 0 0 0 R/W I/N FC
1542 * R/W 0 = write, 1 = read
1543 * I/N 0 = instruction, 1 = not
1544 * FC 3-bit function code
1545 */
1546 m68ki_push_16(m68ki_aerr_write_mode | CPU_INSTR_MODE | m68ki_aerr_fc);
1547}
1548
1549/* Format 8 stack frame (68010).
1550 * 68010 only. This is the 29 word bus/address error frame.
1551 */
1552void m68ki_stack_frame_1000(uint pc, uint sr, uint vector)
1553{
1554 /* VERSION
1555 * NUMBER
1556 * INTERNAL INFORMATION, 16 WORDS
1557 */
1558 m68ki_fake_push_32();
1559 m68ki_fake_push_32();
1560 m68ki_fake_push_32();
1561 m68ki_fake_push_32();
1562 m68ki_fake_push_32();
1563 m68ki_fake_push_32();
1564 m68ki_fake_push_32();
1565 m68ki_fake_push_32();
1566
1567 /* INSTRUCTION INPUT BUFFER */
1568 m68ki_push_16(0);
1569
1570 /* UNUSED, RESERVED (not written) */
1571 m68ki_fake_push_16();
1572
1573 /* DATA INPUT BUFFER */
1574 m68ki_push_16(0);
1575
1576 /* UNUSED, RESERVED (not written) */
1577 m68ki_fake_push_16();
1578
1579 /* DATA OUTPUT BUFFER */
1580 m68ki_push_16(0);
1581
1582 /* UNUSED, RESERVED (not written) */
1583 m68ki_fake_push_16();
1584
1585 /* FAULT ADDRESS */
1586 m68ki_push_32(0);
1587
1588 /* SPECIAL STATUS WORD */
1589 m68ki_push_16(0);
1590
1591 /* 1000, VECTOR OFFSET */
1592 m68ki_push_16(0x8000 | (vector<<2));
1593
1594 /* PROGRAM COUNTER */
1595 m68ki_push_32(pc);
1596
1597 /* STATUS REGISTER */
1598 m68ki_push_16(sr);
1599}
1600
1601/* Format A stack frame (short bus fault).
1602 * This is used only by 68020 for bus fault and address error
1603 * if the error happens at an instruction boundary.
1604 * PC stacked is address of next instruction.
1605 */
1606void m68ki_stack_frame_1010(uint sr, uint vector, uint pc)
1607{
1608 /* INTERNAL REGISTER */
1609 m68ki_push_16(0);
1610
1611 /* INTERNAL REGISTER */
1612 m68ki_push_16(0);
1613
1614 /* DATA OUTPUT BUFFER (2 words) */
1615 m68ki_push_32(0);
1616
1617 /* INTERNAL REGISTER */
1618 m68ki_push_16(0);
1619
1620 /* INTERNAL REGISTER */
1621 m68ki_push_16(0);
1622
1623 /* DATA CYCLE FAULT ADDRESS (2 words) */
1624 m68ki_push_32(0);
1625
1626 /* INSTRUCTION PIPE STAGE B */
1627 m68ki_push_16(0);
1628
1629 /* INSTRUCTION PIPE STAGE C */
1630 m68ki_push_16(0);
1631
1632 /* SPECIAL STATUS REGISTER */
1633 m68ki_push_16(0);
1634
1635 /* INTERNAL REGISTER */
1636 m68ki_push_16(0);
1637
1638 /* 1010, VECTOR OFFSET */
1639 m68ki_push_16(0xa000 | (vector<<2));
1640
1641 /* PROGRAM COUNTER */
1642 m68ki_push_32(pc);
1643
1644 /* STATUS REGISTER */
1645 m68ki_push_16(sr);
1646}
1647
1648/* Format B stack frame (long bus fault).
1649 * This is used only by 68020 for bus fault and address error
1650 * if the error happens during instruction execution.
1651 * PC stacked is address of instruction in progress.
1652 */
1653void m68ki_stack_frame_1011(uint sr, uint vector, uint pc)
1654{
1655 /* INTERNAL REGISTERS (18 words) */
1656 m68ki_push_32(0);
1657 m68ki_push_32(0);
1658 m68ki_push_32(0);
1659 m68ki_push_32(0);
1660 m68ki_push_32(0);
1661 m68ki_push_32(0);
1662 m68ki_push_32(0);
1663 m68ki_push_32(0);
1664 m68ki_push_32(0);
1665
1666 /* VERSION# (4 bits), INTERNAL INFORMATION */
1667 m68ki_push_16(0);
1668
1669 /* INTERNAL REGISTERS (3 words) */
1670 m68ki_push_32(0);
1671 m68ki_push_16(0);
1672
1673 /* DATA INTPUT BUFFER (2 words) */
1674 m68ki_push_32(0);
1675
1676 /* INTERNAL REGISTERS (2 words) */
1677 m68ki_push_32(0);
1678
1679 /* STAGE B ADDRESS (2 words) */
1680 m68ki_push_32(0);
1681
1682 /* INTERNAL REGISTER (4 words) */
1683 m68ki_push_32(0);
1684 m68ki_push_32(0);
1685
1686 /* DATA OUTPUT BUFFER (2 words) */
1687 m68ki_push_32(0);
1688
1689 /* INTERNAL REGISTER */
1690 m68ki_push_16(0);
1691
1692 /* INTERNAL REGISTER */
1693 m68ki_push_16(0);
1694
1695 /* DATA CYCLE FAULT ADDRESS (2 words) */
1696 m68ki_push_32(0);
1697
1698 /* INSTRUCTION PIPE STAGE B */
1699 m68ki_push_16(0);
1700
1701 /* INSTRUCTION PIPE STAGE C */
1702 m68ki_push_16(0);
1703
1704 /* SPECIAL STATUS REGISTER */
1705 m68ki_push_16(0);
1706
1707 /* INTERNAL REGISTER */
1708 m68ki_push_16(0);
1709
1710 /* 1011, VECTOR OFFSET */
1711 m68ki_push_16(0xb000 | (vector<<2));
1712
1713 /* PROGRAM COUNTER */
1714 m68ki_push_32(pc);
1715
1716 /* STATUS REGISTER */
1717 m68ki_push_16(sr);
1718}
1719
1720
1721/* Used for Group 2 exceptions.
1722 * These stack a type 2 frame on the 020.
1723 */
1724INLINE void m68ki_exception_trap(uint vector)
1725{
1726 uint sr = m68ki_init_exception();
1727
1728 if(CPU_TYPE_IS_010_LESS(CPU_TYPE))
1729 m68ki_stack_frame_0000(REG_PC, sr, vector);
1730 else
1731 m68ki_stack_frame_0010(sr, vector);
1732
1733 m68ki_jump_vector(vector);
1734
1735 /* Use up some clock cycles and undo the instruction's cycles */
1736 USE_CYCLES(CYC_EXCEPTION[vector] - CYC_INSTRUCTION[REG_IR]);
1737}
1738
1739/* Trap#n stacks a 0 frame but behaves like group2 otherwise */
1740INLINE void m68ki_exception_trapN(uint vector)
1741{
1742 uint sr = m68ki_init_exception();
1743 m68ki_stack_frame_0000(REG_PC, sr, vector);
1744 m68ki_jump_vector(vector);
1745
1746 /* Use up some clock cycles and undo the instruction's cycles */
1747 USE_CYCLES(CYC_EXCEPTION[vector] - CYC_INSTRUCTION[REG_IR]);
1748}
1749
1750/* Exception for trace mode */
1751INLINE void m68ki_exception_trace(void)
1752{
1753 uint sr = m68ki_init_exception();
1754
1755 if(CPU_TYPE_IS_010_LESS(CPU_TYPE))
1756 {
1757 #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
1758 if(CPU_TYPE_IS_000(CPU_TYPE))
1759 {
1760 CPU_INSTR_MODE = INSTRUCTION_NO;
1761 }
1762 #endif /* M68K_EMULATE_ADDRESS_ERROR */
1763 m68ki_stack_frame_0000(REG_PC, sr, EXCEPTION_TRACE);
1764 }
1765 else
1766 m68ki_stack_frame_0010(sr, EXCEPTION_TRACE);
1767
1768 m68ki_jump_vector(EXCEPTION_TRACE);
1769
1770 /* Trace nullifies a STOP instruction */
1771 CPU_STOPPED &= ~STOP_LEVEL_STOP;
1772
1773 /* Use up some clock cycles */
1774 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_TRACE]);
1775}
1776
1777/* Exception for privilege violation */
1778INLINE void m68ki_exception_privilege_violation(void)
1779{
1780 uint sr = m68ki_init_exception();
1781
1782 #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
1783 if(CPU_TYPE_IS_000(CPU_TYPE))
1784 {
1785 CPU_INSTR_MODE = INSTRUCTION_NO;
1786 }
1787 #endif /* M68K_EMULATE_ADDRESS_ERROR */
1788
1789 m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_PRIVILEGE_VIOLATION);
1790 m68ki_jump_vector(EXCEPTION_PRIVILEGE_VIOLATION);
1791
1792 /* Use up some clock cycles and undo the instruction's cycles */
1793 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_PRIVILEGE_VIOLATION] - CYC_INSTRUCTION[REG_IR]);
1794}
1795
1796/* Exception for A-Line instructions */
1797INLINE void m68ki_exception_1010(void)
1798{
1799 uint sr;
1800#if M68K_LOG_1010_1111 == OPT_ON
1801 M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: called 1010 instruction %04x (%s)\n",
1802 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR,
1803 m68ki_disassemble_quick(ADDRESS_68K(REG_PPC))));
1804#endif
1805
1806 sr = m68ki_init_exception();
1807 m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_1010);
1808 m68ki_jump_vector(EXCEPTION_1010);
1809
1810 /* Use up some clock cycles and undo the instruction's cycles */
1811 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_1010] - CYC_INSTRUCTION[REG_IR]);
1812}
1813
1814/* Exception for F-Line instructions */
1815INLINE void m68ki_exception_1111(void)
1816{
1817 uint sr;
1818
1819#if M68K_LOG_1010_1111 == OPT_ON
1820 M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: called 1111 instruction %04x (%s)\n",
1821 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR,
1822 m68ki_disassemble_quick(ADDRESS_68K(REG_PPC))));
1823#endif
1824
1825 sr = m68ki_init_exception();
1826 m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_1111);
1827 m68ki_jump_vector(EXCEPTION_1111);
1828
1829 /* Use up some clock cycles and undo the instruction's cycles */
1830 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_1111] - CYC_INSTRUCTION[REG_IR]);
1831}
1832
1833/* Exception for illegal instructions */
1834INLINE void m68ki_exception_illegal(void)
1835{
1836 uint sr;
1837
1838 M68K_DO_LOG((M68K_LOG_FILEHANDLE "%s at %08x: illegal instruction %04x (%s)\n",
1839 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PPC), REG_IR,
1840 m68ki_disassemble_quick(ADDRESS_68K(REG_PPC))));
1841
1842 sr = m68ki_init_exception();
1843
1844 #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
1845 if(CPU_TYPE_IS_000(CPU_TYPE))
1846 {
1847 CPU_INSTR_MODE = INSTRUCTION_NO;
1848 }
1849 #endif /* M68K_EMULATE_ADDRESS_ERROR */
1850
1851 m68ki_stack_frame_0000(REG_PPC, sr, EXCEPTION_ILLEGAL_INSTRUCTION);
1852 m68ki_jump_vector(EXCEPTION_ILLEGAL_INSTRUCTION);
1853
1854 /* Use up some clock cycles and undo the instruction's cycles */
1855 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_ILLEGAL_INSTRUCTION] - CYC_INSTRUCTION[REG_IR]);
1856}
1857
1858/* Exception for format errror in RTE */
1859INLINE void m68ki_exception_format_error(void)
1860{
1861 uint sr = m68ki_init_exception();
1862 m68ki_stack_frame_0000(REG_PC, sr, EXCEPTION_FORMAT_ERROR);
1863 m68ki_jump_vector(EXCEPTION_FORMAT_ERROR);
1864
1865 /* Use up some clock cycles and undo the instruction's cycles */
1866 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_FORMAT_ERROR] - CYC_INSTRUCTION[REG_IR]);
1867}
1868
1869/* Exception for address error */
1870INLINE void m68ki_exception_address_error(void)
1871{
1872 uint sr = m68ki_init_exception();
1873
1874 /* If we were processing a bus error, address error, or reset,
1875 * this is a catastrophic failure.
1876 * Halt the CPU
1877 */
1878 if(CPU_RUN_MODE == RUN_MODE_BERR_AERR_RESET)
1879 {
1880m68k_read_memory_8(0x00ffff01);
1881 CPU_STOPPED = STOP_LEVEL_HALT;
1882 return;
1883 }
1884 CPU_RUN_MODE = RUN_MODE_BERR_AERR_RESET;
1885
1886 /* Note: This is implemented for 68000 only! */
1887 m68ki_stack_frame_buserr(sr);
1888
1889 m68ki_jump_vector(EXCEPTION_ADDRESS_ERROR);
1890
1891 /* Use up some clock cycles. Note that we don't need to undo the
1892 instruction's cycles here as we've longjmp:ed directly from the
1893 instruction handler without passing the part of the excecute loop
1894 that deducts instruction cycles */
1895 USE_CYCLES(CYC_EXCEPTION[EXCEPTION_ADDRESS_ERROR]);
1896}
1897
1898
1899/* Service an interrupt request and start exception processing */
1900void m68ki_exception_interrupt(uint int_level)
1901{
1902 uint vector;
1903 uint sr;
1904 uint new_pc;
1905
1906 #if M68K_EMULATE_ADDRESS_ERROR == OPT_ON
1907 if(CPU_TYPE_IS_000(CPU_TYPE))
1908 {
1909 CPU_INSTR_MODE = INSTRUCTION_NO;
1910 }
1911 #endif /* M68K_EMULATE_ADDRESS_ERROR */
1912
1913 /* Turn off the stopped state */
1914 CPU_STOPPED &= ~STOP_LEVEL_STOP;
1915
1916 /* If we are halted, don't do anything */
1917 if(CPU_STOPPED)
1918 return;
1919
1920 /* Acknowledge the interrupt */
1921 vector = m68ki_int_ack(int_level);
1922
1923 /* Get the interrupt vector */
1924 if(vector == M68K_INT_ACK_AUTOVECTOR)
1925 /* Use the autovectors. This is the most commonly used implementation */
1926 vector = EXCEPTION_INTERRUPT_AUTOVECTOR+int_level;
1927 else if(vector == M68K_INT_ACK_SPURIOUS)
1928 /* Called if no devices respond to the interrupt acknowledge */
1929 vector = EXCEPTION_SPURIOUS_INTERRUPT;
1930 else if(vector > 255)
1931 {
1932 M68K_DO_LOG_EMU((M68K_LOG_FILEHANDLE "%s at %08x: Interrupt acknowledge returned invalid vector $%x\n",
1933 m68ki_cpu_names[CPU_TYPE], ADDRESS_68K(REG_PC), vector));
1934 return;
1935 }
1936
1937 /* Start exception processing */
1938 sr = m68ki_init_exception();
1939
1940 /* Set the interrupt mask to the level of the one being serviced */
1941 FLAG_INT_MASK = int_level<<8;
1942
1943 /* Get the new PC */
1944 new_pc = m68ki_read_data_32((vector<<2) + REG_VBR);
1945
1946 /* If vector is uninitialized, call the uninitialized interrupt vector */
1947 if(new_pc == 0)
1948 new_pc = m68ki_read_data_32((EXCEPTION_UNINITIALIZED_INTERRUPT<<2) + REG_VBR);
1949
1950 /* Generate a stack frame */
1951 m68ki_stack_frame_0000(REG_PC, sr, vector);
1952 if(FLAG_M && CPU_TYPE_IS_EC020_PLUS(CPU_TYPE))
1953 {
1954 /* Create throwaway frame */
1955 m68ki_set_sm_flag(FLAG_S); /* clear M */
1956 sr |= 0x2000; /* Same as SR in master stack frame except S is forced high */
1957 m68ki_stack_frame_0001(REG_PC, sr, vector);
1958 }
1959
1960 m68ki_jump(new_pc);
1961
1962 /* Defer cycle counting until later */
1963 CPU_INT_CYCLES += CYC_EXCEPTION[vector];
1964
1965#if !M68K_EMULATE_INT_ACK
1966 /* Automatically clear IRQ if we are not using an acknowledge scheme */
1967 CPU_INT_LEVEL = 0;
1968#endif /* M68K_EMULATE_INT_ACK */
1969}
1970
1971
1972/* ASG: Check for interrupts */
1973INLINE void m68ki_check_interrupts(void)
1974{
1975 if(CPU_INT_LEVEL > FLAG_INT_MASK)
1976 m68ki_exception_interrupt(CPU_INT_LEVEL>>8);
1977}
1978
1979
1980
1981/* ======================================================================== */
1982/* ============================== END OF FILE ============================= */
1983/* ======================================================================== */
1984
1985#endif /* M68KCPU__HEADER */
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