Changeset 40b2112 in buchla-emu

Timestamp:

08/05/2017 11:24:15 AM (7 years ago)

Author:

Thomas Lopatic <thomas@…>

Branches:

master

Children:

7b50125

Parents:

9e0cd12

Message:

CR2 is SR when reading.

File:

• emu/tim.c (modified) (3 diffs)

emu/tim.c

@@ -25 +25 @@
 
 #define REG_CRX 0
-#define REG_CR2 1
+#define REG_CR2_SR 1
 #define REG_T1H 2
 #define REG_T1L 3
@@ -95 +95 @@
 
         switch (off) {
-        case REG_CR2:
+        case REG_CR2_SR:
                 rv |= (uint32_t)timers[0].irq << 0;
                 rv |= (uint32_t)timers[1].irq << 1;
@@ -159 +159 @@
                 break;
 
-        case REG_CR2:
+        case REG_CR2_SR:
                 wr_cr1 = (val & 0x01) != 0;
                 timers[1].irq_e = (val & 0x40) != 0;