Changeset 40b2112 in buchla-emu


Ignore:
Timestamp:
08/05/2017 11:24:15 AM (5 years ago)
Author:
Thomas Lopatic <thomas@…>
Branches:
master
Children:
7b50125
Parents:
9e0cd12
Message:

CR2 is SR when reading.

File:
1 edited

Legend:

Unmodified
Added
Removed
  • emu/tim.c

    r9e0cd12 r40b2112  
    2525
    2626#define REG_CRX 0
    27 #define REG_CR2 1
     27#define REG_CR2_SR 1
    2828#define REG_T1H 2
    2929#define REG_T1L 3
     
    9595
    9696        switch (off) {
    97         case REG_CR2:
     97        case REG_CR2_SR:
    9898                rv |= (uint32_t)timers[0].irq << 0;
    9999                rv |= (uint32_t)timers[1].irq << 1;
     
    159159                break;
    160160
    161         case REG_CR2:
     161        case REG_CR2_SR:
    162162                wr_cr1 = (val & 0x01) != 0;
    163163                timers[1].irq_e = (val & 0x40) != 0;
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