Changeset 56746cf in buchla-emu
- Timestamp:
- 01/05/2018 01:39:08 PM (7 years ago)
- Branches:
- master
- Children:
- 379ffd9
- Parents:
- 3231e25 (diff), 49efb91 (diff)
Note: this is a merge changeset, the changes displayed below correspond to the merge itself.
Use the(diff)
links above to see all the changes relative to each parent. - Files:
-
- 4 edited
Legend:
- Unmodified
- Added
- Removed
-
emu/fdd.c
r3231e25 r56746cf 44 44 #define COM_WR_SEC 0xa2 45 45 #define COM_INT 0xd0 46 #define COM_WR_TRA 0xf0 46 #define COM_WR_TRA_WP 0xf0 47 #define COM_WR_TRA 0xf2 47 48 48 49 #define COM_LAT_CYC 5 … … 98 99 return "COM_WR_SEC"; 99 100 101 case COM_WR_TRA_WP: 102 return "COM_WR_TRA_WP"; 103 100 104 case COM_WR_TRA: 101 105 return "COM_WR_TRA"; … … 140 144 { 141 145 ver("fdd init"); 142 inf(" loading disk image file %s", disk);146 inf("reading disk image file %s", disk); 143 147 144 148 SDL_RWops *ops = SDL_RWFromFile(disk, "rb"); 145 149 146 150 if (ops == NULL) { 147 fail("error while opening disk image file %s ", disk);151 fail("error while opening disk image file %s for reading", disk); 148 152 } 149 153 … … 166 170 { 167 171 ver("fdd quit"); 172 inf("writing disk image file %s", disk); 173 174 SDL_RWops *ops = SDL_RWFromFile(disk, "wb"); 175 176 if (ops == NULL) { 177 fail("error while opening disk image file %s for writing", disk); 178 } 179 180 size_t stored = 0; 181 182 while (stored < SZ_DISK) { 183 size_t n_wr = SDL_RWwrite(ops, image + stored, 1, SZ_DISK - stored); 184 185 if (n_wr == 0) { 186 fail("error while writing disk image file %s", disk); 187 } 188 189 stored += n_wr; 190 } 191 192 SDL_RWclose(ops); 168 193 } 169 194 … … 338 363 339 364 case COM_WR_TRA: 365 case COM_WR_TRA_WP: 340 366 state.tra_0 = false; 341 367 fail("format not yet supported"); -
emu/lcd.c
r3231e25 r56746cf 24 24 int32_t lcd_verbose = 0; 25 25 26 #define WIN_W (1615 * 2 / 3)27 #define WIN_H (304 * 2 / 3)26 #define WIN_W (1615 / 2) 27 #define WIN_H (304 / 2) 28 28 29 29 #define GFX_BGR 0x00000000 -
emu/ser.c
r3231e25 r56746cf 24 24 int32_t ser_verbose = 0; 25 25 26 #define WIN_W (1520 * 2 / 3)27 #define WIN_H (950 * 2 / 3)26 #define WIN_W (1520 / 2) 27 #define WIN_H (950 / 2) 28 28 29 29 #define BEL_CYC 10000 30 30 #define MOU_CYC 10000 31 32 #if defined EMU_WIN 33 #define MOU_DIV 64 34 #elif defined EMU_OS_X 35 #define MOU_DIV 1 36 #else 37 #define MOU_DIV 4 38 #endif 31 39 32 40 #define CON_W 80 … … 335 343 mou_dx, mou_dy, mou_l ? 'l' : '-', mou_r ? 'r' : '-'); 336 344 337 int32_t dx = mou_dx ;338 int32_t dy = mou_dy ;345 int32_t dx = mou_dx / MOU_DIV; 346 int32_t dy = mou_dy / MOU_DIV; 339 347 340 348 if (dx < -128) { -
readme.txt
r3231e25 r56746cf 288 288 ----------------- 289 289 290 Here's what we emulate:290 Here's what we currently emulate: 291 291 292 292 * Motorola 68000 CPU. This is actually the Musashi CPU emulator by … … 295 295 https://github.com/kstenerud/Musashi 296 296 297 * Intel 82716: Video chip. 298 299 * Epson SED1335: LCD controller. 300 301 * Western Digital WD1772: Floppy disk controller. 302 303 * Rockwell R65C52: Serial console and MIDI ports. 304 297 305 * Motorola MC6840: Timers. 298 306 299 * Rockwell R65C52: Serial console and MIDI ports. 300 301 * Epson SED1335: LCD controller. 302 303 * Intel 82716: Video chip. 307 * Unknown item #1: A program running on a microcontroller. It 308 converts the analog signals from the Buchla's controller pads to 309 digital values. 310 311 Neither the program, nor the microcontroller are known, but the 312 protocol (known from the firmware source code) is pretty simple 313 and self-explanatory. 314 315 The next development milestone will hopefully emulate the following 316 additional components: 304 317 305 318 * National Semiconductor LMC835: Equalizer. … … 309 322 to the above equalizer chip. 310 323 311 * Western Digital WD1772: Floppy disk controller. 312 313 * A few LEDs. 314 315 * Item X: A program running on a microcontroller. It converts the 316 analog signals from the Buchla's controller pads to digital 317 values. 318 319 Neither the program, nor the microcontroller are known, but the 320 protocol (known from the firmware source code) is pretty simple 321 and self-explanatory. 322 323 * Item Y: The actual sound generator, referred to by the firmware 324 source code as "the FPU." This could actually be two chips: 325 326 1. One chip, maybe a DSP, for generating the 15 different 324 * A few indicator LEDs. 325 326 * Unknown item #2: The actual sound generator, referred to by the 327 firmware source code as "the FPU." This is the biggest unknown so 328 far. Judging from the firmware source code it consist of two 329 parts: 330 331 1. The function generator that generates the 15 different 327 332 parameter envelopes for each of the 12 voices: 328 333 … … 339 344 - 1x Output signal stereo location. 340 345 341 - 1x "Dynamics ." (TBD - currently not emulated.)342 343 Over time, the chip interpolates between the points of the344 envelopes drawn in the MIDAS VII instrument editor.345 346 2. A second chip for the actual sound generation. This is likely 347 a DSP.346 - 1x "Dynamics" - whatever that is. 347 348 The firmware feeds the the points of the envelopes drawn in 349 the MIDAS VII instrument editor to the function generator, 350 which then interpolates between them. 351 352 2. The digital oscillator. 348 353 349 354 XXX - Details to be filled in. … … 353 358 of the envelopes probably control analog circuits. 354 359 355 Obviously, the emulator does everything digitally. 356 357 This "two chip" hypothesis would be in line with the "four 360 This "two FPU parts" hypothesis would be in line with the "four 358 361 computers" marketing claim from the Buchla 700 marketing copy. The 359 362 four "computers" would be the Motorola 68000, the microcontroller 360 that does the A/D conversion of the pad inputs, plus the two CPUs363 that does the A/D conversion of the pad inputs, plus the two parts 361 364 that constitute "the FPU." 365 366 The firmware source code archive indicates that the FPU is based 367 on micro-programmable hardware. We recently ran this by Lynx, the 368 developer of the firmware, who generously agreed to meet up with 369 us in Oakland, CA. While he did not work on the FPU and thus was 370 not familiar with its implementation details, he was able to 371 confirm that the FPU is based on AMD's Am2900 family. 362 372 363 373 If you have access to an actual Buchla 700, please do contact us. It … … 365 375 366 376 If your Buchla is non-functional, this is also fine. We might be able 367 to gain some insights from reading out the FPU microcode PROMs. 377 to gain some insights from reading out the FPU microcode PROMs or from 378 figuring out how the FPU chips are wired together.
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