Index: emu/fdd.c
===================================================================
--- emu/fdd.c	(revision 3231e25117ff32d6ccf313aa574bc194d19ec81c)
+++ emu/fdd.c	(revision 56746cf7ede4e619d103f5532f893d14cf9ccf8d)
@@ -44,5 +44,6 @@
 #define COM_WR_SEC 0xa2
 #define COM_INT 0xd0
-#define COM_WR_TRA 0xf0
+#define COM_WR_TRA_WP 0xf0
+#define COM_WR_TRA 0xf2
 
 #define COM_LAT_CYC 5
@@ -98,4 +99,7 @@
 		return "COM_WR_SEC";
 
+	case COM_WR_TRA_WP:
+		return "COM_WR_TRA_WP";
+
 	case COM_WR_TRA:
 		return "COM_WR_TRA";
@@ -140,10 +144,10 @@
 {
 	ver("fdd init");
-	inf("loading disk image file %s", disk);
+	inf("reading disk image file %s", disk);
 
 	SDL_RWops *ops = SDL_RWFromFile(disk, "rb");
 
 	if (ops == NULL) {
-		fail("error while opening disk image file %s", disk);
+		fail("error while opening disk image file %s for reading", disk);
 	}
 
@@ -166,4 +170,25 @@
 {
 	ver("fdd quit");
+	inf("writing disk image file %s", disk);
+
+	SDL_RWops *ops = SDL_RWFromFile(disk, "wb");
+
+	if (ops == NULL) {
+		fail("error while opening disk image file %s for writing", disk);
+	}
+
+	size_t stored = 0;
+
+	while (stored < SZ_DISK) {
+		size_t n_wr = SDL_RWwrite(ops, image + stored, 1, SZ_DISK - stored);
+
+		if (n_wr == 0) {
+			fail("error while writing disk image file %s", disk);
+		}
+
+		stored += n_wr;
+	}
+
+	SDL_RWclose(ops);
 }
 
@@ -338,4 +363,5 @@
 
 		case COM_WR_TRA:
+		case COM_WR_TRA_WP:
 			state.tra_0 = false;
 			fail("format not yet supported");
Index: emu/lcd.c
===================================================================
--- emu/lcd.c	(revision 3231e25117ff32d6ccf313aa574bc194d19ec81c)
+++ emu/lcd.c	(revision 56746cf7ede4e619d103f5532f893d14cf9ccf8d)
@@ -24,6 +24,6 @@
 int32_t lcd_verbose = 0;
 
-#define WIN_W (1615 * 2 / 3)
-#define WIN_H (304 * 2 / 3)
+#define WIN_W (1615 / 2)
+#define WIN_H (304 / 2)
 
 #define GFX_BGR 0x00000000
Index: emu/ser.c
===================================================================
--- emu/ser.c	(revision 3231e25117ff32d6ccf313aa574bc194d19ec81c)
+++ emu/ser.c	(revision 56746cf7ede4e619d103f5532f893d14cf9ccf8d)
@@ -24,9 +24,17 @@
 int32_t ser_verbose = 0;
 
-#define WIN_W (1520 * 2 / 3)
-#define WIN_H (950 * 2 / 3)
+#define WIN_W (1520 / 2)
+#define WIN_H (950 / 2)
 
 #define BEL_CYC 10000
 #define MOU_CYC 10000
+
+#if defined EMU_WIN
+#define MOU_DIV 64
+#elif defined EMU_OS_X
+#define MOU_DIV 1
+#else
+#define MOU_DIV 4
+#endif
 
 #define CON_W 80
@@ -335,6 +343,6 @@
 		mou_dx, mou_dy, mou_l ? 'l' : '-', mou_r ? 'r' : '-');
 
-	int32_t dx = mou_dx;
-	int32_t dy = mou_dy;
+	int32_t dx = mou_dx / MOU_DIV;
+	int32_t dy = mou_dy / MOU_DIV;
 
 	if (dx < -128) {
Index: readme.txt
===================================================================
--- readme.txt	(revision 3231e25117ff32d6ccf313aa574bc194d19ec81c)
+++ readme.txt	(revision 56746cf7ede4e619d103f5532f893d14cf9ccf8d)
@@ -288,5 +288,5 @@
 -----------------
 
-Here's what we emulate:
+Here's what we currently emulate:
 
   * Motorola 68000 CPU. This is actually the Musashi CPU emulator by
@@ -295,11 +295,24 @@
       https://github.com/kstenerud/Musashi
 
+  * Intel 82716: Video chip.
+
+  * Epson SED1335: LCD controller.
+
+  * Western Digital WD1772: Floppy disk controller.
+
+  * Rockwell R65C52: Serial console and MIDI ports.
+
   * Motorola MC6840: Timers.
 
-  * Rockwell R65C52: Serial console and MIDI ports.
-
-  * Epson SED1335: LCD controller.
-
-  * Intel 82716: Video chip.
+  * Unknown item #1: A program running on a microcontroller. It
+    converts the analog signals from the Buchla's controller pads to
+    digital values.
+
+    Neither the program, nor the microcontroller are known, but the
+    protocol (known from the firmware source code) is pretty simple
+    and self-explanatory.
+
+The next development milestone will hopefully emulate the following
+additional components:
 
   * National Semiconductor LMC835: Equalizer.
@@ -309,20 +322,12 @@
     to the above equalizer chip.
 
-  * Western Digital WD1772: Floppy disk controller.
-
-  * A few LEDs.
-
-  * Item X: A program running on a microcontroller. It converts the
-    analog signals from the Buchla's controller pads to digital
-    values.
-
-    Neither the program, nor the microcontroller are known, but the
-    protocol (known from the firmware source code) is pretty simple
-    and self-explanatory.
-
-  * Item Y: The actual sound generator, referred to by the firmware
-    source code as "the FPU." This could actually be two chips:
-
-      1. One chip, maybe a DSP, for generating the 15 different
+  * A few indicator LEDs.
+
+  * Unknown item #2: The actual sound generator, referred to by the
+    firmware source code as "the FPU." This is the biggest unknown so
+    far. Judging from the firmware source code it consist of two
+    parts:
+
+      1. The function generator that generates the 15 different
          parameter envelopes for each of the 12 voices:
 
@@ -339,11 +344,11 @@
            - 1x Output signal stereo location.
 
-           - 1x "Dynamics." (TBD - currently not emulated.)
-
-         Over time, the chip interpolates between the points of the
-         envelopes drawn in the MIDAS VII instrument editor.
-
-      2. A second chip for the actual sound generation. This is likely
-         a DSP.
+           - 1x "Dynamics" - whatever that is.
+
+         The firmware feeds the the points of the envelopes drawn in
+         the MIDAS VII instrument editor to the function generator,
+         which then interpolates between them.
+
+      2. The digital oscillator.
 
          XXX - Details to be filled in.
@@ -353,11 +358,16 @@
          of the envelopes probably control analog circuits.
 
-         Obviously, the emulator does everything digitally.
-
-    This "two chip" hypothesis would be in line with the "four
+    This "two FPU parts" hypothesis would be in line with the "four
     computers" marketing claim from the Buchla 700 marketing copy. The
     four "computers" would be the Motorola 68000, the microcontroller
-    that does the A/D conversion of the pad inputs, plus the two CPUs
+    that does the A/D conversion of the pad inputs, plus the two parts
     that constitute "the FPU."
+
+    The firmware source code archive indicates that the FPU is based
+    on micro-programmable hardware. We recently ran this by Lynx, the
+    developer of the firmware, who generously agreed to meet up with
+    us in Oakland, CA. While he did not work on the FPU and thus was
+    not familiar with its implementation details, he was able to
+    confirm that the FPU is based on AMD's Am2900 family.
 
 If you have access to an actual Buchla 700, please do contact us. It
@@ -365,3 +375,4 @@
 
 If your Buchla is non-functional, this is also fine. We might be able
-to gain some insights from reading out the FPU microcode PROMs.
+to gain some insights from reading out the FPU microcode PROMs or from
+figuring out how the FPU chips are wired together.
