Index: rom/bios.s
===================================================================
--- rom/bios.s	(revision 84c01255fcf53ea395d67ce5468972fe0ba4aca6)
+++ rom/bios.s	(revision 8325447d07a5d175402b922c7c6881b9bbf0a20d)
@@ -44,23 +44,23 @@
 
 		.xref	start_		| Where ROMP starts
-		.xref	_errno		| Start of ROMP bss space
+		.xref	errno		| Start of ROMP bss space
 
 		.xdef	basepage	| Pseudo base page for romp
-		.xdef	_rsflag		| Register save area overflow flag
+		.xdef	rsflag		| Register save area overflow flag
 
 		.ifne	BUCHLA
 
-		.xdef	_hdvini		| Disk init
-
-		.endc
-
-		.xdef	_wzcrsh		| ROMP crash flag
-		.xdef	_crshvc		| Crash vector
-		.xdef	_crshsr		| Crash SR
-		.xdef	_crshpc		| Crash PC
-		.xdef	_crshsp		| Crash SP
-		.xdef	_crshus		| Crash USP
-		.xdef	_crshrg		| Crash SP registers
-		.xdef	_crshst		| Crash top of stack
+		.xdef	hdvini		| Disk init
+
+		.endc
+
+		.xdef	wzcrsh		| ROMP crash flag
+		.xdef	crshvc		| Crash vector
+		.xdef	crshsr		| Crash SR
+		.xdef	crshpc		| Crash PC
+		.xdef	crshsp		| Crash SP
+		.xdef	crshus		| Crash USP
+		.xdef	crshrg		| Crash SP registers
+		.xdef	crshst		| Crash top of stack
 
 		.page
@@ -68,6 +68,6 @@
 		.ifne	BUCHLA
 
-		.xdef	_hz_1k
-		.xdef	_hz_200
+		.xdef	hz_1k
+		.xdef	hz_200
 		.xdef	frclock
 		.xdef	t1count
@@ -516,5 +516,5 @@
 		move.l	#timeint,0x0070		| Set timer trap vector
 
-		move.l	#_hdvini,hdv_init	| Set disk init vector
+		move.l	#hdvini,hdv_init	| Set disk init vector
 		move.l	#getbpb,hdv_bpb		| Set get BPB vector
 		move.l	#rwabs,hdv_rw		| Set disk I/O vector
@@ -644,5 +644,5 @@
 		move.w	#INITIPL,sr		| Enable interrupts
 		lea	basepage,a1		| Pass start_ a pseudo base page
-		move.l	#_errno,p_bbase(a1)	| ...
+		move.l	#errno,p_bbase(a1)	| ...
 		clr.l	p_blen(a1)		| ...
 		move.l	a1,-(a7)		| ...
@@ -679,19 +679,19 @@
 | badtrap -- Bad trap handler
 | -------    ----------------
-badtrap:	move.w	(a7)+,_crshsr		| Get crash SR
-		move.l	(a7)+,_crshpc		| Get crash PC
-		move.l	a7,_crshsp		| Get crash SP
+badtrap:	move.w	(a7)+,crshsr		| Get crash SR
+		move.l	(a7)+,crshpc		| Get crash PC
+		move.l	a7,crshsp		| Get crash SP
 		bsr	badtr1			| Get TRAP PC with vector number
 		nop
 
-badtr1:		move.l	(a7)+,_crshvc		| Save for analysis of vector #
-		movem.l	d0-d7/a0-a7,_crshrg	| Save crash registers
+badtr1:		move.l	(a7)+,crshvc		| Save for analysis of vector #
+		movem.l	d0-d7/a0-a7,crshrg	| Save crash registers
 		move.l	usp,a0			| Preserve crash USP
-		move.l	a0,_crshus		| ...
+		move.l	a0,crshus		| ...
 		move.l	a7,d0			| Get SP
 		andi.l	#0xFFFFFFFE,d0		| ... make sure it's even
 		movea.l	d0,a1			| ...
 		move.w	#15,d0			| Save top 16 words
-		lea	_crshst,a0		| ... of crash stack in _crshst
+		lea	crshst,a0		| ... of crash stack in crshst
 
 badtr2:		move.w	(a1)+,(a0)+		| Save a stack value
@@ -699,7 +699,7 @@
 
 		clr.l	d0			| Get TRAP number
-		move.b	_crshvc,d0		| ... as LS byte of d0
-		move.l	_crshpc,a0		| Save crash PC in a0
-		move.w	#0xFFFF,_wzcrsh		| Indicate we crashed
+		move.b	crshvc,d0		| ... as LS byte of d0
+		move.l	crshpc,a0		| Save crash PC in a0
+		move.w	#0xFFFF,wzcrsh		| Indicate we crashed
 		move.l	#rsarea,savptr		| Restore system save pointer
 		move.l	#SSTACK,a7		| Reset the stack pointer
@@ -725,5 +725,5 @@
 		move.w	d1,t3count		| ... and save it
 
-		addq.l	#1,_hz_1k		| Update 1ms clock  (1 KHz)
+		addq.l	#1,hz_1k		| Update 1ms clock  (1 KHz)
 
 		move.w	tdiv1,d1		| Update divider
@@ -731,8 +731,8 @@
 		move.w	d1,tdiv1		| ...
 
-		cmpi.w	#5,d1			| Do we need to update _hz_200 ?
+		cmpi.w	#5,d1			| Do we need to update hz_200 ?
 		blt	tmi02			| Jump if not
 
-		addq.l	#1,_hz_200		| Update 5ms clock   (200 Hz)
+		addq.l	#1,hz_200		| Update 5ms clock   (200 Hz)
 
 		move.w	tdiv2,d1		| Update divider
@@ -1611,7 +1611,7 @@
 		.page
 
-| _hdvini -- Drive initialization
-| -------    --------------------
-_hdvini:	link	a6,#-18			| Reserve space on stack
+| hdvini -- Drive initialization
+| ------    --------------------
+hdvini:		link	a6,#-18			| Reserve space on stack
 		movem.l	d3-d7/a3-a5,-(a7)	| Preserve registers
 		move.l	#300,maxactim		| maxactim = 300 * 20ms
@@ -1837,5 +1837,5 @@
 		move.b	#1,(a5)			| Set dskmode to "Uncertain"
 
-media4:		move.l	_hz_200,d0		| Get time in d0
+media4:		move.l	hz_200,d0		| Get time in d0
 		movea.w	d7,a1			| Calculate acctim table address
 		add.l	a1,a1			| ... = drive # * 4
@@ -2734,9 +2734,9 @@
 		lsl.w	#2,d0			| Use as index
 		lea	acctim(a5),a0		| ... into acctim
-		move.l	_hz_200(a5),0(a0,d0)	| Set last access time
+		move.l	hz_200(a5),0(a0,d0)	| Set last access time
 		cmp.w	#1,nflops(a5)
 		bne	flopok01
 
-		move.l	_hz_200(a5),4(a0)	| Time for other drive
+		move.l	hz_200(a5),4(a0)	| Time for other drive
 
 flopok01:	move.w	flpsrsv,sr		| Restore sr  (enable ints)
@@ -2913,5 +2913,5 @@
 bootload:	link	a6,#0			| Link stack frames
 		movem.l	d6-d7,-(a7)		| Save registers
-		jsr	_hdvini			| Init drive
+		jsr	hdvini			| Init drive
 		tst.w	nflops			| See if any connected
 		beq	bootld01		| Jump if drive there
@@ -3046,8 +3046,8 @@
 		bne	rand01			| Jump if not
 
-		move.l	_hz_200,d0		| Pick up the 200 Hz clock
+		move.l	hz_200,d0		| Pick up the 200 Hz clock
 		moveq.l	#16,d1			| Shift it left
 		asl.l	d1,d0			| ...
-		or.l	_hz_200,d0		| OR in current 200 Hz clock
+		or.l	hz_200,d0		| OR in current 200 Hz clock
 		move.l	d0,rseed		| Use that as the seed
 
@@ -3688,12 +3688,12 @@
 fc_val:		.ds.l	1		| Frame clock value  (0..FCMAX)
 
-_wzcrsh:	.ds.w	1		| Crash area: flag for ROMP
-_crshsr:	.ds.w	1		| Crash area: SR
-_crshpc:	.ds.l	1		| Crash area: PC
-_crshsp:	.ds.l	1		| Crash area: SP
-_crshus:	.ds.l	1		| Crash area: USP
-_crshvc:	.ds.l	1		| Crash area: vector # in MS byte
-_crshrg:	.ds.l	16		| Crash area: registers
-_crshst:	.ds.w	16		| Crash area: top 16 words of stack
+wzcrsh:		.ds.w	1		| Crash area: flag for ROMP
+crshsr:		.ds.w	1		| Crash area: SR
+crshpc:		.ds.l	1		| Crash area: PC
+crshsp:		.ds.l	1		| Crash area: SP
+crshus:		.ds.l	1		| Crash area: USP
+crshvc:		.ds.l	1		| Crash area: vector # in MS byte
+crshrg:		.ds.l	16		| Crash area: registers
+crshst:		.ds.w	16		| Crash area: top 16 words of stack
 
 | The area from biosram to SSTACK-1 is cleared on reset.
@@ -3703,6 +3703,6 @@
 		.ifne	BUCHLA
 
-_hz_1k:		.ds.l	1		| 1000 Hz clock
-_hz_200:	.ds.l	1		| 200 Hz clock
+hz_1k:		.ds.l	1		| 1000 Hz clock
+hz_200:		.ds.l	1		| 200 Hz clock
 frclock:	.ds.l	1		| 50 Hz clock
 t1count:	.ds.w	1		| Timer 1 count
@@ -3758,6 +3758,6 @@
 fverify:	.ds.w	1		| Floppy verify flag
 
-tdiv1:		.ds.w	1		| Timer divider 1  (divides _hz_1k)
-tdiv2:		.ds.w	1		| Timer divider 2  (divides _hz_200)
+tdiv1:		.ds.w	1		| Timer divider 1  (divides hz_1k)
+tdiv2:		.ds.w	1		| Timer divider 2  (divides hz_200)
 
 retrycnt:	.ds.w	1		| Re-try count
