Index: emu/fdd.c
===================================================================
--- emu/fdd.c	(revision e41c6b6b19ea6466eb638ae426c407922bec7dc2)
+++ emu/fdd.c	(revision 90d6373c2337862d361167f390b8ab2a2b138cb8)
@@ -49,4 +49,4 @@
 void fdd_write(uint32_t off, int32_t sz, uint32_t val)
 {
-	ver("fdd wr %u:8 0x%0*x", off, sz * 2, val);
+	ver("fdd wr %u:%d 0x%0*x", off, sz * 8, sz * 2, val);
 }
Index: emu/fpu.c
===================================================================
--- emu/fpu.c	(revision e41c6b6b19ea6466eb638ae426c407922bec7dc2)
+++ emu/fpu.c	(revision 90d6373c2337862d361167f390b8ab2a2b138cb8)
@@ -49,4 +49,4 @@
 void fpu_write(uint32_t off, int32_t sz, uint32_t val)
 {
-	ver("fpu wr 0x%04x:8 0x%0*x", off, sz * 2, val);
+	ver("fpu wr 0x%04x:%d 0x%0*x", off, sz * 8, sz * 2, val);
 }
Index: emu/kbd.c
===================================================================
--- emu/kbd.c	(revision e41c6b6b19ea6466eb638ae426c407922bec7dc2)
+++ emu/kbd.c	(revision 90d6373c2337862d361167f390b8ab2a2b138cb8)
@@ -49,4 +49,4 @@
 void kbd_write(uint32_t off, int32_t sz, uint32_t val)
 {
-	ver("kbd wr %u:8 0x%0*x", off, sz * 2, val);
+	ver("kbd wr %u:%d 0x%0*x", off, sz * 8, sz * 2, val);
 }
Index: emu/lcd.c
===================================================================
--- emu/lcd.c	(revision e41c6b6b19ea6466eb638ae426c407922bec7dc2)
+++ emu/lcd.c	(revision 90d6373c2337862d361167f390b8ab2a2b138cb8)
@@ -49,4 +49,4 @@
 void lcd_write(uint32_t off, int32_t sz, uint32_t val)
 {
-	ver("lcd wr %u:8 0x%0*x", off, sz * 2, val);
+	ver("lcd wr %u:%d 0x%0*x", off, sz * 8, sz * 2, val);
 }
Index: emu/led.c
===================================================================
--- emu/led.c	(revision e41c6b6b19ea6466eb638ae426c407922bec7dc2)
+++ emu/led.c	(revision 90d6373c2337862d361167f390b8ab2a2b138cb8)
@@ -49,4 +49,4 @@
 void led_write(uint32_t off, int32_t sz, uint32_t val)
 {
-	ver("led wr %u:8 0x%0*x", off, sz * 2, val);
+	ver("led wr %u:%d 0x%0*x", off, sz * 8, sz * 2, val);
 }
Index: emu/mid.c
===================================================================
--- emu/mid.c	(revision e41c6b6b19ea6466eb638ae426c407922bec7dc2)
+++ emu/mid.c	(revision 90d6373c2337862d361167f390b8ab2a2b138cb8)
@@ -49,4 +49,4 @@
 void mid_write(uint32_t off, int32_t sz, uint32_t val)
 {
-	ver("mid wr %u:8 0x%0*x", off, sz * 2, val);
+	ver("mid wr %u:%d 0x%0*x", off, sz * 8, sz * 2, val);
 }
Index: emu/ser.c
===================================================================
--- emu/ser.c	(revision e41c6b6b19ea6466eb638ae426c407922bec7dc2)
+++ emu/ser.c	(revision 90d6373c2337862d361167f390b8ab2a2b138cb8)
@@ -49,4 +49,4 @@
 void ser_write(uint32_t off, int32_t sz, uint32_t val)
 {
-	ver("ser wr %u:8 0x%0*x", off, sz * 2, val);
+	ver("ser wr %u:%d 0x%0*x", off, sz * 8, sz * 2, val);
 }
Index: emu/snd.c
===================================================================
--- emu/snd.c	(revision e41c6b6b19ea6466eb638ae426c407922bec7dc2)
+++ emu/snd.c	(revision 90d6373c2337862d361167f390b8ab2a2b138cb8)
@@ -49,4 +49,4 @@
 void snd_write(uint32_t off, int32_t sz, uint32_t val)
 {
-	ver("snd wr %u:8 0x%0*x", off, sz * 2, val);
+	ver("snd wr %u:%d 0x%0*x", off, sz * 8, sz * 2, val);
 }
Index: emu/tim.c
===================================================================
--- emu/tim.c	(revision e41c6b6b19ea6466eb638ae426c407922bec7dc2)
+++ emu/tim.c	(revision 90d6373c2337862d361167f390b8ab2a2b138cb8)
@@ -49,4 +49,4 @@
 void tim_write(uint32_t off, int32_t sz, uint32_t val)
 {
-	ver("tim wr %u:8 0x%0*x", off, sz * 2, val);
+	ver("tim wr %u:%d 0x%0*x", off, sz * 8, sz * 2, val);
 }
Index: emu/vid.c
===================================================================
--- emu/vid.c	(revision e41c6b6b19ea6466eb638ae426c407922bec7dc2)
+++ emu/vid.c	(revision 90d6373c2337862d361167f390b8ab2a2b138cb8)
@@ -49,4 +49,4 @@
 void vid_write(uint32_t off, int32_t sz, uint32_t val)
 {
-	ver("vid wr 0x%05x:8 0x%0*x", off, sz * 2, val);
+	ver("vid wr 0x%05x:%d 0x%0*x", off, sz * 8, sz * 2, val);
 }