source: buchla-68k/include/patch.h@ 5fa506d

Last change on this file since 5fa506d was 5fa506d, checked in by Thomas Lopatic <thomas@…>, 7 years ago

Include file cleanup.
  • Property mode set to 100644
File size: 4.3 KB
Line 
1/*
2 =============================================================================
3 patch.h -- MIDAS-VII Patch facility definitions
4 Version 22 -- 1988-12-02 -- D.N. Lynx Crowe
5 =============================================================================
6*/
7
8#pragma once
9
10#include "stdint.h"
11
12#define MAXPATCH 256 /* patch table size */
13#define RAWDEFS 256 /* def table size */
14
15#define NSLINES 1000 /* sequence table size */
16#define NSEQW 7 /* number of words in a seqent */
17
18#define SEQTIME 10 /* milliseconds per tick */
19
20#define DATAROW 9 /* data entry row */
21
22#define NDEFSTMS 5120 /* number of stms/defs */
23#define NPTEQELS 256 /* number of trigger fifo entries */
24
25#define NPTEQLO (NPTEQELS >> 2) /* trigger fifo lo water */
26#define NPTEQHI (NPTEQELS - NPTEQLO)
27 /* trigger fifo hi water */
28
29#define NULL_DEF 0x1200 /* blank definer code */
30
31#define ADR_MASK 0x00FF /* patch / defent table index mask */
32#define TRG_MASK 0x1FFF /* trigger mask */
33#define PE_SPEC 0x00FF /* destination mask */
34#define PE_TBIT 0x8000 /* DEF triggered bit */
35
36/*
37
38*/
39
40/* Patch structure definitions */
41
42struct patch { /* patch table entry (16 bytes per entry) */
43
44 uint16_t nextstm; /* index of next entry in stm chain */
45 uint16_t prevstm; /* index of previous entry in stm chain */
46 uint16_t defnum; /* definer */
47 uint16_t stmnum; /* stimulus */
48 uint16_t paspec; /* destination type and flags */
49 uint16_t pasuba; /* sub-address */
50 uint16_t padat1; /* data word 1 */
51 uint16_t padat2; /* data word 2 */
52};
53
54struct defent { /* definition table entry -- 10 bytes per entry */
55
56 uint16_t nextdef; /* index of next in def chain */
57 uint16_t stm; /* stimulus */
58 uint16_t adspec; /* destination type */
59 uint16_t adsuba; /* sub-address */
60 uint16_t addat1; /* data word 1 */
61};
62
63
64/* Sequence structure definitions */
65
66struct seqent { /* sequence table entry -- 14 bytes per entry */
67
68 uint16_t seqtime; /* time */
69 uint16_t seqact1; /* action 1 */
70 uint16_t seqdat1; /* action 1 data */
71 uint16_t seqact2; /* action 2 */
72 uint16_t seqdat2; /* action 2 data */
73 uint16_t seqact3; /* action 3 */
74 uint16_t seqdat3; /* action 3 data */
75};
76
77/*
78
79*/
80
81/* Patch destination types */
82
83#define PA_KEY 1
84#define PA_TRG 2
85#define PA_PLS 3
86#define PA_LED 4
87#define PA_SLIN 5
88#define PA_SCTL 6
89#define PA_TUNE 7
90#define PA_RSET 8
91#define PA_RADD 9
92#define PA_INST 10
93#define PA_OSC 11
94#define PA_WAVA 12
95#define PA_WAVB 13
96#define PA_CNFG 14
97#define PA_LEVL 15
98#define PA_INDX 16
99#define PA_FREQ 17
100#define PA_FILT 18
101#define PA_FILQ 19
102#define PA_LOCN 20
103#define PA_DYNM 21
104#define PA_AUX 22
105#define PA_RATE 23
106#define PA_INTN 24
107#define PA_DPTH 25
108#define PA_VOUT 26
109
110/* Patch sub-address types */
111
112#define PSA_SRC 0
113#define PSA_MLT 1
114#define PSA_TIM 2
115#define PSA_VAL 3
116#define PSA_FNC 4
117
118/* Patch oscillator data types */
119
120#define PSO_INT 0
121#define PSO_RAT 1
122#define PSO_FRQ 2
123#define PSO_PCH 3
124
125/*
126
127*/
128
129/* Sequence control flags */
130
131#define SQF_RUN 0x8000 /* RUN state */
132#define SQF_CLK 0x4000 /* CLK state */
133
134/* Sequence action word masks */
135
136#define SQ_MACT 0x00FF /* ACT -- action mask */
137#define SQ_MOBJ 0xFF00 /* ACT -- object mask */
138
139/* Sequence action types */
140
141#define SQ_NULL 0x0000 /* NULL action */
142
143#define SQ_CKEY 0x0001 /* Key closure */
144#define SQ_RKEY 0x0002 /* Key release */
145#define SQ_TKEY 0x0003 /* Key transient */
146#define SQ_IKEY 0x0004 /* If key active */
147
148#define SQ_STRG 0x0005 /* Trigger on */
149#define SQ_CTRG 0x0006 /* Trigger off */
150#define SQ_TTRG 0x0007 /* Trigger toggle */
151#define SQ_ITRG 0x0008 /* If trigger active */
152
153#define SQ_SREG 0x0009 /* Set register */
154#define SQ_IREQ 0x000A /* If register = */
155#define SQ_IRLT 0x000B /* If register < */
156#define SQ_IRGT 0x000C /* If register > */
157
158#define SQ_ISTM 0x000D /* If stimulus active */
159#define SQ_JUMP 0x000E /* Jump to sequence line */
160#define SQ_STOP 0x000F /* Stop sequence */
161
162#define SQ_AREG 0x0010 /* Increment register */
163
164/* Sequence data word masks */
165
166#define SQ_MFLG 0xF000 /* DAT -- flag mask */
167#define SQ_MTYP 0x0F00 /* DAT -- data type mask */
168#define SQ_MVAL 0x00FF /* DAT -- data value mask */
169
170/* Sequence data types */
171
172#define SQ_REG 0x0000 /* register */
173#define SQ_VAL 0x0100 /* value */
174#define SQ_VLT 0x0200 /* voltage */
175#define SQ_RND 0x0300 /* random */
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