source: buchla-68k/include/patch.h@ f7428b1

Last change on this file since f7428b1 was f7428b1, checked in by Thomas Lopatic <thomas@…>, 7 years ago

Started to rework include files.
  • Property mode set to 100644
File size: 4.3 KB
Line 
1/*
2 =============================================================================
3 patch.h -- MIDAS-VII Patch facility definitions
4 Version 22 -- 1988-12-02 -- D.N. Lynx Crowe
5 =============================================================================
6*/
7
8#pragma once
9#include "stdint.h"
10
11#define MAXPATCH 256 /* patch table size */
12#define RAWDEFS 256 /* def table size */
13
14#define NSLINES 1000 /* sequence table size */
15#define NSEQW 7 /* number of words in a seqent */
16
17#define SEQTIME 10 /* milliseconds per tick */
18
19#define DATAROW 9 /* data entry row */
20
21#define NDEFSTMS 5120 /* number of stms/defs */
22#define NPTEQELS 256 /* number of trigger fifo entries */
23
24#define NPTEQLO (NPTEQELS >> 2) /* trigger fifo lo water */
25#define NPTEQHI (NPTEQELS - NPTEQLO)
26 /* trigger fifo hi water */
27
28#define NULL_DEF 0x1200 /* blank definer code */
29
30#define ADR_MASK 0x00FF /* patch / defent table index mask */
31#define TRG_MASK 0x1FFF /* trigger mask */
32#define PE_SPEC 0x00FF /* destination mask */
33#define PE_TBIT 0x8000 /* DEF triggered bit */
34
35/*
36
37*/
38
39/* Patch structure definitions */
40
41struct patch { /* patch table entry (16 bytes per entry) */
42
43 uint16_t nextstm; /* index of next entry in stm chain */
44 uint16_t prevstm; /* index of previous entry in stm chain */
45 uint16_t defnum; /* definer */
46 uint16_t stmnum; /* stimulus */
47 uint16_t paspec; /* destination type and flags */
48 uint16_t pasuba; /* sub-address */
49 uint16_t padat1; /* data word 1 */
50 uint16_t padat2; /* data word 2 */
51};
52
53struct defent { /* definition table entry -- 10 bytes per entry */
54
55 uint16_t nextdef; /* index of next in def chain */
56 uint16_t stm; /* stimulus */
57 uint16_t adspec; /* destination type */
58 uint16_t adsuba; /* sub-address */
59 uint16_t addat1; /* data word 1 */
60};
61
62
63/* Sequence structure definitions */
64
65struct seqent { /* sequence table entry -- 14 bytes per entry */
66
67 uint16_t seqtime; /* time */
68 uint16_t seqact1; /* action 1 */
69 uint16_t seqdat1; /* action 1 data */
70 uint16_t seqact2; /* action 2 */
71 uint16_t seqdat2; /* action 2 data */
72 uint16_t seqact3; /* action 3 */
73 uint16_t seqdat3; /* action 3 data */
74};
75
76/*
77
78*/
79
80/* Patch destination types */
81
82#define PA_KEY 1
83#define PA_TRG 2
84#define PA_PLS 3
85#define PA_LED 4
86#define PA_SLIN 5
87#define PA_SCTL 6
88#define PA_TUNE 7
89#define PA_RSET 8
90#define PA_RADD 9
91#define PA_INST 10
92#define PA_OSC 11
93#define PA_WAVA 12
94#define PA_WAVB 13
95#define PA_CNFG 14
96#define PA_LEVL 15
97#define PA_INDX 16
98#define PA_FREQ 17
99#define PA_FILT 18
100#define PA_FILQ 19
101#define PA_LOCN 20
102#define PA_DYNM 21
103#define PA_AUX 22
104#define PA_RATE 23
105#define PA_INTN 24
106#define PA_DPTH 25
107#define PA_VOUT 26
108
109/* Patch sub-address types */
110
111#define PSA_SRC 0
112#define PSA_MLT 1
113#define PSA_TIM 2
114#define PSA_VAL 3
115#define PSA_FNC 4
116
117/* Patch oscillator data types */
118
119#define PSO_INT 0
120#define PSO_RAT 1
121#define PSO_FRQ 2
122#define PSO_PCH 3
123
124/*
125
126*/
127
128/* Sequence control flags */
129
130#define SQF_RUN 0x8000 /* RUN state */
131#define SQF_CLK 0x4000 /* CLK state */
132
133/* Sequence action word masks */
134
135#define SQ_MACT 0x00FF /* ACT -- action mask */
136#define SQ_MOBJ 0xFF00 /* ACT -- object mask */
137
138/* Sequence action types */
139
140#define SQ_NULL 0x0000 /* NULL action */
141
142#define SQ_CKEY 0x0001 /* Key closure */
143#define SQ_RKEY 0x0002 /* Key release */
144#define SQ_TKEY 0x0003 /* Key transient */
145#define SQ_IKEY 0x0004 /* If key active */
146
147#define SQ_STRG 0x0005 /* Trigger on */
148#define SQ_CTRG 0x0006 /* Trigger off */
149#define SQ_TTRG 0x0007 /* Trigger toggle */
150#define SQ_ITRG 0x0008 /* If trigger active */
151
152#define SQ_SREG 0x0009 /* Set register */
153#define SQ_IREQ 0x000A /* If register = */
154#define SQ_IRLT 0x000B /* If register < */
155#define SQ_IRGT 0x000C /* If register > */
156
157#define SQ_ISTM 0x000D /* If stimulus active */
158#define SQ_JUMP 0x000E /* Jump to sequence line */
159#define SQ_STOP 0x000F /* Stop sequence */
160
161#define SQ_AREG 0x0010 /* Increment register */
162
163/* Sequence data word masks */
164
165#define SQ_MFLG 0xF000 /* DAT -- flag mask */
166#define SQ_MTYP 0x0F00 /* DAT -- data type mask */
167#define SQ_MVAL 0x00FF /* DAT -- data value mask */
168
169/* Sequence data types */
170
171#define SQ_REG 0x0000 /* register */
172#define SQ_VAL 0x0100 /* value */
173#define SQ_VLT 0x0200 /* voltage */
174#define SQ_RND 0x0300 /* random */
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