[3ae31e9] | 1 | * ------------------------------------------------------------------------------
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| 2 | * serintr.s -- MIDAS-VII serial I/O subroutines
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| 3 | * Version 4 -- 1988-12-13 -- D.N. Lynx Crowe
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| 4 | *
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| 5 | * These subroutines replace those in bios.s in order to add support for
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| 6 | * MIDAS-VII foot pedal and pulse inputs, and pulse outputs.
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| 7 | *
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| 8 | * WARNING: The code below uses addresses in the bios RAM area. These addresses
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| 9 | * correspond to those in PROMS dated 1988-06-20 et seq. If the bios is changed,
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| 10 | * the addresses marked with <== may have to be changed.
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| 11 | * ------------------------------------------------------------------------------
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| 12 | *
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| 13 | .text
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| 14 | *
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| 15 | .xdef _setsio
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| 16 | *
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| 17 | .xdef _foot1
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| 18 | .xdef _foot2
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| 19 | .xdef _pulse1
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| 20 | .xdef _pulse2
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| 21 | *
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| 22 | .xdef serintr
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| 23 | *
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| 24 | .xdef serint
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| 25 | .xdef midint
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| 26 | *
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| 27 | .xdef wrapin
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| 28 | .xdef wrapout
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| 29 | *
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| 30 | .xdef serput
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| 31 | .xdef midput
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| 32 | *
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| 33 | .xdef rtschk
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| 34 | *
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| 35 | .xdef rtson
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| 36 | .xdef rtsoff
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| 37 | *
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| 38 | * ==============================================================================
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| 39 | *
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| 40 | * The following addresses, marked by <==, are bios version dependent:
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| 41 | *
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| 42 | RAM .equ $00000400 * Beginning of system RAM area <==
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| 43 | *
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| 44 | SR1IOREC .equ RAM+$0AB0 * Serial-1 iorec structure <==
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| 45 | SR2IOREC .equ RAM+$0AD8 * Serial-2 iorec structure <==
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| 46 | MC1IOREC .equ RAM+$0B00 * MIDI-1 iorec structure <==
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| 47 | MC2IOREC .equ RAM+$0B28 * MIDI-2 iorec structure <==
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| 48 | *
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| 49 | * End of bios version dependent addresses.
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| 50 | *
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| 51 | * ==============================================================================
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| 52 | *
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| 53 | .page
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| 54 | *
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| 55 | SERVECT .equ $000074 * Level 5 interrupt autovector address
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| 56 | *
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| 57 | IPL7 .equ $0700 * IPL 7 value for sr
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| 58 | *
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| 59 | * ACIA I/O Addresses:
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| 60 | * -------------------
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| 61 | SR1ACIA .equ $3A8001 * Serial-1 ACIA base address
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| 62 | SR2ACIA .equ $3A8009 * Serial-2 ACIA base address
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| 63 | MC1ACIA .equ $3AC001 * MIDI-1 ACIA base address
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| 64 | MC2ACIA .equ $3AC009 * MIDI-2 ACIA base address
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| 65 | *
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| 66 | * ACIA Register offsets:
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| 67 | * ----------------------
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| 68 | ACIA_IER .equ 0 * ACIA IER offset
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| 69 | ACIA_ISR .equ 0 * ACIA ISR offset
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| 70 | ACIA_CSR .equ 2 * ACIA CSR offset
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| 71 | ACIA_CFR .equ 2 * ACIA CFR offset
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| 72 | ACIA_TBR .equ 4 * ACIA TBR offset
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| 73 | ACIA_TDR .equ 6 * ACIA TDR offset
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| 74 | ACIA_RDR .equ 6 * ACIA RDR offset
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| 75 | *
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| 76 | * iorec structure definitions:
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| 77 | * ----------------------------
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| 78 | IORECLN .equ 40 * Length of an iorec structure
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| 79 | *
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| 80 | ibuf .equ 0 * Input buffer base address
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| 81 | ibufsize .equ 4 * Input buffer size (bytes)
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| 82 | ibufhd .equ 6 * Input buffer head index
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| 83 | ibuftl .equ 8 * Input buffer tail index
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| 84 | ibuflow .equ 10 * Input buffer low water mark
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| 85 | ibufhi .equ 12 * Input buffer high water mark
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| 86 | obuf .equ 14 * Output buffer base address
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| 87 | obufsize .equ 18 * Output buffer size (bytes)
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| 88 | obufhd .equ 20 * Output buffer head index
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| 89 | obuftl .equ 22 * Output buffer tail index
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| 90 | obuflow .equ 24 * Output buffer low water mark
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| 91 | obufhi .equ 26 * Output buffer high water mark
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| 92 | cfr0 .equ 28 * ACIA CFR, MS bit = 0
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| 93 | cfr1 .equ 29 * ACIA CFR, MS bit = 1
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| 94 | flagxon .equ 30 * XON flag (non-zero = XOFF sent)
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| 95 | flagxoff .equ 31 * XOFF flag (non-zero = active)
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| 96 | linedisc .equ 32 * Line discipline flags
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| 97 | erbyte .equ 33 * Last error byte
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| 98 | isr .equ 34 * ACIA ISR on interrupt
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| 99 | csr .equ 35 * ACIA CSR on interrupt
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| 100 | errct .equ 36 * Error count (FRM/OVR/BRK)
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| 101 | ibfct .equ 38 * Input buffer full count
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| 102 | *
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| 103 | .page
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| 104 | *
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| 105 | * serintr -- Serial (Serial-1, Serial-2, MIDI-1, MIDI-2) interrupt handler
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| 106 | * ------- -------------------------------------------------------------
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| 107 | serintr: movem.l d0-d3/a0-a2,-(a7) * Save registers
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| 108 | lea SR1IOREC,a0 * Point at Serial-1 iorec
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| 109 | lea SR1ACIA,a1 * Point at Serial-1 ACIA
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| 110 | movea.l _foot1,a2 * Point at foot sw. 1 processor
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| 111 | bsr serint * Go process (possible) int.
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| 112 | *
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| 113 | lea SR2IOREC,a0 * Point at Serial-2 iorec
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| 114 | lea SR2ACIA,a1 * Point at Serial-2 ACIA
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| 115 | movea.l _foot2,a2 * Point at foot sw. 2 processor
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| 116 | bsr serint * Go process (possible) int.
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| 117 | *
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| 118 | lea MC1IOREC,a0 * Point at MIDI-1 iorec
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| 119 | lea MC1ACIA,a1 * Point at MIDI-1 ACIA
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| 120 | movea.l _pulse1,a2 * Point at pulse 1 processor
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| 121 | bsr midint * Go process (possible) int.
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| 122 | *
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| 123 | lea MC2IOREC,a0 * Point at MIDI-2 iorec
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| 124 | lea MC2ACIA,a1 * Point at MIDI-2 ACIA
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| 125 | movea.l _pulse2,a2 * Point at pulse 2 processor
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| 126 | bsr midint * Go process (possible) int.
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| 127 | *
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| 128 | movem.l (a7)+,d0-d3/a0-a2 * Restore registers
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| 129 | rte * Return from exception
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| 130 | *
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| 131 | .page
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| 132 | *
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| 133 | * serint -- Process an interrupt from Serial-1 or Serial-2
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| 134 | * ------ ----------------------------------------------
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| 135 | serint: move.b ACIA_ISR(a1),isr(a0) * Get and save ISR
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| 136 | move.b ACIA_CSR(a1),csr(a0) * Get and save CSR
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| 137 | *
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| 138 | btst.b #7,isr(a0) * Was int for this device ?
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| 139 | beq serintx * Jump if not
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| 140 | *
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| 141 | serchk: btst.b #1,isr(a0) * FRM/OVR/BRK error ?
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| 142 | bne sererr * Jump if so
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| 143 | *
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| 144 | btst.b #0,isr(a0) * Receiver interrupt ?
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| 145 | bne serrx * Jump if so
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| 146 | *
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| 147 | sertxq: btst.b #6,isr(a0) * Transmitter interrupt ?
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| 148 | bne sertx * Jump if so
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| 149 | *
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| 150 | serctq: btst.b #5,isr(a0) * CTS interrupt ?
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| 151 | bne sercts * Jump if so
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| 152 | *
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| 153 | serintx: btst.b #4,isr(a0) * DCD interrupt ?
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| 154 | bne calldcd * Jump if so
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| 155 | *
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| 156 | serdone: rts * Return to caller
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| 157 | *
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| 158 | calldcd: move.b csr(a0),d0 * Get CSR interrupt status
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| 159 | btst.l #4,d0 * Check DCD input (0 = active)
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| 160 | bne calldcd0 * Jump if line was inactive
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| 161 | *
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| 162 | moveq.l #1,d0 * Set footswitch status to TRUE
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| 163 | bra calldcd1 * ...
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| 164 | *
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| 165 | calldcd0: moveq.l #0,d0 * Set footswitch status to FALSE
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| 166 | *
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| 167 | calldcd1: move.w d0,-(a7) * Call the footswitch processor
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| 168 | jsr (a2) * ... (*footX)(status)
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| 169 | tst.w (a7)+ * ...
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| 170 | rts * Return to caller
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| 171 | *
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| 172 | .page
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| 173 | *
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| 174 | * Handle serial I/O port error
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| 175 | *
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| 176 | sererr: addq.w #1,errct(a0) * Update error count
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| 177 | move.b ACIA_RDR(a1),erbyte(a0) * Get error byte
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| 178 | rts * Return to caller
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| 179 | *
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| 180 | *
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| 181 | * Handle CTS interupt
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| 182 | *
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| 183 | sercts: btst.b #1,linedisc(a0) * RTS/CTS mode ?
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| 184 | beq serintx * Ignore if not
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| 185 | *
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| 186 | btst.b #5,csr(a0) * CTS set ?
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| 187 | beq serintx * Ignore if not
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| 188 | *
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| 189 | sercts1: btst.b #6,isr(a0) * TDRE set ?
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| 190 | beq sercts1 * Loop until it is (!)
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| 191 | *
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| 192 | move.w obufhd(a0),d2 * Head index to d2
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| 193 | cmp.w obuftl(a0),d2 * Compare to tail index
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| 194 | beq serintx * Done if buffer empty
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| 195 | *
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| 196 | bsr wrapout * Adjust pointer for wraparound
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| 197 | move.l obuf(a0),a2 * Get buffer base in a2
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| 198 | move.b 0(a2,d2),ACIA_TDR(a1) * Send byte on its way
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| 199 | move.w d2,obufhd(a0) * Save updated head index
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| 200 | bra serintx * Done
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| 201 | *
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| 202 | .page
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| 203 | *
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| 204 | * Handle receiver interrupt
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| 205 | *
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| 206 | serrx: btst.b #1,linedisc(a0) * RTS/CTS mode set ?
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| 207 | beq serrx1 * Jump if not
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| 208 | *
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| 209 | bsr rtsoff * Turn off RTS
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| 210 | *
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| 211 | serrx1: move.b ACIA_RDR(a1),d0 * Read data from ACIA
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| 212 | btst.b #1,linedisc(a0) * RTS/CTS mode set ?
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| 213 | bne serrx3 * Jump if so
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| 214 | *
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| 215 | btst.b #0,linedisc(a0) * XON/XOFF mode set ?
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| 216 | beq serrx3 * Jump if not
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| 217 | *
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| 218 | cmpi.b #$11,d0 * Is this an XON ?
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| 219 | bne serrx2 * Jump if not
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| 220 | *
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| 221 | move.b #$00,flagxoff(a0) * Clear flagxoff
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| 222 | bra sertxq * Done
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| 223 | *
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| 224 | serrx2: cmpi.b #$13,d0 * Is this an XOFF ?
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| 225 | bne serrx3 * Jump if not
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| 226 | *
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| 227 | move.b #$FF,flagxoff(a0) * Set flagxoff
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| 228 | bra sertxq * Done
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| 229 | *
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| 230 | serrx3: move.w ibuftl(a0),d1 * Get tail index in d1
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| 231 | bsr wrapin * Adjust for wraparound
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| 232 | cmp.w ibufhd(a0),d1 * Head = tail ?
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| 233 | beq seribf * If so, we drop the character
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| 234 | *
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| 235 | .page
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| 236 | move.l ibuf(a0),a2 * Get buffer address
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| 237 | move.b d0,0(a2,d1) * Stash byte in buffer
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| 238 | move.w d1,ibuftl(a0) * Save updated tail index
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| 239 | move.w ibuftl(a0),d2 * Tail index to d2
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| 240 | move.w ibufhd(a0),d3 * Head index to d3
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| 241 | cmp.w d3,d2 * Head > Tail ?
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| 242 | bhi rsi_1 * Jump if not
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| 243 | *
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| 244 | add.w ibufsize(a0),d2 * Add buffer size to tail index
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| 245 | *
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| 246 | rsi_1: sub.w d3,d2 * Length = (adjusted)Tail - Head
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| 247 | cmp.w ibufhi(a0),d2 * Hit high water mark ?
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| 248 | bne serrx4 * Jump if not
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| 249 | *
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| 250 | btst.b #1,linedisc(a0) * RTS/CTS mode set ?
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| 251 | bne sertxq * Done if so
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| 252 | *
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| 253 | btst.b #0,linedisc(a0) * XON/XOFF mode set ?
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| 254 | beq serrx4 * Jump if not
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| 255 | *
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| 256 | tst.b flagxon(a0) * XOFF already sent ?
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| 257 | bne serrx4 * Jump if so
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| 258 | *
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| 259 | move.b #$FF,flagxon(a0) * Set the flag
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| 260 | move.b #$13,d1 * Send an XOFF
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| 261 | bsr serput * ...
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| 262 | *
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| 263 | serrx4: btst #1,linedisc(a0) * RTS/CTS mode set ?
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| 264 | beq sertxq * Done if not
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| 265 | *
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| 266 | bsr rtson * Turn on RTS
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| 267 | bra sertxq * Done
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| 268 | *
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| 269 | .page
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| 270 | *
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| 271 | * Handle transmitter interrupt
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| 272 | *
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| 273 | sertx: btst.b #1,linedisc(a0) * RTS/CTS mode set ?
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| 274 | bne sertx2 * If so, go check CTS
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| 275 | *
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| 276 | btst.b #0,linedisc(a0) * XON/XOFF mode set ?
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| 277 | beq sertx1 * Jump if not
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| 278 | *
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| 279 | tst.b flagxoff(a0) * Check flagxoff
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| 280 | bne serctq * Done if set
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| 281 | *
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| 282 | sertx1: move.w obufhd(a0),d2 * Head index to d2
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| 283 | cmp.w obuftl(a0),d2 * Compare to tail index
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| 284 | beq serctq * Done if buffer empty
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| 285 | *
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| 286 | bsr wrapout * Adjust pointer for wraparound
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| 287 | move.l obuf(a0),a2 * Get buffer base address
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| 288 | move.b 0(a2,d2),ACIA_TDR(a1) * Send byte on its way
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| 289 | move.w d2,obufhd(a0) * Save updated head index
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| 290 | bra serctq * Done
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| 291 | *
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| 292 | sertx2: btst.b #5,csr(a0) * CTS set in csr ?
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| 293 | beq serctq * If not, go check for CTS int
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| 294 | *
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| 295 | bra sertx1 * CTS was set, go transmit
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| 296 | *
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| 297 | seribf: move.b d0,erbyte(a0) * Log dropped character
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| 298 | addq.w #1,ibfct(a0) * ...
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| 299 | bra sertxq * Go check Tx interrupt
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| 300 | *
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| 301 | .page
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| 302 | *
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| 303 | * midint -- Process an interrupt from MIDI-1 or MIDI-2
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| 304 | * ------ ------------------------------------------
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| 305 | midint: move.b ACIA_ISR(a1),isr(a0) * Get and save ISR
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| 306 | move.b ACIA_CSR(a1),csr(a0) * Get and save CSR
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| 307 | *
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| 308 | btst.b #7,isr(a0) * Was int for this device ?
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| 309 | beq midintx * Jump if not
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| 310 | *
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| 311 | midchk: btst.b #1,isr(a0) * FRM/OVR/BRK error ?
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| 312 | bne miderr * Jump if so
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| 313 | *
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| 314 | btst.b #0,isr(a0) * Receiver interrupt ?
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| 315 | bne midrx * Jump if so
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| 316 | *
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| 317 | midtxq: btst.b #6,isr(a0) * Transmitter interrupt ?
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| 318 | bne midtx * Jump if so
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| 319 | *
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| 320 | midintx: btst #4,isr(a0) * DCD interrupt ?
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| 321 | bne mididcd * Jump if so
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| 322 | *
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| 323 | mididone: rts * Return to caller
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| 324 | *
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| 325 | mididcd: jmp (a2) * Exit through the DCD processor
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| 326 | *
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| 327 | miderr: addq.w #1,errct(a0) * Update error count
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| 328 | move.b ACIA_RDR(a1),erbyte(a0) * Get error byte
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| 329 | rts
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| 330 | *
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| 331 | * Handle receiver interrupt
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| 332 | *
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| 333 | midrx: move.b ACIA_RDR(a1),d0 * Read data from ACIA
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| 334 | move.w ibuftl(a0),d1 * Get tail index in d1
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| 335 | bsr wrapin * Adjust for wraparound
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| 336 | cmp.w ibufhd(a0),d1 * Head = tail ?
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| 337 | beq midibf * If so, we drop the character
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| 338 | *
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| 339 | move.l ibuf(a0),a2 * Get buffer address
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| 340 | move.b d0,0(a2,d1) * Stash byte in buffer
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| 341 | move.w d1,ibuftl(a0) * Save updated tail index
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| 342 | bra midtxq * Done (go check tx int)
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| 343 | *
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| 344 | .page
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| 345 | *
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| 346 | * Handle transmitter interrupt
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| 347 | *
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| 348 | midtx: move.w obufhd(a0),d2 * Head index to d2
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| 349 | cmp.w obuftl(a0),d2 * Compare to tail index
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| 350 | beq midintx * Done if buffer empty
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| 351 | *
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| 352 | bsr wrapout * Adjust pointer for wraparound
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| 353 | move.l obuf(a0),a2 * Get buffer base address
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| 354 | move.b 0(a2,d2),ACIA_TDR(a1) * Send byte on its way
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| 355 | move.w d2,obufhd(a0) * Save updated head index
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| 356 | bra midintx * Done
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| 357 | *
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| 358 | midibf: move.b d0,erbyte(a0) * Log dropped character
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| 359 | addq.w #1,ibfct(a0) * ...
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| 360 | bra midtxq * Go check Tx interrupt
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| 361 | *
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| 362 | .page
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| 363 | *
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| 364 | * serput -- Output a character to a serial port
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| 365 | * ------ -----------------------------------
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| 366 | serput: move.w sr,-(a7) * Save status register
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| 367 | ori.w #IPL7,sr * DISABLE INTERRUPTS
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| 368 | move.b ACIA_ISR(a1),isr(a0) * Get ACIA isr
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| 369 | move.b ACIA_CSR(a1),csr(a0) * Get ACIA csr
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| 370 | btst #0,linedisc(a0) * XON/XOFF mode ?
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| 371 | beq serpt_1 * Jump if not
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| 372 | *
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| 373 | tst.b flagxoff(a0) * XON active ?
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| 374 | bne serpt_2 * Jump if so
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| 375 | *
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| 376 | serpt_1: btst.b #6,isr(a0) * Is ACIA still sending ?
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| 377 | beq serpt_2 * Jump if so
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| 378 | *
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| 379 | move.w obufhd(a0),d2 * Head index to d2
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| 380 | cmp.w obuftl(a0),d2 * Compare to tail index
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| 381 | bne serpt_2 * Jump if buffer not empty
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| 382 | *
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| 383 | move.b d1,ACIA_TDR(a1) * Give byte to ACIA to send
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| 384 | bra serpt_3 * Go deal with RTS/CTS if needed
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| 385 | *
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| 386 | serpt_2: move.w obuftl(a0),d2 * Tail index to d2
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| 387 | bsr wrapout * Adjust for wraparound
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| 388 | cmp.w obufhd(a0),d2 * Compare to head index
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| 389 | beq serpt_4 * Jump if buffer full
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| 390 | *
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| 391 | move.l obuf(a0),a2 * Get buffer base address in a2
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| 392 | move.b d1,0(a2,d2) * Put character in buffer
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| 393 | move.w d2,obuftl(a0) * Update buffer tail index
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| 394 | *
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| 395 | serpt_3: bsr serchk * Check status on our way out
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| 396 | bsr rtschk * Handle RTS protocol
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| 397 | move.w (a7)+,sr * RESTORE INTERRUPTS
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| 398 | andi #$FFFE,sr * Clear carry flag = OK
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| 399 | rts * Return to caller
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| 400 | *
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| 401 | serpt_4: bsr serchk * Check status on our way out
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| 402 | bsr rtschk * Handle RTS protocol
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| 403 | move.w (a7)+,sr * RESTORE INTERRUPTS
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| 404 | ori #$0001,sr * Set carry flag = buffer full
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| 405 | rts * Return to caller
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| 406 | *
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| 407 | .page
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| 408 | *
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| 409 | * midput -- Output to MIDI
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| 410 | * ------ --------------
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| 411 | midput: move.w sr,-(a7) * Save status register
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| 412 | ori.w #IPL7,sr * DISABLE INTERRUPTS
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| 413 | move.b ACIA_ISR(a1),isr(a0) * Get ACIA isr
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| 414 | move.b ACIA_CSR(a1),csr(a0) * Get ACIA csr
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| 415 | btst.b #6,isr(a0) * Is ACIA still sending ?
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| 416 | beq midpt_2 * Jump if so
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| 417 | *
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| 418 | move.w obufhd(a0),d2 * Head index to d2
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| 419 | cmp.w obuftl(a0),d2 * Compare to tail index
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| 420 | bne midpt_2 * Jump if buffer not empty
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| 421 | *
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| 422 | move.b d1,ACIA_TDR(a1) * Give byte to ACIA to send
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| 423 | bra midpt_3 * Go set final status and exit
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| 424 | *
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| 425 | midpt_2: move.w obuftl(a0),d2 * Tail index to d2
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| 426 | bsr wrapout * Adjust for wraparound
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| 427 | cmp.w obufhd(a0),d2 * Compare to head index
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| 428 | beq midpt_4 * Jump if buffer full
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| 429 | *
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| 430 | move.l obuf(a0),a2 * Get buffer base address in a2
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| 431 | move.b d1,0(a2,d2) * Put character in buffer
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| 432 | move.w d2,obuftl(a0) * Update buffer tail index
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| 433 | *
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| 434 | midpt_3: bsr midchk * Check status on our way out
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| 435 | move.w (a7)+,sr * RESTORE INTERRUPTS
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| 436 | andi #$FFFE,sr * Clear carry flag = OK
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| 437 | rts * Return to caller
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| 438 | *
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| 439 | midpt_4: bsr midchk * Check status on our way out
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| 440 | move.w (a7)+,sr * RESTORE INTERRUPTS
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| 441 | ori #$0001,sr * Set carry flag = buffer full
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| 442 | rts * Return to caller
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| 443 | *
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| 444 | .page
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| 445 | *
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| 446 | * rtschk -- Check RTS mode and turn on RTS if it's enabled
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| 447 | * ------ ----------------------------------------------
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| 448 | rtschk: btst #1,linedisc(a0) * RTS/CTS mode set ?
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| 449 | beq rtsexit * Jump to exit if not
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| 450 | *
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| 451 | * rtson -- Turn on RTS line
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| 452 | * ----- ----------------
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| 453 | rtson: move.b cfr1(a0),d0 * Pick up CFR1 image
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| 454 | bclr #0,d0 * Turn on RTS line (0 = on)
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| 455 | bra rtscmn * Join common RTS code below
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| 456 | *
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| 457 | * rtsoff -- Turn off RTS line
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| 458 | * ------ -----------------
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| 459 | rtsoff: move.b cfr1(a0),d0 * Pick up CFR1 image
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| 460 | bset #0,d0 * Turn off RTS line (1 = off)
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| 461 |
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| 462 | rtscmn: bset #7,d0 * Make sure MS bit is set
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| 463 | move.b d0,cfr1(a0) * Update CFR1 image
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| 464 | move.b d0,ACIA_CFR(a1) * Send CFR to hardware
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| 465 | *
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| 466 | rtsexit: rts * Return to caller
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| 467 | *
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| 468 | .page
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| 469 | *
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| 470 | * wrapin -- Check input pointer for wraparound
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| 471 | * ------ ----------------------------------
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| 472 | wrapin: add.w #1,d1 * Head index +1
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| 473 | cmp.w ibufsize(a0),d1 * = buffer size ?
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| 474 | bcs wrapin1 * Jump if not
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| 475 | *
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| 476 | moveq.l #0,d1 * Wraparound
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| 477 | *
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| 478 | wrapin1: rts * Return to caller
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| 479 | *
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| 480 | * wrapout -- Check output pointer for wraparound
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| 481 | * ------- -----------------------------------
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| 482 | wrapout: addq.w #1,d2 * Tail index +1
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| 483 | cmp.w obufsize(a0),d2 * = buffer size ?
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| 484 | bcs wrapout1 * Jump if not
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| 485 | *
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| 486 | moveq.l #0,d2 * Wrap around if so
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| 487 | *
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| 488 | wrapout1: rts * Return to caller
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| 489 | *
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| 490 | .page
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| 491 | *
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| 492 | * _setsio -- setsio() -- initialize serial I/O vectors and DCD interrupts
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| 493 | * ------- ------------------------------------------------------------
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| 494 | _setsio: move.w sr,-(a7) * Preserve status register
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| 495 | ori.w #$IPL7,sr * DISABLE INTERRUPTS
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| 496 | *
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| 497 | lea nulsiox,a0 * Get null return address
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| 498 | move.l a0,_foot1 * Initialize foot1 vector
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| 499 | move.l a0,_foot2 * Initialize foot2 vector
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| 500 | move.l a0,_pulse1 * Initialize pulse1 vector
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| 501 | move.l a0,_pulse2 * Initialize pulse2 vector
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| 502 | *
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| 503 | lea SR1ACIA,a1 * Point at Serial-1 ACIA
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| 504 | move.b #$90,ACIA_IER(a1) * Enable DCD interrupts
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| 505 | *
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| 506 | lea SR2ACIA,a1 * Point at Serial-2 ACIA
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| 507 | move.b #$90,ACIA_IER(a1) * Enable DCD interrupts
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| 508 | *
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| 509 | lea MC1ACIA,a1 * Point at MIDI-1 ACIA
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| 510 | move.b #$90,ACIA_IER(a1) * Enable DCD interrupts
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| 511 | *
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| 512 | lea MC2ACIA,a1 * Point at MIDI-2 ACIA
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| 513 | move.b #$90,ACIA_IER(a1) * Enable DCD interrupts
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| 514 | *
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| 515 | lea serintr,a0 * Initialize interrupt vector
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| 516 | move.l a0,SERVECT * ... in processor RAM
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| 517 | *
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| 518 | move.w (a7)+,sr * RESTORE INTERRUPTS
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| 519 | *
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| 520 | nulsiox: rts * Return to caller
|
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| 521 | *
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| 522 | .bss
|
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| 523 | *
|
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| 524 | * DCD interrupt processor vectors
|
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| 525 | * -------------------------------
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| 526 | _foot1: .ds.l 1 * short (*foot1)();
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| 527 | _foot2: .ds.l 1 * short (*foot2)();
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| 528 | _pulse1: .ds.l 1 * short (*pulse1)();
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| 529 | _pulse2: .ds.l 1 * short (*pulse2)();
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| 530 | *
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| 531 | .end
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