1 | /*
|
---|
2 | =============================================================================
|
---|
3 | patch.h -- MIDAS-VII Patch facility definitions
|
---|
4 | Version 22 -- 1988-12-02 -- D.N. Lynx Crowe
|
---|
5 | =============================================================================
|
---|
6 | */
|
---|
7 |
|
---|
8 | #define MAXPATCH 256 /* patch table size */
|
---|
9 | #define RAWDEFS 256 /* def table size */
|
---|
10 |
|
---|
11 | #define NSLINES 1000 /* sequence table size */
|
---|
12 | #define NSEQW 7 /* number of words in a seqent */
|
---|
13 |
|
---|
14 | #define SEQTIME 10 /* milliseconds per tick */
|
---|
15 |
|
---|
16 | #define DATAROW 9 /* data entry row */
|
---|
17 |
|
---|
18 | #define NDEFSTMS 5120 /* number of stms/defs */
|
---|
19 | #define NPTEQELS 256 /* number of trigger fifo entries */
|
---|
20 |
|
---|
21 | #define NPTEQLO (NPTEQELS >> 2) /* trigger fifo lo water */
|
---|
22 | #define NPTEQHI (NPTEQELS - NPTEQLO) /* trigger fifo hi water */
|
---|
23 |
|
---|
24 | #define NULL_DEF 0x1200 /* blank definer code */
|
---|
25 |
|
---|
26 | #define ADR_MASK 0x00FF /* patch / defent table index mask */
|
---|
27 | #define TRG_MASK 0x1FFF /* trigger mask */
|
---|
28 | #define PE_SPEC 0x00FF /* destination mask */
|
---|
29 | #define PE_TBIT 0x8000 /* DEF triggered bit */
|
---|
30 |
|
---|
31 | /* |
---|
32 |
|
---|
33 | */
|
---|
34 |
|
---|
35 | /* Patch structure definitions */
|
---|
36 |
|
---|
37 | struct patch { /* patch table entry (16 bytes per entry) */
|
---|
38 |
|
---|
39 | unsigned short nextstm; /* index of next entry in stm chain */
|
---|
40 | unsigned short prevstm; /* index of previous entry in stm chain */
|
---|
41 | unsigned short defnum; /* definer */
|
---|
42 | unsigned short stmnum; /* stimulus */
|
---|
43 | unsigned short paspec; /* destination type and flags */
|
---|
44 | unsigned short pasuba; /* sub-address */
|
---|
45 | unsigned short padat1; /* data word 1 */
|
---|
46 | unsigned short padat2; /* data word 2 */
|
---|
47 | };
|
---|
48 |
|
---|
49 | struct defent { /* definition table entry -- 10 bytes per entry */
|
---|
50 |
|
---|
51 | unsigned short nextdef; /* index of next in def chain */
|
---|
52 | unsigned short stm; /* stimulus */
|
---|
53 | unsigned short adspec; /* destination type */
|
---|
54 | unsigned short adsuba; /* sub-address */
|
---|
55 | unsigned short addat1; /* data word 1 */
|
---|
56 | };
|
---|
57 |
|
---|
58 |
|
---|
59 | /* Sequence structure definitions */
|
---|
60 |
|
---|
61 | struct seqent { /* sequence table entry -- 14 bytes per entry */
|
---|
62 |
|
---|
63 | unsigned short seqtime; /* time */
|
---|
64 | unsigned short seqact1; /* action 1 */
|
---|
65 | unsigned short seqdat1; /* action 1 data */
|
---|
66 | unsigned short seqact2; /* action 2 */
|
---|
67 | unsigned short seqdat2; /* action 2 data */
|
---|
68 | unsigned short seqact3; /* action 3 */
|
---|
69 | unsigned short seqdat3; /* action 3 data */
|
---|
70 | };
|
---|
71 |
|
---|
72 | /* |
---|
73 |
|
---|
74 | */
|
---|
75 |
|
---|
76 | /* Patch table references */
|
---|
77 |
|
---|
78 | #ifndef PATCHDEF
|
---|
79 | extern char stmptr[]; /* stimulus pointer table */
|
---|
80 | extern char defptr[]; /* definition pointer table */
|
---|
81 |
|
---|
82 | extern struct patch patches[]; /* patch table */
|
---|
83 |
|
---|
84 | extern struct defent defents[]; /* definition control table */
|
---|
85 | #endif
|
---|
86 |
|
---|
87 |
|
---|
88 | /* Sequence table references */
|
---|
89 |
|
---|
90 | #ifndef SEQDEFS
|
---|
91 | extern struct seqent seqtab[]; /* sequence table */
|
---|
92 |
|
---|
93 | extern unsigned short seqflag[16]; /* sequence flags */
|
---|
94 | extern unsigned short seqline[16]; /* sequence line */
|
---|
95 | extern unsigned short seqstim[16]; /* sequence stimulus */
|
---|
96 | extern unsigned short seqtime[16]; /* sequence timers */
|
---|
97 | extern unsigned short sregval[16]; /* register values */
|
---|
98 | extern unsigned short trstate[16]; /* trigger states */
|
---|
99 |
|
---|
100 | #endif
|
---|
101 |
|
---|
102 | /* |
---|
103 |
|
---|
104 | */
|
---|
105 |
|
---|
106 | /* Patch destination types */
|
---|
107 |
|
---|
108 | #define PA_KEY 1
|
---|
109 | #define PA_TRG 2
|
---|
110 | #define PA_PLS 3
|
---|
111 | #define PA_LED 4
|
---|
112 | #define PA_SLIN 5
|
---|
113 | #define PA_SCTL 6
|
---|
114 | #define PA_TUNE 7
|
---|
115 | #define PA_RSET 8
|
---|
116 | #define PA_RADD 9
|
---|
117 | #define PA_INST 10
|
---|
118 | #define PA_OSC 11
|
---|
119 | #define PA_WAVA 12
|
---|
120 | #define PA_WAVB 13
|
---|
121 | #define PA_CNFG 14
|
---|
122 | #define PA_LEVL 15
|
---|
123 | #define PA_INDX 16
|
---|
124 | #define PA_FREQ 17
|
---|
125 | #define PA_FILT 18
|
---|
126 | #define PA_FILQ 19
|
---|
127 | #define PA_LOCN 20
|
---|
128 | #define PA_DYNM 21
|
---|
129 | #define PA_AUX 22
|
---|
130 | #define PA_RATE 23
|
---|
131 | #define PA_INTN 24
|
---|
132 | #define PA_DPTH 25
|
---|
133 | #define PA_VOUT 26
|
---|
134 |
|
---|
135 | /* Patch sub-address types */
|
---|
136 |
|
---|
137 | #define PSA_SRC 0
|
---|
138 | #define PSA_MLT 1
|
---|
139 | #define PSA_TIM 2
|
---|
140 | #define PSA_VAL 3
|
---|
141 | #define PSA_FNC 4
|
---|
142 |
|
---|
143 | /* Patch oscillator data types */
|
---|
144 |
|
---|
145 | #define PSO_INT 0
|
---|
146 | #define PSO_RAT 1
|
---|
147 | #define PSO_FRQ 2
|
---|
148 | #define PSO_PCH 3
|
---|
149 |
|
---|
150 | /* |
---|
151 |
|
---|
152 | */
|
---|
153 |
|
---|
154 | /* Sequence control flags */
|
---|
155 |
|
---|
156 | #define SQF_RUN 0x8000 /* RUN state */
|
---|
157 | #define SQF_CLK 0x4000 /* CLK state */
|
---|
158 |
|
---|
159 | /* Sequence action word masks */
|
---|
160 |
|
---|
161 | #define SQ_MACT 0x00FF /* ACT -- action mask */
|
---|
162 | #define SQ_MOBJ 0xFF00 /* ACT -- object mask */
|
---|
163 |
|
---|
164 | /* Sequence action types */
|
---|
165 |
|
---|
166 | #define SQ_NULL 0x0000 /* NULL action */
|
---|
167 |
|
---|
168 | #define SQ_CKEY 0x0001 /* Key closure */
|
---|
169 | #define SQ_RKEY 0x0002 /* Key release */
|
---|
170 | #define SQ_TKEY 0x0003 /* Key transient */
|
---|
171 | #define SQ_IKEY 0x0004 /* If key active */
|
---|
172 |
|
---|
173 | #define SQ_STRG 0x0005 /* Trigger on */
|
---|
174 | #define SQ_CTRG 0x0006 /* Trigger off */
|
---|
175 | #define SQ_TTRG 0x0007 /* Trigger toggle */
|
---|
176 | #define SQ_ITRG 0x0008 /* If trigger active */
|
---|
177 |
|
---|
178 | #define SQ_SREG 0x0009 /* Set register */
|
---|
179 | #define SQ_IREQ 0x000A /* If register = */
|
---|
180 | #define SQ_IRLT 0x000B /* If register < */
|
---|
181 | #define SQ_IRGT 0x000C /* If register > */
|
---|
182 |
|
---|
183 | #define SQ_ISTM 0x000D /* If stimulus active */
|
---|
184 | #define SQ_JUMP 0x000E /* Jump to sequence line */
|
---|
185 | #define SQ_STOP 0x000F /* Stop sequence */
|
---|
186 |
|
---|
187 | #define SQ_AREG 0x0010 /* Increment register */
|
---|
188 |
|
---|
189 | /* Sequence data word masks */
|
---|
190 |
|
---|
191 | #define SQ_MFLG 0xF000 /* DAT -- flag mask */
|
---|
192 | #define SQ_MTYP 0x0F00 /* DAT -- data type mask */
|
---|
193 | #define SQ_MVAL 0x00FF /* DAT -- data value mask */
|
---|
194 |
|
---|
195 | /* Sequence data types */
|
---|
196 |
|
---|
197 | #define SQ_REG 0x0000 /* register */
|
---|
198 | #define SQ_VAL 0x0100 /* value */
|
---|
199 | #define SQ_VLT 0x0200 /* voltage */
|
---|
200 | #define SQ_RND 0x0300 /* random */
|
---|