source: buchla-68k/vlib/vhinit.c@ 0170798

Last change on this file since 0170798 was b28a12e, checked in by Thomas Lopatic <thomas@…>, 7 years ago

Zero redundant declarations.

  • Property mode set to 100644
File size: 2.7 KB
Line 
1/*
2 =============================================================================
3 vhinit.c -- initialize VSDD hardware
4 Version 17 -- 1988-03-20 -- D.N. Lynx Crowe
5 (c) Copyright 1987, 1988 -- D.N. Lynx Crowe
6
7 VHinit()
8
9 Setup VSDD registers, clear access table, clear object table,
10 load character generator, set color lookup table defaults.
11 Defines major video system variables, since the linker isn't
12 smart enough to let me put them in a separate file.
13 =============================================================================
14*/
15
16#define FASTCHIP 1 /* non-zero if it's the fast VSDD chip */
17
18#include "ram.h"
19
20#define VREG(h,v) ((h<<10)|v)
21
22struct octent v_obtab[16]; /* object control table */
23
24struct octent *v_curob; /* current v_obtab pointer */
25
26int16_t v_nobj; /* current object number */
27int16_t v_obpri; /* current object priority */
28
29/*
30 */
31
32/* initialized variables */
33
34int16_t vr_data[] = {
35
36 0x825B, /* R0 -- Mode word 0 */
37 0xC474, /* R1 -- Mode word 1 */
38 0x0006, /* R2 -- Register window base, Control flags */
39 0x0100, /* R3 -- Data window base, X limit (0x200000) */
40 0x0000, /* R4 -- Data length mask (128K) */
41 0x0000, /* R5 -- Data segment base (0x000000) */
42 0x0001, /* R6 -- Priority access count (1) */
43 0x0040, /* R7 -- Object Descriptor Table base (0x200080) */
44 0x0080, /* R8 -- Access Table base (0x200100) */
45 0x0010, /* R9 -- Color Lookup Table base (0x200020) */
46 0x00FF, /* R10 -- Character Generator bases (0x21E000) */
47 0x0000, /* R11 -- Access Table address counter */
48
49#if FASTCHIP
50 VREG( 3, 8), /* R12 -- HC0 (HSYNC width) VC0 (VSYNC width) */
51 VREG( 5, 10), /* R13 -- HC1 (AHZ start) VC1 (AVZ start) */
52 VREG(37, 360), /* R14 -- HC2 (AHZ stop) VC2 (AVZ stop) */
53 VREG(40, 362) /* R15 -- HC3 (HOR sweep) VC3 (VRT sweep) */
54#else
55 VREG( 3, 8), /* R12 -- HC0 (HSYNC width) VC0 (VSYNC width) */
56 VREG( 6, 10), /* R13 -- HC1 (AHZ start) VC1 (AVZ start) */
57 VREG(38, 360), /* R14 -- HC2 (AHZ stop) VC2 (AVZ stop) */
58 VREG(43, 361) /* R15 -- HC3 (HOR sweep) VC3 (VRT sweep) */
59#endif
60};
61
62/*
63 */
64
65/*
66 =============================================================================
67 VHinit() -- initialize the VSDD
68 =============================================================================
69*/
70
71void VHinit(void)
72{
73
74 /* select VSDD RAM bank 0 so we can access the control tables */
75
76 vbank(0);
77
78 /* set the video register values */
79
80 memcpyw(v_regs, vr_data, 16);
81
82 /* clear the access table to turn off all objects */
83
84 memsetw(v_actab, 0xFFFF, 350);
85
86 /* clear the object table */
87
88 memsetw(v_odtab, 0, 64);
89
90 /* move the character generator table to VSDD RAM */
91
92 memsetw(v_cgtab, 0, 4096);
93 memcpyw(v_cgtab, cgtable, 256 * cg_rows);
94}
95
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