Changeset b28a12e in buchla-68k for vlib/vhinit.c

Timestamp:

07/10/2017 02:17:49 PM (7 years ago)

Author:

Thomas Lopatic <thomas@…>

Branches:

master

Children:

06f6615

Parents:

39a696b

Message:

Zero redundant declarations.

File:

• vlib/vhinit.c (modified) (1 diff)

vlib/vhinit.c

@@ -16 +16 @@
 #define FASTCHIP        1       /* non-zero if it's the fast VSDD chip */
 
-#include "all.h"
+#include "ram.h"
 
 #define VREG(h,v)       ((h<<10)|v)
-
-extern  int16_t cgtable[][256];
-extern  int16_t cg_rows;
 
 struct octent   v_obtab[16];    /* object control table */