[a06aa8b] | 1 | /*
|
---|
| 2 | * Copyright (C) 2017 The Contributors
|
---|
| 3 | *
|
---|
| 4 | * This program is free software: you can redistribute it and/or modify
|
---|
| 5 | * it under the terms of the GNU General Public License as published by
|
---|
| 6 | * the Free Software Foundation, either version 3 of the License, or (at
|
---|
| 7 | * your option) any later version.
|
---|
| 8 | *
|
---|
| 9 | * This program is distributed in the hope that it will be useful, but
|
---|
| 10 | * WITHOUT ANY WARRANTY; without even the implied warranty of
|
---|
| 11 | * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
|
---|
| 12 | * General Public License for more details.
|
---|
| 13 | *
|
---|
| 14 | * A copy of the GNU General Public License can be found in the file
|
---|
[2147e53] | 15 | * "gpl.txt" in the top directory of this repository.
|
---|
[a06aa8b] | 16 | */
|
---|
| 17 |
|
---|
[ff8d800] | 18 | #include <all.h>
|
---|
| 19 |
|
---|
[4c71d39] | 20 | #define ver(...) _ver(cpu_verbose, 0, __VA_ARGS__)
|
---|
| 21 | #define ver2(...) _ver(cpu_verbose, 1, __VA_ARGS__)
|
---|
| 22 | #define ver3(...) _ver(cpu_verbose, 2, __VA_ARGS__)
|
---|
[ff8d800] | 23 |
|
---|
[4c71d39] | 24 | int32_t cpu_verbose = 0;
|
---|
[a06aa8b] | 25 |
|
---|
[ebc8f69] | 26 | #define CPU_FREQ 7000000
|
---|
| 27 | #define PER_SEC 100000
|
---|
[ff8d800] | 28 |
|
---|
[555b171] | 29 | #define APP_START 0x10000
|
---|
[ba36b71] | 30 |
|
---|
[a06aa8b] | 31 | #define RAM_START 0x0
|
---|
| 32 | #define RAM_SIZE 0x100000
|
---|
| 33 |
|
---|
| 34 | #define ROM_START 0x100000
|
---|
| 35 | #define ROM_SIZE 0x10000
|
---|
| 36 |
|
---|
| 37 | typedef void (*hw_init_t)(void);
|
---|
| 38 | typedef void (*hw_quit_t)(void);
|
---|
| 39 | typedef void (*hw_exec_t)(void);
|
---|
| 40 | typedef uint32_t (*hw_read_t)(uint32_t off, int32_t sz);
|
---|
| 41 | typedef void (*hw_write_t)(uint32_t off, int32_t sz, uint32_t val);
|
---|
| 42 |
|
---|
| 43 | typedef struct {
|
---|
| 44 | uint32_t addr_beg;
|
---|
| 45 | uint32_t addr_end;
|
---|
| 46 | hw_init_t init;
|
---|
| 47 | hw_quit_t quit;
|
---|
| 48 | hw_exec_t exec;
|
---|
| 49 | hw_read_t read;
|
---|
| 50 | hw_write_t write;
|
---|
| 51 | } hw_t;
|
---|
[ff8d800] | 52 |
|
---|
| 53 | static bool reset = true;
|
---|
| 54 |
|
---|
[a06aa8b] | 55 | static uint8_t ram_data[RAM_SIZE];
|
---|
| 56 | static uint8_t rom_data[ROM_SIZE];
|
---|
| 57 |
|
---|
[ba36b71] | 58 | static uint32_t ram_ro_beg = 0x1234;
|
---|
| 59 | static uint32_t ram_ro_end = 0x1234;
|
---|
| 60 | static uint32_t ram_rw_beg = 0x1234;
|
---|
| 61 | static uint32_t ram_rw_end = 0x1234;
|
---|
[a06aa8b] | 62 |
|
---|
[ba36b71] | 63 | static uint32_t rom_ro_beg;
|
---|
| 64 | static uint32_t rom_ro_end;
|
---|
| 65 | static uint32_t rom_rw_beg;
|
---|
| 66 | static uint32_t rom_rw_end;
|
---|
[a06aa8b] | 67 |
|
---|
| 68 | static hw_t hw_map[] = {
|
---|
| 69 | { 0x180000, 0x200000, fpu_init, fpu_quit, fpu_exec, fpu_read, fpu_write },
|
---|
| 70 | { 0x200000, 0x280000, vid_init, vid_quit, vid_exec, vid_read, vid_write },
|
---|
| 71 | { 0x3a0001, 0x3a4001, tim_init, tim_quit, tim_exec, tim_read, tim_write },
|
---|
| 72 | { 0x3a4001, 0x3a8001, lcd_init, lcd_quit, lcd_exec, lcd_read, lcd_write },
|
---|
| 73 | { 0x3a8001, 0x3ac001, ser_init, ser_quit, ser_exec, ser_read, ser_write },
|
---|
| 74 | { 0x3ac001, 0x3b0001, mid_init, mid_quit, mid_exec, mid_read, mid_write },
|
---|
| 75 | { 0x3b0001, 0x3b4001, fdd_init, fdd_quit, fdd_exec, fdd_read, fdd_write },
|
---|
| 76 | { 0x3b4001, 0x3b8001, snd_init, snd_quit, snd_exec, snd_read, snd_write },
|
---|
| 77 | { 0x3b8001, 0x3bc001, led_init, led_quit, led_exec, led_read, led_write },
|
---|
| 78 | { 0x3bc001, 0x3c0001, kbd_init, kbd_quit, kbd_exec, kbd_read, kbd_write }
|
---|
| 79 | };
|
---|
| 80 |
|
---|
| 81 | static hw_t *hw_by_addr(uint32_t addr)
|
---|
| 82 | {
|
---|
| 83 | for (int32_t i = 0; i < ARRAY_COUNT(hw_map); ++i) {
|
---|
| 84 | if (addr >= hw_map[i].addr_beg && addr < hw_map[i].addr_end) {
|
---|
| 85 | return hw_map + i;
|
---|
| 86 | }
|
---|
| 87 | }
|
---|
| 88 |
|
---|
| 89 | return NULL;
|
---|
| 90 | }
|
---|
| 91 |
|
---|
| 92 | static void hw_init(void)
|
---|
| 93 | {
|
---|
[ba36b71] | 94 | inf("initializing hardware");
|
---|
[b909777] | 95 |
|
---|
[a06aa8b] | 96 | for (int32_t i = 0; i < ARRAY_COUNT(hw_map); ++i) {
|
---|
| 97 | hw_map[i].init();
|
---|
| 98 | }
|
---|
| 99 | }
|
---|
| 100 |
|
---|
| 101 | static void hw_exec(void)
|
---|
| 102 | {
|
---|
| 103 | for (int32_t i = 0; i < ARRAY_COUNT(hw_map); ++i) {
|
---|
| 104 | hw_map[i].exec();
|
---|
| 105 | }
|
---|
| 106 | }
|
---|
| 107 |
|
---|
| 108 | static uint32_t hw_off(hw_t *hw, uint32_t addr)
|
---|
| 109 | {
|
---|
| 110 | if ((hw->addr_beg & 0x1) == 0) {
|
---|
| 111 | return addr - hw->addr_beg;
|
---|
| 112 | }
|
---|
| 113 |
|
---|
| 114 | return (addr - hw->addr_beg) / 2;
|
---|
| 115 | }
|
---|
| 116 |
|
---|
[b909777] | 117 | static void bios_init(const char *bios)
|
---|
| 118 | {
|
---|
[ba36b71] | 119 | inf("loading BIOS file %s", bios);
|
---|
[b909777] | 120 |
|
---|
| 121 | SDL_RWops *ops = SDL_RWFromFile(bios, "rb");
|
---|
| 122 |
|
---|
| 123 | if (ops == NULL) {
|
---|
| 124 | fail("error while opening BIOS file %s", bios);
|
---|
| 125 | }
|
---|
| 126 |
|
---|
| 127 | if (SDL_ReadBE16(ops) != 0x601b) {
|
---|
| 128 | fail("invalid BIOS file %s", bios);
|
---|
| 129 | }
|
---|
| 130 |
|
---|
| 131 | uint32_t text_len = SDL_ReadBE32(ops);
|
---|
| 132 | uint32_t data_len = SDL_ReadBE32(ops);
|
---|
| 133 | uint32_t bss_len = SDL_ReadBE32(ops);
|
---|
| 134 |
|
---|
| 135 | SDL_ReadBE32(ops);
|
---|
| 136 | SDL_ReadBE32(ops);
|
---|
| 137 |
|
---|
| 138 | uint32_t text_loc = SDL_ReadBE32(ops);
|
---|
| 139 |
|
---|
| 140 | SDL_ReadBE16(ops);
|
---|
| 141 |
|
---|
| 142 | uint32_t data_loc = SDL_ReadBE32(ops);
|
---|
| 143 | uint32_t bss_loc = SDL_ReadBE32(ops);
|
---|
| 144 |
|
---|
[ba36b71] | 145 | inf("BIOS text 0x%x:0x%x data 0x%x:0x%x bss 0x%x:0x%x",
|
---|
| 146 | text_loc, text_len, data_loc, data_len, bss_loc, bss_len);
|
---|
[b909777] | 147 |
|
---|
| 148 | size_t load_len = (size_t)SDL_RWsize(ops) - 36;
|
---|
| 149 |
|
---|
[ba36b71] | 150 | if (text_loc != ROM_START || text_loc + text_len != data_loc ||
|
---|
| 151 | load_len != text_len + data_len || load_len > ROM_SIZE) {
|
---|
| 152 | fail("invalid BIOS file %s", bios);
|
---|
[b909777] | 153 | }
|
---|
| 154 |
|
---|
| 155 | size_t loaded = 0;
|
---|
| 156 |
|
---|
| 157 | while (loaded < load_len) {
|
---|
| 158 | size_t n_rd = SDL_RWread(ops, rom_data + loaded, 1, load_len - loaded);
|
---|
| 159 |
|
---|
| 160 | if (n_rd == 0) {
|
---|
| 161 | fail("error while reading BIOS file %s", bios);
|
---|
| 162 | }
|
---|
| 163 |
|
---|
| 164 | loaded += n_rd;
|
---|
| 165 | }
|
---|
| 166 |
|
---|
| 167 | SDL_RWclose(ops);
|
---|
[ba36b71] | 168 |
|
---|
| 169 | rom_ro_beg = text_loc;
|
---|
| 170 | rom_ro_end = text_loc + text_len + data_len;
|
---|
| 171 | rom_rw_beg = bss_loc;
|
---|
| 172 | rom_rw_end = bss_loc + bss_len;
|
---|
| 173 |
|
---|
| 174 | ver("rom_ro_beg 0x%08x rom_ro_end 0x%08x", rom_ro_beg, rom_ro_end);
|
---|
| 175 | ver("rom_rw_beg 0x%08x rom_rw_end 0x%08x", rom_rw_beg, rom_rw_end);
|
---|
[b909777] | 176 | }
|
---|
| 177 |
|
---|
[ff8d800] | 178 | uint32_t m68k_read_disassembler_8(uint32_t addr)
|
---|
| 179 | {
|
---|
[a06aa8b] | 180 | return m68k_read_memory_8(addr);
|
---|
[ff8d800] | 181 | }
|
---|
| 182 |
|
---|
| 183 | uint32_t m68k_read_disassembler_16(uint32_t addr)
|
---|
| 184 | {
|
---|
[a06aa8b] | 185 | return m68k_read_memory_16(addr);
|
---|
[ff8d800] | 186 | }
|
---|
| 187 |
|
---|
| 188 | uint32_t m68k_read_disassembler_32(uint32_t addr)
|
---|
| 189 | {
|
---|
[a06aa8b] | 190 | return m68k_read_memory_32(addr);
|
---|
[ff8d800] | 191 | }
|
---|
| 192 |
|
---|
| 193 | uint32_t m68k_read_memory_8(uint32_t addr)
|
---|
| 194 | {
|
---|
[4c71d39] | 195 | ver3("mem rd 0x%08x:8", addr);
|
---|
[a06aa8b] | 196 |
|
---|
[ba36b71] | 197 | if (addr >= ram_ro_beg && addr <= ram_ro_end - 1) {
|
---|
| 198 | return ram_data[addr - RAM_START];
|
---|
| 199 | }
|
---|
| 200 |
|
---|
| 201 | if (addr >= ram_rw_beg && addr <= ram_rw_end - 1) {
|
---|
[a06aa8b] | 202 | return ram_data[addr - RAM_START];
|
---|
| 203 | }
|
---|
| 204 |
|
---|
[ba36b71] | 205 | if (addr >= rom_ro_beg && addr <= rom_ro_end - 1) {
|
---|
[a06aa8b] | 206 | return rom_data[addr - ROM_START];
|
---|
| 207 | }
|
---|
| 208 |
|
---|
[ba36b71] | 209 | if (addr >= rom_rw_beg && addr <= rom_rw_end - 1) {
|
---|
| 210 | // ROM has its BSS section in RAM.
|
---|
| 211 | return ram_data[addr - RAM_START];
|
---|
| 212 | }
|
---|
| 213 |
|
---|
[a06aa8b] | 214 | hw_t *hw = hw_by_addr(addr);
|
---|
| 215 |
|
---|
| 216 | if (hw != NULL) {
|
---|
| 217 | return hw->read(hw_off(hw, addr), 1);
|
---|
| 218 | }
|
---|
| 219 |
|
---|
[555b171] | 220 | if (addr <= APP_START - 1) {
|
---|
[ba36b71] | 221 | return ram_data[addr];
|
---|
| 222 | }
|
---|
| 223 |
|
---|
[a06aa8b] | 224 | fail("invalid read 0x%08x:8", addr);
|
---|
[ff8d800] | 225 | }
|
---|
| 226 |
|
---|
| 227 | uint32_t m68k_read_memory_16(uint32_t addr)
|
---|
| 228 | {
|
---|
[4c71d39] | 229 | ver3("mem rd 0x%08x:16", addr);
|
---|
[ff8d800] | 230 |
|
---|
[ba36b71] | 231 | if (addr >= ram_ro_beg && addr <= ram_ro_end - 2) {
|
---|
| 232 | return
|
---|
| 233 | ((uint32_t)ram_data[addr - RAM_START + 0] << 8) |
|
---|
| 234 | ((uint32_t)ram_data[addr - RAM_START + 1] << 0);
|
---|
| 235 | }
|
---|
| 236 |
|
---|
| 237 | if (addr >= ram_rw_beg && addr <= ram_rw_end - 2) {
|
---|
[a06aa8b] | 238 | return
|
---|
| 239 | ((uint32_t)ram_data[addr - RAM_START + 0] << 8) |
|
---|
| 240 | ((uint32_t)ram_data[addr - RAM_START + 1] << 0);
|
---|
| 241 | }
|
---|
| 242 |
|
---|
[ba36b71] | 243 | if (addr >= rom_ro_beg && addr <= rom_ro_end - 2) {
|
---|
[a06aa8b] | 244 | return
|
---|
| 245 | ((uint32_t)rom_data[addr - ROM_START + 0] << 8) |
|
---|
| 246 | ((uint32_t)rom_data[addr - ROM_START + 1] << 0);
|
---|
[ff8d800] | 247 | }
|
---|
| 248 |
|
---|
[ba36b71] | 249 | if (addr >= rom_rw_beg && addr <= rom_rw_end - 2) {
|
---|
| 250 | // ROM has its BSS section in RAM.
|
---|
| 251 | return
|
---|
| 252 | ((uint32_t)ram_data[addr - RAM_START + 0] << 8) |
|
---|
| 253 | ((uint32_t)ram_data[addr - RAM_START + 1] << 0);
|
---|
| 254 | }
|
---|
| 255 |
|
---|
[a06aa8b] | 256 | hw_t *hw = hw_by_addr(addr);
|
---|
| 257 |
|
---|
| 258 | if (hw != NULL) {
|
---|
| 259 | return hw->read(hw_off(hw, addr), 2);
|
---|
[ff8d800] | 260 | }
|
---|
| 261 |
|
---|
[555b171] | 262 | if (addr <= APP_START - 2) {
|
---|
[ba36b71] | 263 | return
|
---|
[9674f1a] | 264 | ((uint32_t)ram_data[addr + 0] << 8) |
|
---|
| 265 | ((uint32_t)ram_data[addr + 1] << 0);
|
---|
[ba36b71] | 266 | }
|
---|
| 267 |
|
---|
[a06aa8b] | 268 | fail("invalid read 0x%08x:16", addr);
|
---|
[ff8d800] | 269 | }
|
---|
| 270 |
|
---|
| 271 | uint32_t m68k_read_memory_32(uint32_t addr)
|
---|
| 272 | {
|
---|
[4c71d39] | 273 | ver3("mem rd 0x%08x:32", addr);
|
---|
[ff8d800] | 274 |
|
---|
| 275 | if (reset) {
|
---|
| 276 | if (addr == 0) {
|
---|
[b909777] | 277 | addr += ROM_START;
|
---|
[ff8d800] | 278 | }
|
---|
[b909777] | 279 | else if (addr == 4) {
|
---|
| 280 | addr += ROM_START;
|
---|
[ff8d800] | 281 | reset = false;
|
---|
| 282 | }
|
---|
[b909777] | 283 | else {
|
---|
| 284 | fail("invalid reset sequence");
|
---|
| 285 | }
|
---|
[ff8d800] | 286 | }
|
---|
| 287 |
|
---|
[ba36b71] | 288 | if (addr >= ram_ro_beg && addr <= ram_ro_end - 4) {
|
---|
[a06aa8b] | 289 | return
|
---|
| 290 | ((uint32_t)ram_data[addr - RAM_START + 0] << 24) |
|
---|
| 291 | ((uint32_t)ram_data[addr - RAM_START + 1] << 16) |
|
---|
| 292 | ((uint32_t)ram_data[addr - RAM_START + 2] << 8) |
|
---|
| 293 | ((uint32_t)ram_data[addr - RAM_START + 3] << 0);
|
---|
| 294 | }
|
---|
| 295 |
|
---|
[ba36b71] | 296 | if (addr >= ram_rw_beg && addr <= ram_rw_end - 4) {
|
---|
| 297 | return
|
---|
| 298 | ((uint32_t)ram_data[addr - RAM_START + 0] << 24) |
|
---|
| 299 | ((uint32_t)ram_data[addr - RAM_START + 1] << 16) |
|
---|
| 300 | ((uint32_t)ram_data[addr - RAM_START + 2] << 8) |
|
---|
| 301 | ((uint32_t)ram_data[addr - RAM_START + 3] << 0);
|
---|
| 302 | }
|
---|
| 303 |
|
---|
| 304 | if (addr >= rom_ro_beg && addr <= rom_ro_end - 4) {
|
---|
[a06aa8b] | 305 | return
|
---|
| 306 | ((uint32_t)rom_data[addr - ROM_START + 0] << 24) |
|
---|
| 307 | ((uint32_t)rom_data[addr - ROM_START + 1] << 16) |
|
---|
| 308 | ((uint32_t)rom_data[addr - ROM_START + 2] << 8) |
|
---|
| 309 | ((uint32_t)rom_data[addr - ROM_START + 3] << 0);
|
---|
| 310 | }
|
---|
| 311 |
|
---|
[ba36b71] | 312 | if (addr >= rom_rw_beg && addr <= rom_rw_end - 4) {
|
---|
| 313 | // ROM has its BSS section in RAM.
|
---|
| 314 | return
|
---|
| 315 | ((uint32_t)ram_data[addr - RAM_START + 0] << 24) |
|
---|
| 316 | ((uint32_t)ram_data[addr - RAM_START + 1] << 16) |
|
---|
| 317 | ((uint32_t)ram_data[addr - RAM_START + 2] << 8) |
|
---|
| 318 | ((uint32_t)ram_data[addr - RAM_START + 3] << 0);
|
---|
| 319 | }
|
---|
| 320 |
|
---|
[a06aa8b] | 321 | hw_t *hw = hw_by_addr(addr);
|
---|
| 322 |
|
---|
| 323 | if (hw != NULL) {
|
---|
| 324 | return hw->read(hw_off(hw, addr), 4);
|
---|
| 325 | }
|
---|
| 326 |
|
---|
[555b171] | 327 | if (addr <= APP_START - 4) {
|
---|
[ba36b71] | 328 | return
|
---|
| 329 | ((uint32_t)ram_data[addr + 0] << 24) |
|
---|
| 330 | ((uint32_t)ram_data[addr + 1] << 16) |
|
---|
| 331 | ((uint32_t)ram_data[addr + 2] << 8) |
|
---|
| 332 | ((uint32_t)ram_data[addr + 3] << 0);
|
---|
| 333 | }
|
---|
| 334 |
|
---|
[a06aa8b] | 335 | fail("invalid read 0x%08x:32", addr);
|
---|
[ff8d800] | 336 | }
|
---|
| 337 |
|
---|
| 338 | void m68k_write_memory_8(uint32_t addr, uint32_t val)
|
---|
| 339 | {
|
---|
[4c71d39] | 340 | ver3("mem wr 0x%08x:8 0x%02x", addr, val);
|
---|
[a06aa8b] | 341 |
|
---|
[ba36b71] | 342 | if (addr >= ram_rw_beg && addr <= ram_rw_end - 1) {
|
---|
[a06aa8b] | 343 | ram_data[addr - RAM_START] = (uint8_t)val;
|
---|
| 344 | return;
|
---|
| 345 | }
|
---|
| 346 |
|
---|
[ba36b71] | 347 | if (addr >= rom_rw_beg && addr <= rom_rw_end - 1) {
|
---|
[a06aa8b] | 348 | // ROM has its BSS section in RAM.
|
---|
| 349 | ram_data[addr - RAM_START] = (uint8_t)val;
|
---|
| 350 | return;
|
---|
| 351 | }
|
---|
| 352 |
|
---|
| 353 | hw_t *hw = hw_by_addr(addr);
|
---|
| 354 |
|
---|
| 355 | if (hw != NULL) {
|
---|
| 356 | hw->write(hw_off(hw, addr), 1, val);
|
---|
| 357 | return;
|
---|
| 358 | }
|
---|
| 359 |
|
---|
[555b171] | 360 | if (addr <= APP_START - 1) {
|
---|
[ba36b71] | 361 | ram_data[addr] = (uint8_t)val;
|
---|
| 362 | return;
|
---|
| 363 | }
|
---|
| 364 |
|
---|
[a06aa8b] | 365 | fail("invalid write 0x%08x:8 0x%02x", addr, val);
|
---|
[ff8d800] | 366 | }
|
---|
| 367 |
|
---|
| 368 | void m68k_write_memory_16(uint32_t addr, uint32_t val)
|
---|
| 369 | {
|
---|
[4c71d39] | 370 | ver3("mem wr 0x%08x:16 0x%04x", addr, val);
|
---|
[a06aa8b] | 371 |
|
---|
[ba36b71] | 372 | if (addr >= ram_rw_beg && addr <= ram_rw_end - 2) {
|
---|
[a06aa8b] | 373 | ram_data[addr - RAM_START + 0] = (uint8_t)(val >> 8);
|
---|
| 374 | ram_data[addr - RAM_START + 1] = (uint8_t)(val >> 0);
|
---|
| 375 | return;
|
---|
| 376 | }
|
---|
| 377 |
|
---|
[ba36b71] | 378 | if (addr >= rom_rw_beg && addr <= rom_rw_end - 2) {
|
---|
[a06aa8b] | 379 | // ROM has its BSS section in RAM.
|
---|
| 380 | ram_data[addr - RAM_START + 0] = (uint8_t)(val >> 8);
|
---|
| 381 | ram_data[addr - RAM_START + 1] = (uint8_t)(val >> 0);
|
---|
| 382 | return;
|
---|
| 383 | }
|
---|
| 384 |
|
---|
| 385 | hw_t *hw = hw_by_addr(addr);
|
---|
| 386 |
|
---|
| 387 | if (hw != NULL) {
|
---|
| 388 | hw->write(hw_off(hw, addr), 2, val);
|
---|
| 389 | return;
|
---|
| 390 | }
|
---|
| 391 |
|
---|
[555b171] | 392 | if (addr <= APP_START - 2) {
|
---|
[ba36b71] | 393 | ram_data[addr + 0] = (uint8_t)(val >> 8);
|
---|
| 394 | ram_data[addr + 1] = (uint8_t)(val >> 0);
|
---|
| 395 | return;
|
---|
| 396 | }
|
---|
| 397 |
|
---|
[a06aa8b] | 398 | fail("invalid write 0x%08x:16 0x%04x", addr, val);
|
---|
[ff8d800] | 399 | }
|
---|
| 400 |
|
---|
| 401 | void m68k_write_memory_32(uint32_t addr, uint32_t val)
|
---|
| 402 | {
|
---|
[4c71d39] | 403 | ver3("mem wr 0x%08x:32 0x%08x", addr, val);
|
---|
[a06aa8b] | 404 |
|
---|
[ba36b71] | 405 | if (addr >= ram_rw_beg && addr <= ram_rw_end - 4) {
|
---|
[a06aa8b] | 406 | ram_data[addr - RAM_START + 0] = (uint8_t)(val >> 24);
|
---|
| 407 | ram_data[addr - RAM_START + 1] = (uint8_t)(val >> 16);
|
---|
| 408 | ram_data[addr - RAM_START + 2] = (uint8_t)(val >> 8);
|
---|
| 409 | ram_data[addr - RAM_START + 3] = (uint8_t)(val >> 0);
|
---|
| 410 | return;
|
---|
| 411 | }
|
---|
| 412 |
|
---|
[ba36b71] | 413 | if (addr >= rom_rw_beg && addr <= rom_rw_end - 4) {
|
---|
[a06aa8b] | 414 | // ROM has its BSS section in RAM.
|
---|
| 415 | ram_data[addr - RAM_START + 0] = (uint8_t)(val >> 24);
|
---|
| 416 | ram_data[addr - RAM_START + 1] = (uint8_t)(val >> 16);
|
---|
| 417 | ram_data[addr - RAM_START + 2] = (uint8_t)(val >> 8);
|
---|
| 418 | ram_data[addr - RAM_START + 3] = (uint8_t)(val >> 0);
|
---|
| 419 | return;
|
---|
| 420 | }
|
---|
| 421 |
|
---|
| 422 | hw_t *hw = hw_by_addr(addr);
|
---|
| 423 |
|
---|
| 424 | if (hw != NULL) {
|
---|
| 425 | hw->write(hw_off(hw, addr), 4, val);
|
---|
| 426 | return;
|
---|
| 427 | }
|
---|
| 428 |
|
---|
[555b171] | 429 | if (addr <= APP_START - 4) {
|
---|
[ba36b71] | 430 | ram_data[addr + 0] = (uint8_t)(val >> 24);
|
---|
| 431 | ram_data[addr + 1] = (uint8_t)(val >> 16);
|
---|
| 432 | ram_data[addr + 2] = (uint8_t)(val >> 8);
|
---|
| 433 | ram_data[addr + 3] = (uint8_t)(val >> 0);
|
---|
| 434 | return;
|
---|
| 435 | }
|
---|
| 436 |
|
---|
[a06aa8b] | 437 | fail("invalid write 0x%08x:32 0x%08x", addr, val);
|
---|
[ff8d800] | 438 | }
|
---|
| 439 |
|
---|
[9674f1a] | 440 | static void inst_cb(void)
|
---|
| 441 | {
|
---|
| 442 | uint32_t pc = m68k_get_reg(NULL, M68K_REG_PC);
|
---|
| 443 | uint32_t op = m68k_read_memory_16(pc);
|
---|
| 444 |
|
---|
| 445 | if (op == 0x4e4d) {
|
---|
| 446 | uint32_t sp = m68k_get_reg(NULL, M68K_REG_SP);
|
---|
| 447 | uint32_t fun = m68k_read_memory_16(sp);
|
---|
| 448 |
|
---|
| 449 | switch (fun) {
|
---|
| 450 | case 1:
|
---|
| 451 | ver2("BIOS B_RDAV %u", m68k_read_memory_16(sp + 2));
|
---|
| 452 | break;
|
---|
| 453 |
|
---|
| 454 | case 2:
|
---|
| 455 | ver2("BIOS B_GETC %u", m68k_read_memory_16(sp + 2));
|
---|
| 456 | break;
|
---|
| 457 |
|
---|
| 458 | case 3:
|
---|
| 459 | ver2("BIOS B_PUTC %u %u",
|
---|
| 460 | m68k_read_memory_16(sp + 2),
|
---|
| 461 | m68k_read_memory_16(sp + 4));
|
---|
| 462 | break;
|
---|
| 463 |
|
---|
| 464 | case 4:
|
---|
| 465 | ver2("BIOS B_RDWR %u 0x%08x %u %u %u",
|
---|
| 466 | m68k_read_memory_16(sp + 2),
|
---|
| 467 | m68k_read_memory_32(sp + 4),
|
---|
| 468 | m68k_read_memory_16(sp + 8),
|
---|
| 469 | m68k_read_memory_16(sp + 10),
|
---|
| 470 | m68k_read_memory_16(sp + 12));
|
---|
| 471 | break;
|
---|
| 472 |
|
---|
| 473 | case 5:
|
---|
| 474 | ver2("BIOS B_SETV %u 0x%08x",
|
---|
| 475 | m68k_read_memory_16(sp + 2),
|
---|
| 476 | m68k_read_memory_32(sp + 4));
|
---|
| 477 | break;
|
---|
| 478 |
|
---|
| 479 | case 7:
|
---|
| 480 | ver2("BIOS B_GBPB %u", m68k_read_memory_16(sp + 2));
|
---|
| 481 | break;
|
---|
| 482 |
|
---|
| 483 | case 8:
|
---|
| 484 | ver2("BIOS B_THRE %u", m68k_read_memory_16(sp + 2));
|
---|
| 485 | break;
|
---|
| 486 |
|
---|
| 487 | case 9:
|
---|
| 488 | ver2("BIOS B_MCHG %u", m68k_read_memory_16(sp + 2));
|
---|
| 489 | break;
|
---|
| 490 |
|
---|
| 491 | case 10:
|
---|
| 492 | ver2("BIOS B_DMAP");
|
---|
| 493 | break;
|
---|
| 494 |
|
---|
| 495 | default:
|
---|
| 496 | fail("invalid function: BIOS %d", fun);
|
---|
| 497 | }
|
---|
| 498 | }
|
---|
| 499 | else if (op == 0x4e4e) {
|
---|
| 500 | uint32_t sp = m68k_get_reg(NULL, M68K_REG_SP);
|
---|
| 501 | uint32_t fun = m68k_read_memory_16(sp);
|
---|
| 502 |
|
---|
| 503 | switch (fun) {
|
---|
| 504 | case 0:
|
---|
| 505 | ver2("XBIOS X_PIOREC %u", m68k_read_memory_16(sp + 2));
|
---|
| 506 | break;
|
---|
| 507 |
|
---|
| 508 | case 1:
|
---|
| 509 | ver2("XBIOS X_SETPRT %u 0x%02x 0x%02x 0x%02x 0x%02x",
|
---|
| 510 | m68k_read_memory_16(sp + 2),
|
---|
| 511 | m68k_read_memory_16(sp + 4),
|
---|
| 512 | m68k_read_memory_16(sp + 6),
|
---|
| 513 | m68k_read_memory_16(sp + 8),
|
---|
| 514 | m68k_read_memory_16(sp + 10));
|
---|
| 515 | break;
|
---|
| 516 |
|
---|
| 517 | case 2:
|
---|
| 518 | ver2("XBIOS X_FLOPRD 0x%08x 0x%08x %u %u %u %u %u",
|
---|
| 519 | m68k_read_memory_32(sp + 2),
|
---|
| 520 | m68k_read_memory_32(sp + 6),
|
---|
| 521 | m68k_read_memory_16(sp + 10),
|
---|
| 522 | m68k_read_memory_16(sp + 12),
|
---|
| 523 | m68k_read_memory_16(sp + 14),
|
---|
| 524 | m68k_read_memory_16(sp + 16),
|
---|
| 525 | m68k_read_memory_16(sp + 18));
|
---|
| 526 | break;
|
---|
| 527 |
|
---|
| 528 | case 3:
|
---|
| 529 | ver2("XBIOS X_FLOPWR 0x%08x 0x%08x %u %u %u %u %u",
|
---|
| 530 | m68k_read_memory_32(sp + 2),
|
---|
| 531 | m68k_read_memory_32(sp + 6),
|
---|
| 532 | m68k_read_memory_16(sp + 10),
|
---|
| 533 | m68k_read_memory_16(sp + 12),
|
---|
| 534 | m68k_read_memory_16(sp + 14),
|
---|
| 535 | m68k_read_memory_16(sp + 16),
|
---|
| 536 | m68k_read_memory_16(sp + 18));
|
---|
| 537 | break;
|
---|
| 538 |
|
---|
| 539 | case 4:
|
---|
| 540 | ver2("XBIOS X_FORMAT 0x%08x 0x%08x %u %u %u %u %u 0x%08x %u",
|
---|
| 541 | m68k_read_memory_32(sp + 2),
|
---|
| 542 | m68k_read_memory_32(sp + 6),
|
---|
| 543 | m68k_read_memory_16(sp + 10),
|
---|
| 544 | m68k_read_memory_16(sp + 12),
|
---|
| 545 | m68k_read_memory_16(sp + 14),
|
---|
| 546 | m68k_read_memory_16(sp + 16),
|
---|
| 547 | m68k_read_memory_16(sp + 18),
|
---|
| 548 | m68k_read_memory_32(sp + 20),
|
---|
| 549 | m68k_read_memory_16(sp + 24));
|
---|
| 550 | break;
|
---|
| 551 |
|
---|
| 552 | case 5:
|
---|
| 553 | ver2("XBIOS X_VERIFY 0x%08x 0x%08x %u %u %u %u %u",
|
---|
| 554 | m68k_read_memory_32(sp + 2),
|
---|
| 555 | m68k_read_memory_32(sp + 6),
|
---|
| 556 | m68k_read_memory_16(sp + 10),
|
---|
| 557 | m68k_read_memory_16(sp + 12),
|
---|
| 558 | m68k_read_memory_16(sp + 14),
|
---|
| 559 | m68k_read_memory_16(sp + 16),
|
---|
| 560 | m68k_read_memory_16(sp + 18));
|
---|
| 561 | break;
|
---|
| 562 |
|
---|
| 563 | case 6:
|
---|
| 564 | ver2("XBIOS X_PRBOOT 0x%08x %u %u %u",
|
---|
| 565 | m68k_read_memory_32(sp + 2),
|
---|
| 566 | m68k_read_memory_16(sp + 6),
|
---|
| 567 | m68k_read_memory_16(sp + 8),
|
---|
| 568 | m68k_read_memory_16(sp + 10));
|
---|
| 569 | break;
|
---|
| 570 |
|
---|
| 571 | case 7:
|
---|
| 572 | ver2("XBIOS X_RANDOM");
|
---|
| 573 | break;
|
---|
| 574 |
|
---|
| 575 | case 8:
|
---|
| 576 | ver2("XBIOS X_ANALOG");
|
---|
| 577 | break;
|
---|
| 578 |
|
---|
| 579 | case 9:
|
---|
| 580 | ver2("XBIOS X_CLRAFI");
|
---|
| 581 | break;
|
---|
| 582 |
|
---|
| 583 | case 10:
|
---|
| 584 | ver2("XBIOS X_APICHK");
|
---|
| 585 | break;
|
---|
| 586 |
|
---|
| 587 | case 11:
|
---|
| 588 | ver2("XBIOS X_MTDEFS ");
|
---|
| 589 | break;
|
---|
| 590 |
|
---|
| 591 | default:
|
---|
| 592 | fail("invalid function: XBIOS %d", fun);
|
---|
| 593 | }
|
---|
| 594 | }
|
---|
| 595 | }
|
---|
| 596 |
|
---|
[b909777] | 597 | void cpu_loop(const char *bios)
|
---|
[ff8d800] | 598 | {
|
---|
[a06aa8b] | 599 | hw_init();
|
---|
[b909777] | 600 | bios_init(bios);
|
---|
[ff8d800] | 601 |
|
---|
[ba36b71] | 602 | inf("entering CPU loop");
|
---|
[ff8d800] | 603 | m68k_init();
|
---|
| 604 | m68k_set_cpu_type(M68K_CPU_TYPE_68000);
|
---|
[9674f1a] | 605 | m68k_set_instr_hook_callback(inst_cb);
|
---|
[ff8d800] | 606 | m68k_pulse_reset();
|
---|
| 607 |
|
---|
[ebc8f69] | 608 | uint64_t freq = SDL_GetPerformanceFrequency();
|
---|
| 609 | uint64_t quan = freq / PER_SEC;
|
---|
| 610 | inf("freq %" PRIu64 " quan %" PRIu64, freq, quan);
|
---|
| 611 |
|
---|
[e41c6b6] | 612 | bool run = true;
|
---|
| 613 |
|
---|
| 614 | while (run) {
|
---|
[ebc8f69] | 615 | uint64_t until = SDL_GetPerformanceCounter() + quan;
|
---|
| 616 |
|
---|
| 617 | m68k_execute(CPU_FREQ / PER_SEC);
|
---|
[a06aa8b] | 618 | hw_exec();
|
---|
[e41c6b6] | 619 |
|
---|
| 620 | SDL_Event ev;
|
---|
| 621 |
|
---|
| 622 | while (SDL_PollEvent(&ev) > 0) {
|
---|
| 623 | if (ev.type == SDL_QUIT) {
|
---|
| 624 | run = false;
|
---|
| 625 | }
|
---|
| 626 | }
|
---|
[ebc8f69] | 627 |
|
---|
| 628 | while (SDL_GetPerformanceCounter() < until) {
|
---|
| 629 | _mm_pause();
|
---|
| 630 | }
|
---|
[ff8d800] | 631 | }
|
---|
[e41c6b6] | 632 |
|
---|
| 633 | inf("leaving CPU loop");
|
---|
[ff8d800] | 634 | }
|
---|