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- Timestamp:
- 07/01/2017 02:34:46 PM (7 years ago)
- Branches:
- master
- Children:
- 08e1da1
- Parents:
- f40a309
- Location:
- iolib
- Files:
-
- 5 edited
Legend:
- Unmodified
- Added
- Removed
-
iolib/hwdefs.s
rf40a309 r4f508e6 1 *------------------------------------------------------------------------------2 *hwdefs.s -- External definitions of Buchla 700 I/O addresses3 *Version 14 -- 1988-08-15 -- D.N. Lynx Crowe4 *------------------------------------------------------------------------------1 | ------------------------------------------------------------------------------ 2 | hwdefs.s -- External definitions of Buchla 700 I/O addresses 3 | Version 14 -- 1988-08-15 -- D.N. Lynx Crowe 4 | ------------------------------------------------------------------------------ 5 5 .text 6 * 6 7 7 .xdef _io_time,_io_lcd,_io_ser,_io_midi 8 8 .xdef _io_disk,_io_tone,_io_leds,_io_kbrd 9 9 .xdef _io_vreg,_io_vraw,_io_vram,_io_fpu 10 10 .xdef _lcd_a0,_lcd_a1 11 * 11 12 12 .xdef _v_regs,_v_odtab,_v_actab 13 13 .xdef _v_ct0 14 14 .xdef _v_gt1 15 15 .xdef _v_score,_v_cgtab 16 * 16 17 17 .xdef _v_curs0,_v_curs1,_v_curs2,_v_curs3 18 18 .xdef _v_curs4,_v_curs5,_v_curs6,_v_curs7 … … 20 20 .xdef _v_win0 21 21 .xdef _v_cur 22 * 22 23 23 .xdef _fc_sw,_fc_val 24 * 25 *------------------------------------------------------------------------------26 * 27 *Hardware base addresses28 *-----------------------29 _io_fpu .equ $180000 *FPU base address30 * 31 VB .equ $200000 *VSDD base address32 * 33 _io_time .equ $3A0001 *Timer chip34 _io_lcd .equ $3A4001 *LCD controller35 _io_ser .equ $3A8001 *Serial ports (RS232)36 _io_midi .equ $3AC001 *MIDI ports37 _io_disk .equ $3B0001 *Disk controller38 _io_tone .equ $3B4001 *Sound generator chip39 _io_leds .equ $3B8001 *LED driver40 _io_kbrd .equ $3BC001 *Keyboard / panel processor41 * 42 _lcd_a0 .equ _io_lcd *LCD port a043 _lcd_a1 .equ _io_lcd+2 *LCD port a144 * 24 25 | ------------------------------------------------------------------------------ 26 27 | Hardware base addresses 28 | ----------------------- 29 _io_fpu = 0x180000 | FPU base address 30 31 VB = 0x200000 | VSDD base address 32 33 _io_time = 0x3A0001 | Timer chip 34 _io_lcd = 0x3A4001 | LCD controller 35 _io_ser = 0x3A8001 | Serial ports (RS232) 36 _io_midi = 0x3AC001 | MIDI ports 37 _io_disk = 0x3B0001 | Disk controller 38 _io_tone = 0x3B4001 | Sound generator chip 39 _io_leds = 0x3B8001 | LED driver 40 _io_kbrd = 0x3BC001 | Keyboard / panel processor 41 42 _lcd_a0 = _io_lcd | LCD port a0 43 _lcd_a1 = _io_lcd+2 | LCD port a1 44 45 45 .page 46 * 47 *Video definitions48 *-----------------49 _io_vreg .equ VB *Relocated video registers after setup50 _io_vraw .equ VB+$400 *Raw video registers at RESET51 _io_vram .equ VB *Video RAM base address52 * 53 *Name Offset Usage Bank54 *------- --------- ------------------------- ----55 _v_regs .equ VB *Video registers 0,156 * 57 _v_odtab .equ VB+128 *Object Descriptor Table 058 _v_actab .equ VB+256 *Access Table 059 _v_ct0 .equ VB+1024 *Character Text-0 060 _v_gt1 .equ VB+1304 *Graphics Text-1 061 _v_score .equ VB+8192 *Score object 062 _v_cgtab .equ VB+122880 *Character Generator Table 063 * 64 _v_curs0 .equ VB+1024 *Cursor object 0 (arrow ULE) 165 _v_curs1 .equ VB+1152 *Cursor object 1 (arrow ULO) 166 _v_curs2 .equ VB+1280 *Cursor object 2 (arrow URE) 167 _v_curs3 .equ VB+1408 *Cursor object 3 (arrow URO) 168 _v_curs4 .equ VB+1536 *Cursor object 4 (arrow LLE) 169 _v_curs5 .equ VB+1664 *Cursor object 5 (arrow LLO) 170 _v_curs6 .equ VB+1792 *Cursor object 6 (arrow LRE) 171 _v_curs7 .equ VB+1920 *Cursor object 7 (arrow LRO) 172 _v_tcur .equ VB+2048 *Typewriter cursor 173 _v_kbobj .equ VB+2880 *Keyboard object 174 _v_lnobj .equ VB+4672 *Line object 175 _v_cur .equ VB+6464 *Underline cursor 176 _v_win0 .equ VB+16384 *Window-0 object 177 * 78 *BIOS RAM definitions79 *--------------------80 *WARNING: the following addresses must match those of the corresponding81 *variables defined in bios.s or chaos is guaranteed.82 * 83 _fc_sw .equ $420 *word - Frame counter switch84 _fc_val .equ $422 *long - Frame counter value85 * 46 47 | Video definitions 48 | ----------------- 49 _io_vreg = VB | Relocated video registers after setup 50 _io_vraw = VB+0x400 | Raw video registers at RESET 51 _io_vram = VB | Video RAM base address 52 53 | Name Offset Usage Bank 54 | ------- --------- ------------------------- ---- 55 _v_regs = VB | Video registers 0,1 56 57 _v_odtab = VB+128 | Object Descriptor Table 0 58 _v_actab = VB+256 | Access Table 0 59 _v_ct0 = VB+1024 | Character Text-0 0 60 _v_gt1 = VB+1304 | Graphics Text-1 0 61 _v_score = VB+8192 | Score object 0 62 _v_cgtab = VB+122880 | Character Generator Table 0 63 64 _v_curs0 = VB+1024 | Cursor object 0 (arrow ULE) 1 65 _v_curs1 = VB+1152 | Cursor object 1 (arrow ULO) 1 66 _v_curs2 = VB+1280 | Cursor object 2 (arrow URE) 1 67 _v_curs3 = VB+1408 | Cursor object 3 (arrow URO) 1 68 _v_curs4 = VB+1536 | Cursor object 4 (arrow LLE) 1 69 _v_curs5 = VB+1664 | Cursor object 5 (arrow LLO) 1 70 _v_curs6 = VB+1792 | Cursor object 6 (arrow LRE) 1 71 _v_curs7 = VB+1920 | Cursor object 7 (arrow LRO) 1 72 _v_tcur = VB+2048 | Typewriter cursor 1 73 _v_kbobj = VB+2880 | Keyboard object 1 74 _v_lnobj = VB+4672 | Line object 1 75 _v_cur = VB+6464 | Underline cursor 1 76 _v_win0 = VB+16384 | Window-0 object 1 77 78 | BIOS RAM definitions 79 | -------------------- 80 | WARNING: the following addresses must match those of the corresponding 81 | variables defined in bios.s or chaos is guaranteed. 82 83 _fc_sw = 0x420 | word - Frame counter switch 84 _fc_val = 0x422 | long - Frame counter value 85 86 86 .end -
iolib/rtraps.s
rf40a309 r4f508e6 1 *------------------------------------------------------------------------------2 *rtraps.s -- define ROMP debug trap3 *Version 7 -- 1988-01-12 -- Copyright 1987, 1988 by D.N. Lynx Crowe4 *------------------------------------------------------------------------------1 | ------------------------------------------------------------------------------ 2 | rtraps.s -- define ROMP debug trap 3 | Version 7 -- 1988-01-12 -- Copyright 1987, 1988 by D.N. Lynx Crowe 4 | ------------------------------------------------------------------------------ 5 5 .text 6 * 6 7 7 .xdef _trap15 8 * 8 9 9 .xref _rompbp 10 * 10 11 11 .xref tr1sav,tr13sav,tr14sav 12 12 .xref tr1rmp,tr13rmp,tr14rmp 13 * 14 BUCHLA .equ 1 *IPL value: 0 = NASA , 1 = Buchla15 * 13 14 BUCHLA = 1 | IPL value: 0 = NASA , 1 = Buchla 15 16 16 .ifeq BUCHLA 17 IPLEVEL .equ $0400 *NASA IPL = 4 (enable 5 and above)17 IPLEVEL = 0x0400 | NASA IPL = 4 (enable 5 and above) 18 18 .endc 19 * 19 20 20 .ifne BUCHLA 21 IPLEVEL .equ $0200 *Buchla IPL = 2 (enable 3 and above)21 IPLEVEL = 0x0200 | Buchla IPL = 2 (enable 3 and above) 22 22 .endc 23 * 24 IPL7 .equ $0700 *IPL 725 * 26 *_trap15 -- ROMP debug trap (used to implement breakpoints)27 *------- ------------------------------------------------28 _trap15: ori.w #IPL7,sr *Disable interrupts29 move.w #0,-(a7) *Keep stack long aligned30 movem.l d0-d7/a0-a7,-(a7) *Save regs on stack31 move.l tr1sav,tr1rmp *Save trap save areas32 move.l tr13sav,tr13rmp *...33 move.l tr14sav,tr14rmp *...34 move.w sr,d0 *Get status register35 andi.w # $F8FF,d0 *Enable serial I/O interrupts36 ori.w #IPLEVEL,d0 *...37 move.w d0,sr *...38 jsr _rompbp *Pass control to ROMP39 * 40 ori.w #IPL7,sr *Disable interrupts41 move.l tr14rmp,tr14sav *Restore trap save areas42 move.l tr13rmp,tr13sav *...43 move.l tr1rmp,tr1sav *...44 movem.l (a7)+,d0-d7/a0-a7 *Restore regs45 addq.l #2,a7 *Discard alignment filler word46 rte *Back to what we interrupted47 * 23 24 IPL7 = 0x0700 | IPL 7 25 26 | _trap15 -- ROMP debug trap (used to implement breakpoints) 27 | ------- ------------------------------------------------ 28 _trap15: ori.w #IPL7,sr | Disable interrupts 29 move.w #0,-(a7) | Keep stack long aligned 30 movem.l d0-d7/a0-a7,-(a7) | Save regs on stack 31 move.l tr1sav,tr1rmp | Save trap save areas 32 move.l tr13sav,tr13rmp | ... 33 move.l tr14sav,tr14rmp | ... 34 move.w sr,d0 | Get status register 35 andi.w #0xF8FF,d0 | Enable serial I/O interrupts 36 ori.w #IPLEVEL,d0 | ... 37 move.w d0,sr | ... 38 jsr _rompbp | Pass control to ROMP 39 40 ori.w #IPL7,sr | Disable interrupts 41 move.l tr14rmp,tr14sav | Restore trap save areas 42 move.l tr13rmp,tr13sav | ... 43 move.l tr1rmp,tr1sav | ... 44 movem.l (a7)+,d0-d7/a0-a7 | Restore regs 45 addq.l #2,a7 | Discard alignment filler word 46 rte | Back to what we interrupted 47 48 48 .end -
iolib/setipl.s
rf40a309 r4f508e6 1 * 2 *setipl.s -- Set internal processor interrupt level3 *-------- --------------------------------------4 *Version 2 -- 1988-06-29 -- D.N. Lynx Crowe5 * 6 *short7 *setipl(arg);8 *short arg;9 * 10 *Sets processor interrupt level to arg.11 *Returns old interrupt level, or -1 if arg < 0 or > 712 * 13 *Assumes you are in supervisor mode.14 *You get a Privelege Violation TRAP if you aren't.15 * 1 2 | setipl.s -- Set internal processor interrupt level 3 | -------- -------------------------------------- 4 | Version 2 -- 1988-06-29 -- D.N. Lynx Crowe 5 6 | short 7 | setipl(arg); 8 | short arg; 9 10 | Sets processor interrupt level to arg. 11 | Returns old interrupt level, or -1 if arg < 0 or > 7 12 13 | Assumes you are in supervisor mode. 14 | You get a Privelege Violation TRAP if you aren't. 15 16 16 .text 17 * 17 18 18 .xdef _setipl 19 * 20 _setipl: link a6,#0 *Link up stack frames21 move.w 8(a6),d0 *Get argument22 tst.w d0 *Check lower limit23 bmi setipler *Jump if < 0 (error)24 * 25 cmpi.w #7,d0 *Check upper limit26 bgt setipler *Jump if > 7 (error)27 * 28 move.w sr,d1 *Get current level29 move.w d1,d2 *... save for later30 lsl.w #8,d0 *Shift argument into position31 andi.w # $F8FF,d1 *Mask out old level32 or.w d0,d1 *OR in new level33 move.w d2,d0 *Setup return of old level34 lsr.w #8,d0 *...35 andi.l # $7,d0 *...36 move.w d1,sr *Set the new interrupt level37 unlk a6 *Unlink stack frames38 rts *Return to caller39 * 40 setipler: moveq.l #-1,d0 *Setup to return error code41 unlk a6 *Unlink stack frames42 rts *Return to caller43 * 19 20 _setipl: link a6,#0 | Link up stack frames 21 move.w 8(a6),d0 | Get argument 22 tst.w d0 | Check lower limit 23 bmi setipler | Jump if < 0 (error) 24 25 cmpi.w #7,d0 | Check upper limit 26 bgt setipler | Jump if > 7 (error) 27 28 move.w sr,d1 | Get current level 29 move.w d1,d2 | ... save for later 30 lsl.w #8,d0 | Shift argument into position 31 andi.w #0xF8FF,d1 | Mask out old level 32 or.w d0,d1 | OR in new level 33 move.w d2,d0 | Setup return of old level 34 lsr.w #8,d0 | ... 35 andi.l #0x7,d0 | ... 36 move.w d1,sr | Set the new interrupt level 37 unlk a6 | Unlink stack frames 38 rts | Return to caller 39 40 setipler: moveq.l #-1,d0 | Setup to return error code 41 unlk a6 | Unlink stack frames 42 rts | Return to caller 43 44 44 .end -
iolib/setsr.s
rf40a309 r4f508e6 1 * 2 *setsr.s -- Set processor status register3 *------- -----------------------------4 *Version 1 -- 1988-06-29 -- D.N. Lynx Crowe5 * 6 *short7 *setsr(arg);8 *short arg;9 * 10 *Sets processor status register to 'arg'.11 *Returns old status register value.12 * 13 *Assumes you are in supervisor mode.14 *You get a Privelege Violation TRAP if you aren't.15 * 16 *Coded for speed -- this is as fast as you can get.17 *No error checking is done -- assumes you know what you're doing.18 * 1 2 | setsr.s -- Set processor status register 3 | ------- ----------------------------- 4 | Version 1 -- 1988-06-29 -- D.N. Lynx Crowe 5 6 | short 7 | setsr(arg); 8 | short arg; 9 10 | Sets processor status register to 'arg'. 11 | Returns old status register value. 12 13 | Assumes you are in supervisor mode. 14 | You get a Privelege Violation TRAP if you aren't. 15 16 | Coded for speed -- this is as fast as you can get. 17 | No error checking is done -- assumes you know what you're doing. 18 19 19 .text 20 * 20 21 21 .xdef _setsr 22 * 23 _setsr: move.w sr,d0 *Get current sr24 move.w 4(sp),sr *Set new sr25 rts *Return to caller26 * 22 23 _setsr: move.w sr,d0 | Get current sr 24 move.w 4(sp),sr | Set new sr 25 rts | Return to caller 26 27 27 .end -
iolib/traps.s
rf40a309 r4f508e6 1 * 2 *traps.s -- define trap linkages for C routines3 *------- -----------------------------------4 *Version 8 -- 1987-06-08 -- D.N. Lynx Crowe5 * 6 *Caution: these are serially re-useable, but NOT reentrant, so7 *don't use them in interrupt processing code.8 * 9 *An exception is made for ROMP in _trap15 for breakpoints so that the10 *debug code can be debugged.11 * 1 2 | traps.s -- define trap linkages for C routines 3 | ------- ----------------------------------- 4 | Version 8 -- 1987-06-08 -- D.N. Lynx Crowe 5 6 | Caution: these are serially re-useable, but NOT reentrant, so 7 | don't use them in interrupt processing code. 8 9 | An exception is made for ROMP in _trap15 for breakpoints so that the 10 | debug code can be debugged. 11 12 12 .text 13 * 13 14 14 .xdef _trap1 15 15 .xdef _trap13,_trap14 16 16 .xdef _xtrap15 17 * 17 18 18 .xdef tr1sav,tr13sav,tr14sav 19 19 .xdef tr1rmp,tr13rmp,tr14rmp 20 * 21 *_trap1 -- provide access to BDOS functions22 *------ --------------------------------23 _trap1: move.l (a7)+,tr1sav *Save return address24 trap #1 *Do the trap25 move.l tr1sav,-(a7) *Restore return address26 rts *Return to caller27 * 28 *_trap13 -- provide access to BIOS functions29 *------- --------------------------------30 _trap13: move.l (a7)+,tr13sav *Save return address31 trap #13 *Do the trap32 move.l tr13sav,-(a7) *Restore return address33 rts *Return to caller34 * 35 *_trap14 -- provide access to extended BIOS functions36 *------- -----------------------------------------37 _trap14: move.l (a7)+,tr14sav *Save return address38 trap #14 *Do the trap39 move.l tr14sav,-(a7) *Restore return address40 rts *Return to caller41 * 42 *_xtrap15 -- Setup initial register trap for ROMP43 *-------- ------------------------------------44 _xtrap15: trap #15 *TRAP into ROMP45 rts *Return (usually won't happen)46 * 20 21 | _trap1 -- provide access to BDOS functions 22 | ------ -------------------------------- 23 _trap1: move.l (a7)+,tr1sav | Save return address 24 trap #1 | Do the trap 25 move.l tr1sav,-(a7) | Restore return address 26 rts | Return to caller 27 28 | _trap13 -- provide access to BIOS functions 29 | ------- -------------------------------- 30 _trap13: move.l (a7)+,tr13sav | Save return address 31 trap #13 | Do the trap 32 move.l tr13sav,-(a7) | Restore return address 33 rts | Return to caller 34 35 | _trap14 -- provide access to extended BIOS functions 36 | ------- ----------------------------------------- 37 _trap14: move.l (a7)+,tr14sav | Save return address 38 trap #14 | Do the trap 39 move.l tr14sav,-(a7) | Restore return address 40 rts | Return to caller 41 42 | _xtrap15 -- Setup initial register trap for ROMP 43 | -------- ------------------------------------ 44 _xtrap15: trap #15 | TRAP into ROMP 45 rts | Return (usually won't happen) 46 47 47 .page 48 * 49 *RAM storage areas50 *-----------------48 49 | RAM storage areas 50 | ----------------- 51 51 .bss 52 52 .even 53 * 54 tr1sav: ds.l 1 *Return address for trap155 tr13sav: ds.l 1 *Return address for trap1356 tr14sav: ds.l 1 *Return address for trap1457 * 58 tr1rmp: ds.l 1 *Save area for tr1sav for ROMP59 tr13rmp: ds.l 1 *Save area for tr13sav for ROMP60 tr14rmp: ds.l 1 *Save area for tr14sav for ROMP61 * 53 54 tr1sav: ds.l 1 | Return address for trap1 55 tr13sav: ds.l 1 | Return address for trap13 56 tr14sav: ds.l 1 | Return address for trap14 57 58 tr1rmp: ds.l 1 | Save area for tr1sav for ROMP 59 tr13rmp: ds.l 1 | Save area for tr13sav for ROMP 60 tr14rmp: ds.l 1 | Save area for tr14sav for ROMP 61 62 62 .end
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