- Timestamp:
- 07/23/2017 08:57:53 PM (7 years ago)
- Branches:
- master
- Children:
- 375f7fb
- Parents:
- 8e1b163
- File:
-
- 1 edited
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-
emu/cpu.c
r8e1b163 r3c30832 37 37 typedef void (*hw_init_t)(void); 38 38 typedef void (*hw_quit_t)(void); 39 typedef void(*hw_exec_t)(void);39 typedef bool (*hw_exec_t)(void); 40 40 typedef uint32_t (*hw_read_t)(uint32_t off, int32_t sz); 41 41 typedef void (*hw_write_t)(uint32_t off, int32_t sz, uint32_t val); … … 44 44 uint32_t addr_beg; 45 45 uint32_t addr_end; 46 uint32_t irq; 46 47 hw_init_t init; 47 48 hw_quit_t quit; … … 67 68 68 69 static hw_t hw_map[] = { 69 { 0x180000, 0x200000, fpu_init, fpu_quit, fpu_exec, fpu_read, fpu_write },70 { 0x200000, 0x280000, vid_init, vid_quit, vid_exec, vid_read, vid_write },71 { 0x3a0001, 0x3a4001, tim_init, tim_quit, tim_exec, tim_read, tim_write },72 { 0x3a4001, 0x3a8001, lcd_init, lcd_quit, lcd_exec, lcd_read, lcd_write },73 { 0x3a8001, 0x3ac001, ser_init, ser_quit, ser_exec, ser_read, ser_write },74 { 0x3ac001, 0x3b0001, mid_init, mid_quit, mid_exec, mid_read, mid_write },75 { 0x3b0001, 0x3b4001, fdd_init, fdd_quit, fdd_exec, fdd_read, fdd_write },76 { 0x3b4001, 0x3b8001, snd_init, snd_quit, snd_exec, snd_read, snd_write },77 { 0x3b8001, 0x3bc001, led_init, led_quit, led_exec, led_read, led_write },78 { 0x3bc001, 0x3c0001, kbd_init, kbd_quit, kbd_exec, kbd_read, kbd_write }70 { 0x180000, 0x200000, 0, fpu_init, fpu_quit, fpu_exec, fpu_read, fpu_write }, 71 { 0x200000, 0x280000, 0, vid_init, vid_quit, vid_exec, vid_read, vid_write }, 72 { 0x3a0001, 0x3a4001, 0, tim_init, tim_quit, tim_exec, tim_read, tim_write }, 73 { 0x3a4001, 0x3a8001, 0, lcd_init, lcd_quit, lcd_exec, lcd_read, lcd_write }, 74 { 0x3a8001, 0x3ac001, 5, ser_init, ser_quit, ser_exec, ser_read, ser_write }, 75 { 0x3ac001, 0x3b0001, 0, mid_init, mid_quit, mid_exec, mid_read, mid_write }, 76 { 0x3b0001, 0x3b4001, 0, fdd_init, fdd_quit, fdd_exec, fdd_read, fdd_write }, 77 { 0x3b4001, 0x3b8001, 0, snd_init, snd_quit, snd_exec, snd_read, snd_write }, 78 { 0x3b8001, 0x3bc001, 0, led_init, led_quit, led_exec, led_read, led_write }, 79 { 0x3bc001, 0x3c0001, 0, kbd_init, kbd_quit, kbd_exec, kbd_read, kbd_write } 79 80 }; 80 81 … … 108 109 } 109 110 110 static void hw_exec(void) 111 { 111 static uint32_t hw_exec(void) 112 { 113 uint32_t irq = 0; 114 112 115 for (int32_t i = 0; i < ARRAY_COUNT(hw_map); ++i) { 113 hw_map[i].exec(); 114 } 116 if (hw_map[i].exec() && hw_map[i].irq > irq) { 117 irq = hw_map[i].irq; 118 } 119 } 120 121 return irq; 115 122 } 116 123 … … 629 636 630 637 m68k_execute(CPU_FREQ / PER_SEC); 631 hw_exec(); 638 uint32_t irq = hw_exec(); 639 640 if (irq > 0) { 641 ver2("irq %u", irq); 642 } 643 644 m68k_set_irq(irq); 632 645 633 646 SDL_Event ev;
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